CN102738019A - 一种基于框架载体开孔和模具贴膜的aaqfn产品的二次塑封制作工艺 - Google Patents
一种基于框架载体开孔和模具贴膜的aaqfn产品的二次塑封制作工艺 Download PDFInfo
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- CN102738019A CN102738019A CN2012101926145A CN201210192614A CN102738019A CN 102738019 A CN102738019 A CN 102738019A CN 2012101926145 A CN2012101926145 A CN 2012101926145A CN 201210192614 A CN201210192614 A CN 201210192614A CN 102738019 A CN102738019 A CN 102738019A
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- plastic packaging
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- aaqfn
- technology
- plastic package
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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Abstract
Description
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012101926145A CN102738019A (zh) | 2012-06-13 | 2012-06-13 | 一种基于框架载体开孔和模具贴膜的aaqfn产品的二次塑封制作工艺 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012101926145A CN102738019A (zh) | 2012-06-13 | 2012-06-13 | 一种基于框架载体开孔和模具贴膜的aaqfn产品的二次塑封制作工艺 |
Publications (1)
Publication Number | Publication Date |
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CN102738019A true CN102738019A (zh) | 2012-10-17 |
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Family Applications (1)
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CN2012101926145A Pending CN102738019A (zh) | 2012-06-13 | 2012-06-13 | 一种基于框架载体开孔和模具贴膜的aaqfn产品的二次塑封制作工艺 |
Country Status (1)
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CN (1) | CN102738019A (zh) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100246585B1 (ko) * | 1997-07-21 | 2000-03-15 | 유무성 | 비지에이 반도체 리이드프레임과 그 제조방법 |
CN2929961Y (zh) * | 2006-04-15 | 2007-08-01 | 宁波康强电子股份有限公司 | 改进型三极管引线框架 |
US20090079052A1 (en) * | 2007-09-20 | 2009-03-26 | Samsung Electronics Co., Ltd | Semiconductor package, apparatus and method for manufacturing the semiconductor package, and electronic device equipped with the semiconductor package |
CN100508111C (zh) * | 2004-10-23 | 2009-07-01 | 飞思卡尔半导体公司 | 封装装置及其形成方法 |
CN101697348A (zh) * | 2009-10-11 | 2010-04-21 | 天水华天科技股份有限公司 | 一种小载体四面扁平无引脚封装件及其制备方法 |
US20100285638A1 (en) * | 2008-05-19 | 2010-11-11 | Tung-Hsien Hsieh | Method for fabricating qfn semiconductor package |
CN101958300A (zh) * | 2010-09-04 | 2011-01-26 | 江苏长电科技股份有限公司 | 双面图形芯片倒装模组封装结构及其封装方法 |
-
2012
- 2012-06-13 CN CN2012101926145A patent/CN102738019A/zh active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100246585B1 (ko) * | 1997-07-21 | 2000-03-15 | 유무성 | 비지에이 반도체 리이드프레임과 그 제조방법 |
CN100508111C (zh) * | 2004-10-23 | 2009-07-01 | 飞思卡尔半导体公司 | 封装装置及其形成方法 |
CN2929961Y (zh) * | 2006-04-15 | 2007-08-01 | 宁波康强电子股份有限公司 | 改进型三极管引线框架 |
US20090079052A1 (en) * | 2007-09-20 | 2009-03-26 | Samsung Electronics Co., Ltd | Semiconductor package, apparatus and method for manufacturing the semiconductor package, and electronic device equipped with the semiconductor package |
US20100285638A1 (en) * | 2008-05-19 | 2010-11-11 | Tung-Hsien Hsieh | Method for fabricating qfn semiconductor package |
CN101697348A (zh) * | 2009-10-11 | 2010-04-21 | 天水华天科技股份有限公司 | 一种小载体四面扁平无引脚封装件及其制备方法 |
CN101958300A (zh) * | 2010-09-04 | 2011-01-26 | 江苏长电科技股份有限公司 | 双面图形芯片倒装模组封装结构及其封装方法 |
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C06 | Publication | ||
PB01 | Publication | ||
C53 | Correction of patent of invention or patent application | ||
CB03 | Change of inventor or designer information |
Inventor after: Guo Xiaowei Inventor after: Zhu Wenhui Inventor after: Chen Shiguang Inventor after: Zhong Huanqing Inventor after: Wang Xiyou Inventor before: Guo Xiaowei Inventor before: Liu Jianjun Inventor before: Cui Meng Inventor before: Luo Yuguang Inventor before: Chen Shiguang |
|
COR | Change of bibliographic data |
Free format text: CORRECT: INVENTOR; FROM: GUO XIAOWEI LIU JIANJUN CUI MENG LUO YUGUANG CHEN SHIGUANG TO: GUO XIAOWEIZHU WENHUI CHEN SHIGUANG ZHONG HUANQING WANG XIYOU |
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SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20121017 |