CN102315210A - 包括相互层叠的半导体封装体的半导体装置 - Google Patents
包括相互层叠的半导体封装体的半导体装置 Download PDFInfo
- Publication number
- CN102315210A CN102315210A CN2011101956860A CN201110195686A CN102315210A CN 102315210 A CN102315210 A CN 102315210A CN 2011101956860 A CN2011101956860 A CN 2011101956860A CN 201110195686 A CN201110195686 A CN 201110195686A CN 102315210 A CN102315210 A CN 102315210A
- Authority
- CN
- China
- Prior art keywords
- housing parts
- package body
- semiconductor package
- semiconductor
- primary current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/117—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/30—Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
- H01L2224/301—Disposition
- H01L2224/3018—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/30181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
- H01L23/4012—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws for stacked arrangements of a plurality of semiconductor devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/30—Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
半导体装置包括相互堆叠的多个半导体封装体。每个半导体封装体包括布置在半导体封装体的外壳部分内的主电流电极端子,主电流电极端子暴露在外壳部分的外部以电连接至外部电源。主电流电极端子沿半导体封装体的堆叠方向延伸,并在其面向外壳部分的外表面的表面部处嵌入外壳部分内。主电流电极端子沿堆叠方向的两个端面部分别到达外壳部分沿堆叠方向的端面部,使得当半导体封装体沿堆叠方向相互堆叠时,每相邻的两个半导体封装体的主电流电极端子相互接触。
Description
技术领域
本发明涉及一种包括半导体封装体的半导体装置,在该半导体封装体中集成半导体元件以及用于散热的金属体并且该半导体封装体由冷却剂冷却,本发明还涉及包括多个这种相互层叠的半导体封装体的半导体装置。
背景技术
一般地,这种半导体装置包括由半导体元件、金属体、密封部分和外壳部分构成的半导体封装体,金属体与半导体元件热连接以从半导体元件传导热,密封部分密封地围封半导体元件和金属体使得金属体的散热表面从密封部分暴露,外壳部分容纳密封部分以便形成供冷却剂流过的冷却剂通道。半导体元件和金属体布置在冷却剂通道内,使得金属体的散热表面由冷却剂冷却。
日本专利申请特开No.2006-165534公开了堆叠多个这种半导体封装体,使得与半导体元件连接并从相应的半导体封装体的外壳部分突出到外部的主电流端子的一端与汇流条连接。
但是,上述传统的半导体装置所具有的问题在于,必须提供汇流条而且存在许多必须焊接或钎焊的部分。另外,由于汇流条与每个主电流端子之间的电流路径较长,因此电流路径具有较大感抗。
发明内容
一个实施方式提供一种半导体装置,包括:
相互堆叠的多个半导体封装体,每个半导体封装体包括:
半导体元件;
金属体,该金属体与半导体元件热连接,以传导半导体元件内产生的热;
外壳部分,该外壳部分成形为形成供冷却剂流过的冷却剂通道,并且该外壳部分中容纳半导体元件和金属体;以及
主电流电极端子,该主电流电极端子布置在外壳部分内并与半导体元件电连接,主电流电极端子暴露在外壳部分的外部以电连接至外部电源,
其中,当半导体封装体堆叠的方向称为堆叠方向时,主电流电极端子沿堆叠方向延伸、并在其面向外壳部分的外表面的表面部处嵌入外壳部分内,主电流电极端子沿堆叠方向的两个端面部分别到达外壳部分沿堆叠方向的端面部,使得当半导体封装体沿堆叠方向相互堆叠时,每相邻的两个半导体封装体的主电流电极端子相互接触。
根据本发明,提供一种半导体装置,包括相互堆叠的多个半导体封装体,该半导体装置具有以下结构:相应的半导体封装体的主电流电极端子可不利用汇流条相互电连接,并且能够减小该半导体装置的主电流路径的感抗。
从包括附图和权利要求的以下说明中将更好地理解本发明的其它优势和特征。
附图说明
在附图中:
图1是根据本发明的第一实施方式的半导体装置的分解透视图;
图2是包括在图1所示的半导体装置中的半导体封装体中的一个的透视图;
图3A是沿线A-A截取的图2的横截面图;
图3B是由线B指示的图3A的部分的放大的横截面图;
图4是沿线C-C截取的图2的横截面图;
图5是沿线E-E截取的图4横截面图;
图6是从箭头D看的图1所示的半导体封装体的透视图;
图7是包括在根据本发明的第一实施方式的半导体装置的变体中的半导体封装体中的一个的横截面图;
图8A是在根据本发明的第二实施方式的半导体装置的堆叠之前的半导体封装体中的一个的横截面图;以及
图8B是示出根据本发明的第二实施方式的由相互堆叠的半导体封装体构成的半导体装置的部分的横截面图。
具体实施方式
在下述实施方式中,相同或等同部件或部分由相同的参考数字或字母指示。
第一实施方式
图1是根据本发明的第一实施方式的半导体装置的分解透视图。图2是包括在图1所示的半导体装置中的半导体封装体中的一个的透视图。图3A是沿线A-A截取的图2的横截面图。图3B是由线B指示的图3A的部分的放大的横截面图。图4是沿线C-C截取的图2的横截面图。图5是沿线E-E截取的图4横截面图。图6是从箭头D看的图1所示的半导体封装体的透视图。
第一实施方式的半导体装置包括多个半导体封装体1,每个半导体封装体1均具有一个在一个内的结构,在该结构中,上臂(高侧元件)的一个半导体功率元件密封在密封部分内。
如图1所示,半导体封装体1相互堆叠,作为半导体封装体堆。半导体封装体堆在其一端设置有第一盖构件8,在其另一端设置有第二盖构件9。第一和第二盖构件8和9由将半导体封装体堆保持在第一盖构件8和第二盖构件9之间的螺栓(未示出)相互固定。在下文中,半导体封装体1堆叠的方向称为“堆叠方向X”。
如图2至6所示,半导体封装体1包括:形成有IGBT(绝缘栅双极晶体管)作为半导体功率元件的主半导体芯片30,形成有FWD(自由旋转二极管)的副半导体芯片31,由金属制成的下部散热器13,由金属制成上部散热器14,置于主半导体芯片30与下部散热器13之间的第一下部焊接部15a,置于主半导体芯片30与上部散热器14之间的第一上部焊接部16a,置于副半导体芯片31与下部散热器13之间的第二下部焊接部15b,置于副半导体芯片31与上部散热器14之间的第二上部焊接部16b,其中密封半导体芯片30和31以及散热器13和14的由树脂制造的密封部分17,容纳密封部分7以便形成供冷却剂流过的冷却剂通道18的由树脂制造的外壳部分19,形成在散热器13和14的每个表面上的绝缘层20,两个正极端子21,输出端子23以及控制端子24。
外壳部分19成形为具有矩形截面的管。因此,当从堆叠方向X看时,外壳部分19呈现矩形。在下文中,图2中垂直于堆叠方向X并平行于外壳部分19的上部和下部外表面的方向称为“宽度方向Y”。另外,图2中垂直于堆叠方向X并平行于外壳部分19的左侧和右侧外表面的方向称为“高度方向Z”。
主半导体芯片30和副半导体芯片31沿宽度方向Y并排布置。密封部分17通过施加树脂以覆盖半导体芯片30和31并填充散热器13和14之间的空间而形成。集成为大致长方体形状的密封部分17的半导体芯片30和31以及散热器13和14容纳在外壳部分19内,以便定位在冷却剂通道18内。密封部分17和外壳部分19利用比如环氧树脂的模制材料整体地模制。
主半导体芯片30的后表面(图3A中的下表面)与下部散热器13的上表面由第一下部焊接部15a相互联结。主半导体芯片30的前表面(图3A中的上表面)与上部散热器14的下表面由第一上部焊接部16a相互联结。由于下部散热器13和上部散热器14与主半导体芯片30热连接,因此,主半导体芯片30中产生的热传导至散热器13和14。
副半导体芯片31的后表面(图3A中的下表面)与下部散热器13的上表面由第二下部焊接部15b相互联结。副半导体芯片31的前表面(图3A中的上表面)与上部散热器14的下表面由第二上部焊接部16b相互联结。由于下部散热器13和上部散热器14与副半导体芯片31热连接,因此,副半导体芯片31中产生的热传导至散热器13和14。
主半导体芯片30和副半导体芯片31中的每一个均形成有电极(未示出)。主半导体芯片30的电极通过第一下部焊接部15a与下部散热器13电连接。副半导体芯片31的电极通过第二下部焊接部15b与下部散热器13电连接。
下部散热器13的下表面用作散热表面。上部散热器14的上表面用作散热表面。这些散热表面从密封部分17暴露,使其与流过冷却剂通道18的冷却剂接触。
因此,主半导体芯片30中产生的热通过从其上表面经过第一上部焊接部16a传导至上部散热器14并从其下表面经过第一下部散热器15a传导至下部散热器13散失。
同样地,副半导体芯片31中产生的热通过从其上表面经过第二上部焊接部16b传导至上部散热器14并从其下表面经过第二下部散热器15b传导至下部散热器13散失。
上部和下部散热器13和14由高导热和高导电材料制成,比如铝合金。优选地,上部和下部散热器13和14成形为长方体形状。
如图3B所示,绝缘层20形成在上部散热器14的散热表面上。尽管未在附图中示出,但绝缘层也形成在下部散热器13的散热表面上。散热器13和14的散热表面与半导体芯片30和31电绝缘。因此,冷却剂可为导电流体,比如水。
本实施方式的半导体装置用作将输入的DC电源转换成AC电源以驱动AC三相电机的逆变器的一部分。更具体地,逆变器包括对应于AC电机的三相的串联的三对上臂和下臂。主半导体芯片30和副微计算机芯片31结合构成上臂中的一个。
作为主电流电极端子的正极端子21由高导电材料,比如铜合金制成。正极端子21成形为沿堆叠方向X延伸的长方体块,并局部暴露到外壳部分19的外部。更准确地,两个正极端子21布置在外壳部分19的外表面中的如下所述的一个上:其上布置输出端子23的外表面。正极端子21在其面向外壳部分的外表面(图2和5中的外壳部分19的下表面)的一侧上的表面处嵌入外壳部分19内,以便在其与外壳部分19的外表面相对的一侧上的表面处从外壳部分19的外表面突出。正极端子21通过在其面向外壳部分19的外表面的一侧上的外表面处焊接或钎焊与下部散热器13联结,使其与主半导体芯片30的集电极电连接。
正极端子21沿堆叠方向X在其每个端部具有正极端子端面部211。每个正极端子端面部211延伸以到达沿堆叠方向X形成在外壳部分19的两个端部中的每一个内的外壳部分端面部191。更准确地,正极端子端面部211与外壳部分端面部191的外表面相互齐平,其间没有台阶。
在该实施方式中,正极端子21对于每个半导体封装体1设置在两个位置处。但是,正极端子21对于每个半导体封装体1可设置在一个位置处。
输出端子23是由高导电材料,比如铜合金制成的板构件,输出端子23暴露到外壳部分19的外部以与三相电机(未示出)电连接。输出端子23布置在两个正极端子21布置其上的外表面中的一个上,以使其沿宽度方向Y定位在两个正极端子21之间。输出端子23沿高度方向Z延伸。输出端子23通过焊接或钎焊与上部散热器14联结,以电连接至主半导体芯片31的发射极。
控制端子24包括布置在半导体芯片30和31的外围并在其端部突出到外壳部分的外部的引线框。更准确地,控制端子24从没有正极端子21布置其上的外壳部分19的外表面中的一个突出,并沿高度方向Z延伸。
控制端子24在其端部与外部设备的控制电路板连接,使得半导体装置电连接至控制电路板。控制端子24用作与形成在半导体芯片30和31的表面上(比如,栅电极)的信号电极连接的端子。尽管未在附图中示出,但控制端子24通过焊线或类似配线与半导体芯片30和31电连接。
如图1所示,第一盖构件8是用于封闭半导体封装体堆的一端的大致长方体形状的由树脂制造的构件。第一盖构件8设置有引入冷却剂的入口管81和排出冷却剂的出口管82。入口管81和出口管82与半导体封装体1的冷却剂通道18连通。第一盖构件8形成有作为螺栓孔的通孔83。
第一盖构件8还设置有由高导电材料,比如铜合金制成的两个正极继电器端子84。正极继电器端子84成形为当集成在半导体封装体堆上时与正极端子21电接触。
第一盖构件8可由导电材料,比如金属制成。在该例子中,第一盖构件8通过插入在第一盖构件8与正极继电器端子84之间的绝缘构件与正极继电器端子84绝缘。
第二盖构件9是用于封闭半导体封装体堆的另一端的大致长方体形状的由树脂制造的构件。第二盖构件9在两个位置处形成有与螺栓接合的内螺纹。附带地,正极继电器端子84可设置在第二盖构件9内。
在半导体封装体1相互堆叠之后,第一和第二盖构件8和9设定在半导体封装体堆的两端上,螺栓通过形成在第一盖部分8内的通孔83插入,并与形成在第二盖构件91内的内螺纹91接合。因此,半导体封装体堆牢固地保持在第一和第二盖构件8和9之间。
为了确保每相邻的两个半导体封装体1之间、第一盖构件8与半导体封装体1之间以及第二盖构件9与半导体封装体1之间的水密性,O形环或粘合材料用作密封件。在利用O形环的情形下,通过螺栓的拧紧力按压O形环。
在半导体封装体堆保持在第一和第二盖构件8和9之间的状态下,每相邻的两个半导体封装体1的正极端子21通过其相互接触的正极端子端面部211互相电连接。
在该状态中,邻近第一盖构件8的半导体封装体1的每个正极端子21和第一盖构件8的每个正极继电器端子84相互接触,以互相电连接。
每相邻的两个半导体封装体1的正极端子21之间以及每个正极端子21与每个正极继电器端子84之间的接触部可焊接或钎焊,或可插入绝缘膜以确保每个接触部处的电连接。
当这种接触部焊接或钎焊时,正极端子端面部211的表面和外壳部分端面部191的表面可不相互齐平。即,在这种情况下,正极端子端面部211的表面可沿堆叠方向X凹进超过外壳部分端面部191的表面。
另外,正极端子端面部211的表面可沿堆叠方向X突出超过外壳部分端面部191的表面,使得在半导体封装体1相互堆叠时更可靠地形成正极端子21之间以及正极端子21与正极继电器端子84之间的接触部处的电连接。
如上所述,根据该实施方式,由于当半导体封装体1相互堆叠时,每相邻的两个半导体封装体1的正极端子21互相电连接,因此不需要用于半导体封装体1的正极端子21之间的电连接的汇流条。
另外,不必要焊接每相邻的两个正极端子21的正极端子21之间的接触部。即使在焊接接触部中的一些的情况下,也可减小焊接部的数目。
正极端子端面部211的表面与外壳部分端面部191的表面相互齐平。因此,没有间隙形成在相互堆叠的每相邻的两个半导体封装体的外壳部分端面部191之间。
正极端子21在其面向外壳部分19的外表面的一侧上的表面处嵌入外壳部分19内。因此,与不存在汇流条相结合,由于能够缩小电流路径的长度,因此可减小电流路径的感抗。
第一实施方式的变体
图7是包括在根据本发明的第一实施方式的半导体装置的变体中的半导体封装体中的一个的横截面图。
在该第一实施方式中,正极端子21成形为长方体。但是,在该变体中,正极端子2由成形为具有C形横截面的导电金属制成,如图7所示。
在该变体中,正极端子21在其两端沿堆叠方向X弯曲,使得弯曲部212形成在其两端处。正极端子21在每个均定位在每相邻的两个半导体封装体1的外壳部分19的外壳部分端面部191之间的部分处嵌入外壳部分端面部191内(即,在弯曲部212处嵌入外壳部分端面部191内)。将弯曲部212嵌入外壳部分端面部191内使得能够减小正极端子端面部211从外壳部分端面部191的突出,从而减小每相邻的两个半导体封装体1的外壳部分端面部191之间的间隙,或使得正极端子端面部211的表面与外壳部分端面部191的表面相互齐平,从而消除每相邻的两个半导体封装体1的外壳部分端面部191之间的间隙。
尽管上述实施方式的半导体装置被描述为逆变器的上臂,但该实施方式也可用作逆变器的下臂。
第二实施方式
下一步,说明本发明的第二实施方式。图8A是在根据本发明的第二实施方式的半导体装置的堆叠之前的半导体封装体中的一个的横截面图。图8B是示出根据本发明的第二实施方式的由相互堆叠其上的半导体封装体构成的半导体装置的部分的横截面图。第二实施方式的以下说明集中在与第一实施方式的区别上。
如图8A所示,在该实施方式中,由高导电材料,比如铜合金制成的正极端子21在其两端沿堆叠方向X弯曲以形成其两端处的两个弹性部213。
当弹性部213在自由状态下的远端之间沿堆叠方向X的长度为L1,两个弹性部213的近端之间沿堆叠方向X的长度是L2,并且半导体封装体1的外壳部分端面部191的表面之间的长度是L3时,保持以下关系:L1>L3,并且L2≤L3。
当将半导体封装体堆保持其间的第一和第二盖构件8和9由螺栓相互固定时,弹性部213弹性地变形,使得每相邻的两个半导体封装体1的正极端子21在其正极端子端面部211处相互接触,并且每相邻的两个半导体封装体1的外壳部分端面部191互相紧密地接触,如图8B所示。
根据第二实施方式,半导体封装体1的距离L1、L2和L3的变化可由弹性部213的弹性变形所吸收。因此,根据第二实施方式,由于当半导体封装体1相互堆叠时,每相邻的两个半导体封装体1的正极端子21可相互牢固地接触,因此能够消除每相邻的两个半导体封装体1的外壳部分端面部191之间的间隙,从而确保冷却剂通道18的密封。
以上阐明的优选实施方式是仅通过以下所附权利要求说明的本申请的发明的示例。应当理解,优选实施方式的变体对于本领域技术人员来说是容易想到的。
Claims (5)
1.一种半导体装置,包括:
相互堆叠的多个半导体封装体,每个所述半导体封装体包括:
半导体元件;
金属体,所述金属体与所述半导体元件热连接,以传导所述半导体元件内产生的热;
外壳部分,所述外壳部分成形为形成供冷却剂流过的冷却剂通道,并且所述外壳部分中容纳所述半导体元件和所述金属体;以及
主电流电极端子,所述主电流电极端子布置在所述外壳部分内并与所述半导体元件电连接,所述主电流电极端子暴露在所述外壳部分的外部以电连接至外部电源,
其中,当所述半导体封装体堆叠的方向称为堆叠方向时,所述主电流电极端子沿所述堆叠方向延伸、并在其面向所述外壳部分的外表面的表面部处嵌入所述外壳部分内,所述主电流电极端子沿所述堆叠方向的两个端面部分别到达所述外壳部分沿所述堆叠方向的端面部,使得当所述半导体封装体沿所述堆叠方向相互堆叠时,每相邻的两个所述半导体封装体的所述主电流电极端子相互接触。
2.根据权利要求1所述的半导体装置,其中,所述主电流电极端子的所述端面部沿所述堆叠方向突出超过所述外壳部分的所述端面部。
3.根据权利要求1所述的半导体装置,其中,所述主电流电极端子的每个所述端面部与所述外壳部分的所述端面部中的相对应的一个齐平。
4.根据权利要求1所述的半导体装置,其中,所述半导体封装体的每个所述主电流电极端子在其定位在每相邻的两个所述半导体封装体的所述外壳部分的所述端面部之间的部分处嵌入所述外壳部分内。
5.根据权利要求1所述的半导体装置,其中,所述主电流端子的所述端面部形成有沿所述堆叠方向能够弹性地变形的弹性部。
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010-157085 | 2010-07-09 | ||
JP2010157085 | 2010-07-09 | ||
JP2011041854A JP5206822B2 (ja) | 2010-07-09 | 2011-02-28 | 半導体装置 |
JP2011-041854 | 2011-02-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102315210A true CN102315210A (zh) | 2012-01-11 |
CN102315210B CN102315210B (zh) | 2014-03-12 |
Family
ID=45428215
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201110195686.0A Expired - Fee Related CN102315210B (zh) | 2010-07-09 | 2011-07-08 | 包括相互层叠的半导体封装体的半导体装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8537551B2 (zh) |
JP (1) | JP5206822B2 (zh) |
CN (1) | CN102315210B (zh) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106042951A (zh) * | 2015-04-15 | 2016-10-26 | 福特全球技术公司 | 电源模块组件及歧管 |
CN106042949A (zh) * | 2015-04-15 | 2016-10-26 | 福特全球技术公司 | 电源模块总成和方法 |
CN106058952A (zh) * | 2015-04-15 | 2016-10-26 | 福特全球技术公司 | 车辆电源模块组件及歧管 |
CN106042889A (zh) * | 2015-04-15 | 2016-10-26 | 福特全球技术公司 | 用于车辆的电源模块总成 |
CN106467035A (zh) * | 2015-08-19 | 2017-03-01 | 福特全球技术公司 | 电力电子系统 |
CN107134458A (zh) * | 2016-02-26 | 2017-09-05 | 三星电子株式会社 | 包括堆叠电极的半导体装置 |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FI20116054L (fi) * | 2011-10-26 | 2013-04-27 | John Deere Forestry Oy | Menetelmä energiansyötön järjestämiseksi ja energiansyöttölaite |
DE112012005472T5 (de) * | 2011-12-26 | 2014-09-11 | Mitsubishi Electric Corporation | Elektrische Leistungs-Halbleitervorrichtung und Verfahren zu deren Herstellung |
JP5655846B2 (ja) * | 2012-12-04 | 2015-01-21 | 株式会社デンソー | 電力変換装置 |
EP2887787A3 (en) * | 2013-12-13 | 2015-08-19 | Hitachi, Ltd. | Cooling structure for heating element and power converter |
JP6187448B2 (ja) * | 2014-12-24 | 2017-08-30 | トヨタ自動車株式会社 | 積層ユニット |
US10123465B2 (en) * | 2015-04-15 | 2018-11-06 | Ford Global Technologies, Llc | Power-module assembly |
US9941234B2 (en) | 2015-05-28 | 2018-04-10 | Ut-Battelle, Llc | Integrated packaging of multiple double sided cooling planar bond power modules |
DK3206468T3 (en) * | 2016-02-15 | 2019-04-01 | Siemens Ag | DC converter with DC voltage |
US9950628B2 (en) | 2016-03-09 | 2018-04-24 | Ford Global Technologies, Llc | Power-module assembly with dummy module |
US10017073B2 (en) | 2016-03-09 | 2018-07-10 | Ford Global Technologies, Llc | Coolant channels for power module assemblies |
US9961808B2 (en) * | 2016-03-09 | 2018-05-01 | Ford Global Technologies, Llc | Power electronics system |
US9955613B2 (en) * | 2016-09-13 | 2018-04-24 | Denso International America, Inc. | Cooler and power electronic module having the same |
JP6859860B2 (ja) * | 2017-06-13 | 2021-04-14 | 株式会社デンソー | 電力変換装置、及びその製造方法 |
US11317546B2 (en) * | 2018-06-26 | 2022-04-26 | Ford Global Technologies, Llc | Vehicle power module assembly |
CN112997308B (zh) * | 2018-11-12 | 2023-10-31 | 三菱电机株式会社 | 半导体装置及半导体装置的制造方法 |
KR102346767B1 (ko) * | 2020-05-29 | 2022-01-04 | 효성중공업 주식회사 | 직접 접촉식 방열 장치 |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001237368A (ja) * | 2000-02-21 | 2001-08-31 | Mitsubishi Electric Corp | パワーモジュール |
US20040012083A1 (en) * | 2002-06-19 | 2004-01-22 | Brian Farrell | Electronic and optoelectronic component packaging technique |
US20050030717A1 (en) * | 2003-08-06 | 2005-02-10 | Denso Corporation | Cooler for cooling electric part |
US20050259402A1 (en) * | 2004-05-18 | 2005-11-24 | Denso Corporation | Power stack |
CN1790691A (zh) * | 2004-11-11 | 2006-06-21 | 株式会社电装 | 半导体装置 |
US20070085197A1 (en) * | 2005-10-13 | 2007-04-19 | Denso Corporation | Semiconductor insulation structure |
US20080239663A1 (en) * | 2007-03-27 | 2008-10-02 | Denso Corporation | Cooling device for electronic component and power converter equipped with the same |
US20090146293A1 (en) * | 2004-11-24 | 2009-06-11 | Danfoss Silicon Power Gmbh | Flow distribution module and a stack of flow distribution modules |
US20090213547A1 (en) * | 2005-10-07 | 2009-08-27 | Jurgen Schulz-Harder | Electrical Module |
US20090224398A1 (en) * | 2008-03-04 | 2009-09-10 | Denso Corporation | Semiconductor module and method of manufacturing the same |
US20090251859A1 (en) * | 2003-08-21 | 2009-10-08 | Denso Corporation | Electronic power converter and mounting structure of semiconductor device |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FI88671C (fi) | 1984-02-01 | 1993-06-28 | Orion Yhtymae Oy | Roentgenfotograferingsanordning foer taenderna och hakorna |
JPS60179045U (ja) * | 1984-05-09 | 1985-11-28 | 日本電気株式会社 | チツプキヤリア型素子 |
JPH04225310A (ja) | 1990-12-27 | 1992-08-14 | Toomee:Kk | レーザ光切替装置 |
JPH04284661A (ja) | 1991-03-13 | 1992-10-09 | Toshiba Corp | 半導体装置 |
US5579207A (en) | 1994-10-20 | 1996-11-26 | Hughes Electronics | Three-dimensional integrated circuit stacking |
JP3417095B2 (ja) * | 1994-11-21 | 2003-06-16 | 富士通株式会社 | 半導体装置 |
JP2003110397A (ja) * | 2001-09-26 | 2003-04-11 | Murata Mfg Co Ltd | 表面実装型電子部品 |
JP4225310B2 (ja) * | 2004-11-11 | 2009-02-18 | 株式会社デンソー | 半導体装置 |
JP4300316B2 (ja) | 2005-02-15 | 2009-07-22 | 独立行政法人産業技術総合研究所 | 積層型集積回路装置 |
JP4699253B2 (ja) * | 2006-03-23 | 2011-06-08 | トヨタ自動車株式会社 | 冷却器 |
JP5627499B2 (ja) * | 2010-03-30 | 2014-11-19 | 株式会社デンソー | 半導体モジュールを備えた半導体装置 |
-
2011
- 2011-02-28 JP JP2011041854A patent/JP5206822B2/ja not_active Expired - Fee Related
- 2011-07-08 CN CN201110195686.0A patent/CN102315210B/zh not_active Expired - Fee Related
- 2011-07-08 US US13/178,824 patent/US8537551B2/en not_active Expired - Fee Related
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001237368A (ja) * | 2000-02-21 | 2001-08-31 | Mitsubishi Electric Corp | パワーモジュール |
US20040012083A1 (en) * | 2002-06-19 | 2004-01-22 | Brian Farrell | Electronic and optoelectronic component packaging technique |
US20050030717A1 (en) * | 2003-08-06 | 2005-02-10 | Denso Corporation | Cooler for cooling electric part |
US20090251859A1 (en) * | 2003-08-21 | 2009-10-08 | Denso Corporation | Electronic power converter and mounting structure of semiconductor device |
US20050259402A1 (en) * | 2004-05-18 | 2005-11-24 | Denso Corporation | Power stack |
CN1790691A (zh) * | 2004-11-11 | 2006-06-21 | 株式会社电装 | 半导体装置 |
US20090146293A1 (en) * | 2004-11-24 | 2009-06-11 | Danfoss Silicon Power Gmbh | Flow distribution module and a stack of flow distribution modules |
US20090213547A1 (en) * | 2005-10-07 | 2009-08-27 | Jurgen Schulz-Harder | Electrical Module |
US20070085197A1 (en) * | 2005-10-13 | 2007-04-19 | Denso Corporation | Semiconductor insulation structure |
US20080239663A1 (en) * | 2007-03-27 | 2008-10-02 | Denso Corporation | Cooling device for electronic component and power converter equipped with the same |
US20090224398A1 (en) * | 2008-03-04 | 2009-09-10 | Denso Corporation | Semiconductor module and method of manufacturing the same |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106042951A (zh) * | 2015-04-15 | 2016-10-26 | 福特全球技术公司 | 电源模块组件及歧管 |
CN106042949A (zh) * | 2015-04-15 | 2016-10-26 | 福特全球技术公司 | 电源模块总成和方法 |
CN106058952A (zh) * | 2015-04-15 | 2016-10-26 | 福特全球技术公司 | 车辆电源模块组件及歧管 |
CN106042889A (zh) * | 2015-04-15 | 2016-10-26 | 福特全球技术公司 | 用于车辆的电源模块总成 |
CN106042889B (zh) * | 2015-04-15 | 2020-12-15 | 福特全球技术公司 | 用于车辆的电源模块总成 |
CN106058952B (zh) * | 2015-04-15 | 2021-03-09 | 福特全球技术公司 | 车辆电源模块组件及歧管 |
CN106042951B (zh) * | 2015-04-15 | 2021-08-27 | 福特全球技术公司 | 电源模块组件及歧管 |
CN106467035A (zh) * | 2015-08-19 | 2017-03-01 | 福特全球技术公司 | 电力电子系统 |
CN107134458A (zh) * | 2016-02-26 | 2017-09-05 | 三星电子株式会社 | 包括堆叠电极的半导体装置 |
CN107134458B (zh) * | 2016-02-26 | 2023-10-24 | 三星电子株式会社 | 包括堆叠电极的半导体装置 |
Also Published As
Publication number | Publication date |
---|---|
CN102315210B (zh) | 2014-03-12 |
JP2012033862A (ja) | 2012-02-16 |
JP5206822B2 (ja) | 2013-06-12 |
US8537551B2 (en) | 2013-09-17 |
US20120008282A1 (en) | 2012-01-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102315210B (zh) | 包括相互层叠的半导体封装体的半导体装置 | |
US9960096B2 (en) | Semiconductor device | |
US8461623B2 (en) | Power semiconductor module | |
JP6086863B2 (ja) | 半導体モジュール | |
CN103430307B (zh) | 半导体装置及其制造方法 | |
US11961780B2 (en) | Semiconductor module, power conversion device, and manufacturing method of semiconductor module | |
JP6137334B2 (ja) | 電力変換装置 | |
US11469160B2 (en) | Power module with active elements and intermediate electrode that connects conductors | |
US11244836B2 (en) | Semiconductor apparatus, power conversion device, and method for manufacturing semiconductor apparatus | |
CN105099252B (zh) | 功率半导体装置 | |
JP2020501380A (ja) | 電力用半導体モジュールの製造 | |
US11232994B2 (en) | Power semiconductor device having a distance regulation portion and power conversion apparatus including the same | |
KR20180129614A (ko) | 전자 장치 | |
JP7268563B2 (ja) | 半導体装置 | |
JP7153538B2 (ja) | パワー半導体モジュール、電力変換装置およびパワー半導体モジュールの製造方法 | |
US20180053744A1 (en) | Semiconductor device and a manufacturing method of the semiconductor device | |
CN109757119B (zh) | 半导体装置 | |
JP2016092970A (ja) | 電力変換モジュール | |
JP2006294973A (ja) | 半導体装置 | |
US10554145B2 (en) | Electrical power conversion apparatus | |
CN113508461A (zh) | 半导体装置 | |
CN111095545B (zh) | 半导体装置 | |
US20230187323A1 (en) | Semiconductor device | |
US20230063723A1 (en) | Semiconductor apparatus and manufacturing method for semiconductor apparatus | |
CN111095543B (zh) | 半导体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140312 Termination date: 20210708 |
|
CF01 | Termination of patent right due to non-payment of annual fee |