CN102306656A - 一种高压驱动电路的隔离结构 - Google Patents

一种高压驱动电路的隔离结构 Download PDF

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CN102306656A
CN102306656A CN201110242932A CN201110242932A CN102306656A CN 102306656 A CN102306656 A CN 102306656A CN 201110242932 A CN201110242932 A CN 201110242932A CN 201110242932 A CN201110242932 A CN 201110242932A CN 102306656 A CN102306656 A CN 102306656A
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CN102306656B (zh
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时龙兴
钱钦松
孙伟锋
祝靖
黄贤国
陆生礼
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Southeast University
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Abstract

一种高压驱动电路的隔离结构,包括:P型衬底,P型外延层,在P型外延层上有高压区、低压区以及高低压结终端区,在高低压结终端区与低压区之间为第一P型结隔离区,在高压区和低压区之间存在高压绝缘栅场效应管,其两侧以及它和高侧间的隔离结构为第二P型结隔离区,第二P型结隔离区的第二P型阱区浓度通过其中N型阱区的注入变化来达到从高压区到低压区逐渐降低,高压绝缘栅场效应管和高侧之间的第二P型结隔离区仅由第二P型阱区组成,第二P型结隔离区的设计是基于不同高压下P型结隔离区的完全耗尽以及开态下P型结隔离区的非穿通。本发明解决了P型结隔离结构不完全耗尽造成的P型结隔离结构发生局部击穿问题,使被隔离区与周围有效隔离。

Description

一种高压驱动电路的隔离结构
技术领域
本发明涉及高压功率集成电路中的高压半桥栅驱动电路,是一种关于集成高压驱动电路中的隔离结构。
背景技术
高压栅驱动电路可用于各种领域,如电机驱动、荧光灯中的电子整流器以及电源管理等。高压栅驱动电路中电平移位电路为整个电路的关键部分,组成电平移位电路的高压绝缘栅场效应管LDMOS的电学性能以及高压LDMOS间的电学耦合会影响移位电路的性能,高压LDMOS源端和漏端的大电流和大电压也会引起整个集成电路其他区域的寄生效应从而影响整个集成电路的电学性能,所以电平移位电路中高压LDMOS的电学性能以及高压LDMOS的隔离无疑是高压栅驱动电路性能及工艺研究的重要内容,高压集成电路中隔离结构的设计一直是高压集成电路设计的关键,然而隔离结构设计工艺上面临着耐压及泄露电流两大难点。高压集成电路是将新型高压功率器件、高低压逻辑控制电路以及保护电路集成在单一硅片上的电路,由于其系统上的优势:高可靠性和稳定性以及低功耗、体积、重量和成本,HVIC对实现家用电器、汽车电子等装置的小型化、智能化和节能化有着重要的意义。高压集成电路又可分为高侧电路、低侧电路以及高低结终端区,为防止高压电路对其周围电路的影响,高压功率器件和高压电路间的交叉影响以及器件之间的相互串扰,高压集成电路的隔离工艺是高压集成电路正常、有效工作的基础,也是形成高低压兼容工艺平台的关键组成部分。
电平移位电路中高压LDMOS间的隔离一直是半桥驱动电路研究关注的重点,现有半桥驱动芯片中已有多种隔离方式,在这些隔离方式中最为有效和突出的为仙童公司的美国专利US7655979中提到的高压栅驱动电路中隔离高压LDMOS的隔离方式,高压栅驱动电路包括高压区,低压区和高低压结终端区,高压LDMOS位于高压区和低压区之间并采用部分结终端区作为其漂移区,高低压结终端区与低压区之间、高压LDMOS与高、低压区之间、高压LDMOS和高低压结终端区之间均采用P型阱和P型埋层的对通隔离结构进行隔离,即整个高压LDMOS周围用P型阱和P型埋层的对通隔离结构把高压LDMOS和电路的其他部分隔离开来,此对通隔离是由外延上的P型阱和其下的P型埋层区对通构成的贯穿外延到衬底的P型结隔离实现,这样的对通隔离结构可以起到隔离高压LDMOS和周围其他部分电路的作用。然而,高压区接高压时,靠近高压区隔离部分的P型结隔离区可以完全耗尽,而远离高压区隔离部分的P型结隔离则不能完全耗尽, 从而发生局部击穿现象,使的整个隔离结构的耐压降低。
发明内容
本发明提供一种高压驱动电路的隔离结构,本发明解决了远离高压区的P型结隔离区不能完全耗尽造成的局部击穿问题,提高了隔离结构的耐压。
本发明采用如下技术方案:
一种高压驱动电路的隔离结构,包括:P型衬底,在P型衬底上设有P型外延层,在P型外延层上设有低压区和高压区,在低压区与高压区之间设有高低压结终端区,在高低压结终端区与低压区之间为第一P型结隔离区,所述的第一P型结隔离区由P型埋层及第一P型阱区组成,在第一P型结隔离区的内部区域设有第二P型结隔离区且第二P型结隔离区与第一P型结隔离区围合形成被隔离区域,在被隔离区域内设有利用高低压结终端区作为漂移区的高压绝缘栅场效应管,所述高压区的一部分位于被隔离区域内,位于被隔离区域内的部分高压区包括设在P型衬底内的第一深N型阱和设在P型外延层内的第一N-型阱区,且N-型阱区位于第一深N型阱的上表面上,位于被隔离区域外的部分高压区包括设在P型衬底内的第二深N型阱和设在P型外延层内的第二N-型阱区,且N-型阱区位于第二深N型阱的上表面上,所述的第一深N型阱向高低压结终端区延伸并进入高低压结终端区,所述的第二深N型阱向高低压结终端区延伸并进入高低压结终端区,其特征在于,第二P型结隔离区为设在P型外延层内的第二P型阱区且第二P型阱区设在P型衬底表面上,在位于高低压结终端区域内的第二P型结隔离区部分区域的第二P型阱区被N型阱区替代,且N型阱区位于P型外延上并被第二P型阱区包围,第二P型结隔离区的单位面积中的N型阱区的注入面积沿高压区指向低压区的方向逐渐增大。
用于高压驱动电路的隔离结构与现有工艺相兼容,且与现有其他隔离技术相比,本发明具有如下优点:
(1)传统结构中,被隔离区(高压绝缘栅场效应管)采用环形P型结隔离
区包围隔离,它与周围高低压结终端区的隔离均采用高浓度深P型阱隔离结构或采用对通的P型埋层和P型阱区的P型结隔离结构,即从高压区到低压区的所有隔离结构均采用相同浓度的P型结隔离结构,当高压区接高压时,高压电势沿漂移区逐渐降低,由于高压区电位很高所以靠近高压区的隔离部分P型结隔离结构可以完全耗尽,击穿电压很高(参考图10),然而随着漂移区的耐压,电势在漂移区逐渐降低导致远离高压区的隔离结构两侧电势不高而不能使P型结隔离结构完全耗尽,此处隔离结构容易发生局部击穿,最终导致整个隔离结构耐压降低。本发明中,在逐渐远离高压区的P型结隔离区中设置了变化注入窗口的N型阱区,从而达到第二P型阱区浓度沿高压区指向低压区方向逐渐降低,使不同电位下的P型结隔离结构都能够完全耗尽,提高了隔离结构的击穿电压,抑制了局部击穿现象的发生,使得被隔离部分与周围部分有效隔离。
(2)本发明中N型阱区的注入窗口灵活性很大,只需保证第二P型阱区浓
度从高压区到低压区逐渐降低,同时整个P型结隔离结构开态下不会发生穿通。
(3)本发明与现有工艺兼容,不增加额外的工艺步骤,制备简单。
附图说明
图1为本发明中的包含高压绝缘栅场效应管的高压栅驱动电路隔离结构示意图,其中150为高压横向绝缘栅场效应管;
图2为本发明隔离结构的第二种表现形式示意图;
图3为本发明隔离结构的第三种表现形式示意图;
图4为本发明隔离结构的第四种表现形式示意图;
图5为本发明隔离结构的第五种表现形式示意图;
图6为沿图1的I-I’线的横向剖面图,其中的隔离结构如140(a)且其下有N埋层;
图7为沿图1的II-II’线的横向剖面图,其中的隔离结构如140(a)且其下有N埋层,且此处为靠近低压区130的剖面图,隔离结构两侧没有深N型阱DN;
图8为隔离结构沿图1的III-III’线的横向剖面图,150为高压绝缘栅场效应管,包围高压绝缘栅场效应管的为隔离结构140(a)和140(b);
图9为隔离结构两侧加高压时,N型阱区隔离结构的等势线示意图,图中可见,P型结隔离区完全耗尽,图中虚线为耗尽区边界;
图10为隔离结构两侧加高压时,无N埋层区隔离结构的等势线示意图,图中可见,P型结隔离区完全耗尽,其中,虚线100为耗尽区边界,实线101为等势线。
具体实施方式
实施例1
一种高压驱动电路的隔离结构,包括:P型衬底1,在P型衬底1上设有P型外延层2,在P型外延层2上设有低压区130和高压区110,在低压区130与高压区110之间设有高低压结终端区120,在高低压结终端区120与低压区130之间为第一P型结隔离区140a,所述的第一P型结隔离区140a由P型埋层4及第一P型阱区71组成,在第一P型结隔离区140a的内部区域设有第二P型结隔离区140b且第二P型结隔离区140b与第一P型结隔离区140a围合形成被隔离区域,在被隔离区域内设有利用高低压结终端区120作为漂移区的高压绝缘栅场效应管150,所述高压区110的一部分位于被隔离区域内,位于被隔离区域内的部分高压区110包括设在P型衬底1内的第一深N型阱31和设在P型外延层2内的第一N-型阱区61,且N-型阱区61位于第一深N型阱31的上表面上,位于被隔离区域外的部分高压区110包括设在P型衬底1内的第二深N型阱32和设在P型外延层2内的第二N-型阱区62,且N-型阱区62位于第二深N型阱(32)的上表面上,所述的第一深N型阱31向高低压结终端区120延伸并进入高低压结终端区120,所述的第二深N型阱32向高低压结终端区120延伸并进入高低压结终端区120,其特征在于,第二P型结隔离区140b为设在P型外延层2内的第二P型阱区72且第二P型阱区72设在P型衬底1表面上,在位于高低压结终端区120区域内的第二P型结隔离区140b部分区域的第二P型阱区72被N型阱区5替代,且N型阱区5位于P型外延2上并被第二P型阱区72包围,第二P型结隔离区140b的单位面积中的N型阱区5的注入面积沿高压区110指向低压区130的方向逐渐增大。所述N型阱区5的注入窗口为成行且间隔排列的矩形(参照图1),沿高压区110指向低压区130方向,N型阱区5注入窗口的大小不变但N型阱区5注入窗口的间距却逐渐缩小。通过变化间距的等大小矩形注入窗口的N型阱区5来达到第二P型结隔离区140b单位面积中N型阱区5的注入面积沿高压区110指向低压区130的方向逐渐增大,从而使第二P型阱区72的浓度沿高压区110指向低压区130方向逐渐降低。浓度逐渐降低的第二P型阱区72能在高压下完全耗尽,防止局部击穿现象的发生使隔离结构耐压提高。
实施例2
一种高压驱动电路的隔离结构,包括:P型衬底1,在P型衬底1上设有P型外延层2,在P型外延层2上设有低压区130和高压区110,在低压区130与高压区110之间设有高低压结终端区120,在高低压结终端区120与低压区130之间为第一P型结隔离区140a,所述的第一P型结隔离区140a由P型埋层4及第一P型阱区71组成,在第一P型结隔离区140a的内部区域设有第二P型结隔离区140b且第二P型结隔离区140b与第一P型结隔离区140a围合形成被隔离区域,在被隔离区域内设有利用高低压结终端区120作为漂移区的高压绝缘栅场效应管150,所述高压区110的一部分位于被隔离区域内,位于被隔离区域内的部分高压区110包括设在P型衬底1内的第一深N型阱31和设在P型外延层2内的第一N-型阱区61,且N-型阱区61位于第一深N型阱31的上表面上,位于被隔离区域外的部分高压区110包括设在P型衬底1内的第二深N型阱32和设在P型外延层2内的第二N-型阱区62,且N-型阱区62位于第二深N型阱(32)的上表面上,所述的第一深N型阱31向高低压结终端区120延伸并进入高低压结终端区120,所述的第二深N型阱32向高低压结终端区120延伸并进入高低压结终端区120,其特征在于,第二P型结隔离区140b为设在P型外延层2内的第二P型阱区72且第二P型阱区72设在P型衬底1表面上,在位于高低压结终端区120区域内的第二P型结隔离区140b部分区域的第二P型阱区72被N型阱区5替代,且N型阱区5位于P型外延2上并被第二P型阱区72包围,第二P型结隔离区140b的单位面积中的N型阱区5的注入面积沿高压区110指向低压区130的方向逐渐增大。所述N型阱区5的注入窗口为成行且连续排列的矩形(参照图2),沿高压区110指向低压区130方向,N型阱区5注入窗口逐渐变窄。通过逐渐变窄的成行且连续排列的矩形注入窗口的N型阱区来达到第二P型结隔离区140b单位面积中N型阱区5的注入面积沿高压区110指向低压区130的方向逐渐增大,从而使第二P型阱区72的浓度沿高压区110指向低压区130方向逐渐降低。浓度逐渐降低的第二P型阱区72能在高压下完全耗尽,防止局部击穿现象的发生使隔离结构耐压提高。
实施例3
一种高压驱动电路的隔离结构,包括:P型衬底1,在P型衬底1上设有P型外延层2,在P型外延层2上设有低压区130和高压区110,在低压区130与高压区110之间设有高低压结终端区120,在高低压结终端区120与低压区130之间为第一P型结隔离区140a,所述的第一P型结隔离区140a由P型埋层4及第一P型阱区71组成,在第一P型结隔离区140a的内部区域设有第二P型结隔离区140b且第二P型结隔离区140b与第一P型结隔离区140a围合形成被隔离区域,在被隔离区域内设有利用高低压结终端区120作为漂移区的高压绝缘栅场效应管150,所述高压区110的一部分位于被隔离区域内,位于被隔离区域内的部分高压区110包括设在P型衬底1内的第一深N型阱31和设在P型外延层2内的第一N-型阱区61,且N-型阱区61位于第一深N型阱31的上表面上,位于被隔离区域外的部分高压区110包括设在P型衬底1内的第二深N型阱32和设在P型外延层2内的第二N-型阱区62,且N-型阱区62位于第二深N型阱(32)的上表面上,所述的第一深N型阱31向高低压结终端区120延伸并进入高低压结终端区120,所述的第二深N型阱32向高低压结终端区120延伸并进入高低压结终端区120,其特征在于,第二P型结隔离区140b为设在P型外延层2内的第二P型阱区72且第二P型阱区72设在P型衬底1表面上,在位于高低压结终端区120区域内的第二P型结隔离区140b部分区域的第二P型阱区72被N型阱区5替代,且N型阱区5位于P型外延2上并被第二P型阱区72包围,第二P型结隔离区140b的单位面积中的N型阱区5的注入面积沿高压区110指向低压区130的方向逐渐增大。所述N型阱区5的注入窗口为三角形(参照图3),沿高压区110指向低压区130方向,N型阱区5注入窗口为三角形。通过三角形注入窗口的N型阱区5来达到第二P型结隔离区140b单位面积中N型阱区5的注入面积沿高压区110指向低压区130的方向逐渐增大,从而使第二P型阱区72的浓度沿高压区110指向低压区130方向逐渐降低。浓度逐渐降低的第二P型阱区72能在高压下完全耗尽,防止局部击穿现象的发生使隔离结构耐压提高。
实施例4
一种高压驱动电路的隔离结构,包括:P型衬底1,在P型衬底1上设有P型外延层2,在P型外延层2上设有低压区130和高压区110,在低压区130与高压区110之间设有高低压结终端区120,在高低压结终端区120与低压区130之间为第一P型结隔离区140a,所述的第一P型结隔离区140a由P型埋层4及第一P型阱区71组成,在第一P型结隔离区140a的内部区域设有第二P型结隔离区140b且第二P型结隔离区140b与第一P型结隔离区140a围合形成被隔离区域,在被隔离区域内设有利用高低压结终端区120作为漂移区的高压绝缘栅场效应管150,所述高压区110的一部分位于被隔离区域内,位于被隔离区域内的部分高压区110包括设在P型衬底1内的第一深N型阱31和设在P型外延层2内的第一N-型阱区61,且N-型阱区61位于第一深N型阱31的上表面上,位于被隔离区域外的部分高压区110包括设在P型衬底1内的第二深N型阱32和设在P型外延层2内的第二N-型阱区62,且N-型阱区62位于第二深N型阱(32)的上表面上,所述的第一深N型阱31向高低压结终端区120延伸并进入高低压结终端区120,所述的第二深N型阱32向高低压结终端区120延伸并进入高低压结终端区120,其特征在于,第二P型结隔离区140b为设在P型外延层2内的第二P型阱区72且第二P型阱区72设在P型衬底1表面上,在位于高低压结终端区120区域内的第二P型结隔离区140b部分区域的第二P型阱区72被N型阱区5替代,且N型阱区5位于P型外延2上并被第二P型阱区72包围,第二P型结隔离区140b的单位面积中的N型阱区5的注入面积沿高压区110指向低压区130的方向逐渐增大。所述N型阱区5的注入窗口为成行且间隔排列的圆形(参照图4、图5),沿高压区指向低压区方向,N型阱区5的注入窗口为成行且间隔排列的圆形。通过变化间距的等大小圆形形或等间距的逐渐增大的圆形注入窗口的N型阱区5来达到第二P型结隔离区140b单位面积下N型阱区5的注入面积沿高压区110指向低压区130的方向逐渐增大,从而使第二P型阱区72的浓度沿高压区110指向低压区130方向逐渐降低。浓度逐渐降低的第二P型阱区72能在高压下完全耗尽,防止局部击穿现象的发生使隔离结构耐压提高。
所述高压驱动电路的隔离结构制备方法如下:
第一步:P型硅衬底1准备;生长氧化层、淀积氮化硅、光刻、离子注入磷、退火生成深N型阱区31和32;去掉氮化硅,光刻、离子注入硼、退火生成p型埋层4;
第二步:生长P型外延层2;生长氧化层、淀积氮化硅,光刻、离子注入磷、、退火形成N-型阱区61和62,光刻、离子注入磷、退火形成N型阱区5,此时在N-阱61和62和N型阱区5表面了生成5000?的氧化层。
第三步:刻蚀所有氮化硅普注硼离子、退火生成P型结隔离阱区71和72;
第四步:去掉上述5000?的氧化层;淀积氮化硅、刻蚀氮化硅、生长场氧,形成场区和有源区;
第五步:在有源区生长一层厚度为1000?的栅氧化层,离子注入氟化硼阈值调整,然后进行多晶硅栅的淀积、刻蚀;
第六步:光刻、离子注入磷和砷生成N型源区9和N型漏区8;光刻、离子注入氟化硼生成P型接触区10;淀积介质隔离氧化层,接触孔刻蚀,淀积金属铝,刻蚀铝以形成金属连线,最后进行介质钝化处理。

Claims (5)

1.一种高压驱动电路的隔离结构,包括:P型衬底(1),在P型衬底(1)上设有P型外延层(2),在P型外延层(2)上设有低压区(130)和高压区(110),在低压区(130)与高压区(110)之间设有高低压结终端区(120),在高低压结终端区(120)与低压区(130)之间为第一P型结隔离区(140a),所述的第一P型结隔离区(140a)由P型埋层(4)及第一P型阱区(71)组成,在第一P型结隔离区(140a)的内部区域设有第二P型结隔离区(140b)且第二P型结隔离区(140b)与第一P型结隔离区(140a)围合形成被隔离区域,在被隔离区域内设有利用高低压结终端区(120)作为漂移区的高压绝缘栅场效应管(150),所述高压区(110)的一部分位于被隔离区域内,位于被隔离区域内的部分高压区(110)包括设在P型衬底(1)内的第一深N型阱(31)和设在P型外延层(2)内的第一N-型阱区(61),且N-型阱区(61)位于第一深N型阱(31)的上表面上,位于被隔离区域外的部分高压区(110)包括设在P型衬底(1)内的第二深N型阱(32)和设在P型外延层(2)内的第二N-型阱区(62),且N-型阱区(62)位于第二深N型阱(32)的上表面上,所述的第一深N型阱(31)向高低压结终端区(120)延伸并进入高低压结终端区(120),所述的第二深N型阱(32)向高低压结终端区(120)延伸并进入高低压结终端区(120),其特征在于,第二P型结隔离区(140b)为设在P型外延层(2)内的第二P型阱区(72)且第二P型阱区(72)设在P型衬底(1)表面上,在位于高低压结终端区(120)区域内的第二P型结隔离区(140b)部分区域的第二P型阱区(72)被N型阱区(5)替代,且N型阱区(5)位于P型外延(2)上并被第二P型阱区(72)包围,第二P型结隔离区(140b)的单位面积中的N型阱区(5)的注入面积沿高压区(110)指向低压区(130)的方向逐渐增大。
2.根据权利要求1所述的高压驱动电路的隔离结构,其特征在于,N型阱区(5)的注入窗口为成行且间隔排列的矩形。
3.根据权利要求1所述的高压驱动电路的隔离结构,其特征在于,N型阱区(5)的注入窗口为成行且连续排列的矩形。
4.根据权利要求1所述的高压驱动电路的隔离结构,其特征在于,N型阱区(5)的注入窗口为三角形。
5.根据权利要求1所述的高压驱动电路的隔离结构,其特征在于,N型阱区(5)的注入窗口为成行且间隔排列的圆形。
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