CN102254876A - 半导体装置及半导体装置单元 - Google Patents
半导体装置及半导体装置单元 Download PDFInfo
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- CN102254876A CN102254876A CN2011100530536A CN201110053053A CN102254876A CN 102254876 A CN102254876 A CN 102254876A CN 2011100530536 A CN2011100530536 A CN 2011100530536A CN 201110053053 A CN201110053053 A CN 201110053053A CN 102254876 A CN102254876 A CN 102254876A
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Abstract
提供一种半导体装置,具备能够尽可能防止凸点从金属层大大溢出的结构。如下构成:包括:基板(12);多个电极焊盘(20),被形成在基板(12)上;以及保护膜(14),被形成得具有与各电极焊盘(20)对应而开设的贯通孔(16),覆盖电极焊盘(20)的周缘部及基板(12);贯通孔(16)的内壁被形成为向贯通孔(16)的外侧倾斜的斜面(22);在电极焊盘(20)的经由贯通孔(16)从保护膜(14)露出的露出面、及到贯通孔(16)的斜面(22)的中途而形成金属层(24);凸点(18)被接合在金属层(22)上。
Description
相关申请的交叉引用
本申请基于2010年5月21日提交的日本专利申请No.2010-116946号并要求其优先权,其全部内容以引用的方式并入于此。
技术领域
本发明涉及半导体装置及半导体装置单元,涉及例如具有由凸点(バンプ)构成的端子的、以CSP(Chip Size Package,Chip Scale Package,芯片尺寸封装)为代表的小型半导体封装等的半导体装置等。
背景技术
CSP具有如下而成的结构:在内部包括多个晶体管等半导体元件(未图示)的硅(Si)基板的单面形成多个电极焊盘(electrode pad),按每个该电极焊盘而连接凸点作为外部端子(专利文献1等)。
CSP在一个凸点处的局部剖视图示于图12(a)。
如图12(a)所示,在Si基板200的单面上,形成了电极焊盘202。此外,以覆盖Si基板200及电极焊盘202的周缘部的方式而形成了由氮化硅(Si3N4)构成的保护膜204,覆盖从保护膜204露出的电极焊盘202表面、及到保护膜204的开口周缘部地形成了由凸点下阻挡金属(アンダ一バリアメタル,UBM)构成的金属层206。并且,在金属层206上接合了凸点208。
凸点208向金属层206的接合例如按如下方式进行。
即,在金属层的表面涂敷了焊剂(フラツクス)后,作为凸点材料而在该涂敷面载放例如由Sn-Ag类无铅焊料构成的焊球,通过回流(リフロ一)而熔融焊球的一部分,从而实现凸点208向金属层206的接合。
【现有技术文献】
【专利文献】
【专利文献1】(日本)特开2004-228200号公报
【专利文献2】(日本)特开2006-12952号公报
【专利文献3】(日本)特开2008-192859号公报
此时,正常的凸点如图12(a)所示,以从金属层206的周缘凸起的形状形成,但是有时,如图12(b)所示,凸点从金属层206溢出,成为沿横向(沿基板的面的方向)膨胀的形状从而成为不良。
如果存在这种不良凸点,则在将CSP安装到其他安装基板等的情况下,发生邻接凸点之间接触这一问题。特别是随着装有CSP的手机、数码摄像机等便携电子设备近年小型化,CSP进一步小型化,因此凸点的布置间隔也更加狭小化,在此现状下,上述问题特别显著。
这里,为了使得凸点不从金属层溢出,可以将凸点(凸点材料)做小,但是如果那样,则在将那样制作的CSP安装到其他安装基板(经由凸点而接合)时,不能得到足够的接合力,或者不能得到足够的导电性。
另外,上述问题不限于CSP,在BGA(Ball Grid Array,球栅阵列)等在基板单面设有多个凸点的半导体装置中普遍会发生上述问题。
发明内容
本发明的目的在于鉴于上述技术问题,提供一种半导体装置,具备能够尽可能防止凸点从金属层大大溢出的结构。此外,本发明目的在于提供具有这种半导体装置的半导体装置单元。
为了实现上述目的,本发明的半导体装置的特征在于,包括:基板;多个电极焊盘,被形成在上述基板上;以及保护膜,具有与各电极焊盘对应而开设的贯通孔,并形成为覆盖电极焊盘的周缘部及上述基板;上述贯通孔的内壁被形成为倾斜的斜面,使得离对应的电极焊盘越远则该贯通孔越开阔;覆盖上述电极焊盘的经由上述贯通孔从上述保护膜露出的露出面以及上述贯通孔的上述斜面的中途而形成金属层;该金属层接合有凸点。
此外,其特征在于,离上述电极焊盘越远则上述斜面相对于该电极焊盘的倾斜角越大。
或者,其特征在于,上述保护膜具有从上述基板侧起按第1层、第2层的顺序层叠的双层构造;与第2层对应的上述斜面部分相对于上述电极 焊盘的倾斜角,大于与第1层对应的上述斜面部分相对于上述电极焊盘的倾斜角。
在此情况下,其特征在于,第2层的贯通孔部分的直径大于上述第1层的贯通孔部分的直径,上述斜面被形成为阶梯状。
此外,其特征在于,上述金属层的周缘位于上述第1层的厚度方向中途。
此外,其特征在于,上述金属层的周缘位于上述第1层的顶面。
再者,其特征在于,上述多个电极焊盘被排列为矩阵状。
此外,其特征在于,从上述电极焊盘到上述斜面的中途,离上述电极焊盘越远则上述斜面相对于上述电极焊盘的倾斜角越大。
在此情况下,其特征在于,从上述斜面的中途到上述保护膜的表面部,离上述电极焊盘越远则上述斜面相对于上述电极焊盘的倾斜角越小。
为了实现上述目的,本发明的半导体装置单元的特征在于,在安装基板安装了上述半导体装置。
发明效果
通过由上述结构构成的半导体装置,保护膜的贯通孔的内壁被形成为斜面,凸点所接合的金属层被形成到上述斜面的中途(日语:中程),所以例如在将凸点材料搭载到金属层、用回流将该凸点材料接合到金属层时,即使凸点材料熔融而要溢出金属层,也被保护膜的上述斜面阻止,所以能够尽可能防止形成的凸点大大溢出金属层的情况。
附图说明
图1(a)是第1实施方式的半导体装置的立体图,图1(b)是其俯视图。
图2是图1(b)中的A·A线剖视图。
图3是表示第1实施方式的半导体装置的制造工序的一部分的图。
图4是表示第1实施方式的半导体装置的制造工序的一部分的图。
图5(a)、图5(b)、图5(c)分别是第2实施方式的第1~第3实施例的半导体装置在包含凸点的位置处切断的局部剖视图。
图6(a)、图6(b)、图6(c)、图6(d)分别是第3实施方式的第1~ 第4实施例的半导体装置在包含凸点的位置处切断的局部剖视图。
图7(a)、图7(b)、图7(c)分别是第4实施方式的第1~第3实施例的半导体装置在包含凸点的位置处切断的局部剖视图。
图8(a)、图8(b)、图8(c)分别是第5实施方式的第1~第3实施例的半导体装置在包含凸点的位置处切断的局部剖视图。
图9(a)、图9(b)、图9(c)分别是第6实施方式的第1~第3实施例的半导体装置在包含凸点的位置处切断的局部剖视图。
图10(a)、图10(b)、图10(c)分别是用于示出第3实施方式的第1~第3实施例的半导体装置的凸点所用的凸点材料的另一个例子的局部剖视图。
图11是第8实施方式的半导体装置单元的局部剖视图。
图12(a)是现有的半导体装置中的、良好凸点的示例图,图12(b)是现有的半导体装置中的、不良凸点的示例图。
具体实施方式
以下,参照附图来说明本发明的半导体装置的实施方式。其中,在所有图中,各构件间的尺度未统一。
<第1实施方式>
图1(a)是第1实施方式的半导体装置10的立体图,图1(b)是其俯视图。半导体装置10是CSP型半导体封装。
半导体装置10具有内部包括多个晶体管等半导体元件(未图示)的硅(Si)基板12(以下简称“基板12”。)。基板12的尺寸例如是8×8mm。
在基板12的一个主面上,形成了保护膜14。保护膜14例如由氮化硅(Si3N4)构成。在保护膜14中,以例如4行4列的矩阵状开设了后述贯通孔16A~16P,凸点18A~18P分别从贯通孔16A~16P突出。因此,多个(在本例中为16个)凸点也排列为矩阵(行列)状。凸点18A~18P的布置间隔例如是160μm。另外,贯通孔16A~16P都是同样的结构,并且凸点18A~18P都是同样的结构,所以在无需区别的情况下,省略拉丁字母标号,只附数字标号来表示(贯通孔16、凸点18)。
图2示出图1(b)中的A·A线剖视图。
如图2所示,在基板12的主表面上,隔着未图示的层间绝缘膜,形成了电极焊盘20。电极焊盘20例如由铝(Al)构成。另外,上述层间绝缘膜(未图示)被形成在基板12的整个单侧主表面上。
保护膜14被形成得具有与电极焊盘20对应而开设的贯通孔16、且覆盖电极焊盘20的周缘部及基板12。贯通孔16的内壁22被形成为向贯通孔16的外侧倾斜的斜面22。斜面22相对于电极焊盘20的倾斜角α待后述。
在电极焊盘20从保护膜14露出的露出面、及从该露出面到斜面22的中途,形成了作为凸点下阻挡金属(UBM)层的金属层24。金属层24例如由镍(Ni)构成。
在金属层24上,接合了凸点18。凸点18例如由Sn-Ag类无铅焊料构成。另外,不限于Sn-Ag类无铅焊料,也可以是Sn-Cu类、Sn-Cu-Ni类等。
这里,如果形成为金属层24和凸点18这2相在保护膜14的斜面22上相接的构造,则凸点形状的偏差降低,所以是优选的,但是并不限于此。
参照图3、图4来说明具有上述结构的半导体装置10的制造方法。
在切割前的晶片1012(工序A)的单面形成作为保护膜14(图1)的氮化硅膜1014。氮化硅膜1014利用CMP(Chemical and Mechanical Polishing,化学机械研磨)而被平坦化(工序B)。
用掩模材料2002进行覆盖,使得氮化硅膜1014中的贯通孔16预定开设区域露出,而覆盖其他区域(工序C)。
然后,通过采用热磷酸(H3PO4)等药液的湿式蚀刻法,蚀刻氮化硅膜1014的一部分,形成贯通孔16(工序D)。此时,蚀刻各向同性地进行,所以通过侧面蚀刻效应(side etching effect),贯通孔16的内壁22被形成为向贯通孔16的外侧倾斜的斜面22。斜面22相对于电极焊盘20的倾斜角α的大小,例如可以通过依次适用开口直径不同的多个掩模材料等方式来进行调整。
接着,除去掩模材料2002后,重新形成使金属层24(图2)的预定形成区域露出、而覆盖其他区域的掩模材料2004后,通过溅射(スパツタリング)或蒸镀来形成金属层24(工序E)。
除去掩模材料2004后,通过印刷而向贯通孔16中填充粘着性焊剂 2006,在金属层24上搭载呈球形的凸点材料1018(工序G)。凸点材料由Sn-Ag类无铅焊料构成。此外,凸点材料1018的直径是0.07mm~0.125mm左右的大小。另外,不限于Sn-Ag类无铅焊料,也可以是Sn-Cu类、Sn-Cu-Ni类等。
接着,通过回流,使凸点材料1018成为半熔融状态,从而凸点材料1018在其下部由于自重而沿金属层24表面慢慢平坦化。即,凸点材料1018最初处于近乎与金属层24点接触的状态,但变为面接触且其接触面慢慢扩大。此时,由于在保护膜14的斜面22上形成了金属层24的周缘部,所以上述扩大由于(倾斜的)该周缘部而被阻止,能够尽可能防止凸点18从金属层24溢出地形成。此外,即使万一从金属层24溢出而扩大,由于与金属层24相连的保护膜14也倾斜(斜面22),所以最终阻止凸点材料1018扩大。其结果是,凸点材料1018不会超过保护膜14的斜面22地扩大,其接触面仅限于贯通孔16内。
因此,与以往那样金属层206的周缘部是平坦(水平)的、与其相连的保护膜204也是平坦(水平)的(图12)、没有防止凸点材料扩大的手段的情况相比,能够防止凸点过度扁平化。由此,在将半导体装置10安装到其他安装基板等的情况下,能够尽可能防止邻接凸点之间接触这一问题。
斜面22相对于电极焊盘20的倾斜角α只要低于90度即可,但是优选是15度以上75度以下的范围。此外,更优选的是30度以上60度以下的范围。
<第2实施方式>
图5示出第2实施方式的半导体装置在包含凸点的位置处切断的局部剖视图。图5(a)示出第2实施方式的第1实施例的半导体装置26,图5(b)示出第2实施例的半导体装置28,图5(c)示出第3实施例的半导体装置30。
第1~第3实施例在下述点上是共通的,即在将贯通孔34的内壁36形成为斜面的保护膜32的下层还形成了保护膜38。此外,保护膜38与保护膜32同样,在与电极焊盘20对应的位置开设了贯通孔,保护膜38覆盖电极焊盘20的周缘部。这样,通过还设置保护膜38,来强化对电极焊盘20的周缘部及基板12的保护。
半导体装置26(图5(a))、半导体装置28(图5(b))是保护膜32的贯通孔34的直径比保护膜38的贯通孔的直径小、从而保护膜38的包含开口缘部在内的整体埋没于保护膜32的例子;与之相反,半导体装置30(图5(c))是保护膜32的贯通孔34的直径比保护膜38的贯通孔的直径大、从而保护膜38的开口周缘部从保护膜32露出的例子。
不管怎样,保护膜32的贯通孔34的内壁36与实施方式1同样,被形成为斜面,所以能得到尽可能防止凸点18从金属层24、40溢出这一效果。
另外,金属层24与实施方式1同样,是通过溅射或蒸镀形成的。金属层40是镀成的。
<第3实施方式>
图6示出第3实施方式的半导体装置在包含凸点的位置处切断的局部剖视图。图6(a)示出第3实施方式的第1实施例的半导体装置42,图6(b)示出第2实施例的半导体装置44,图6(c)示出第3实施例的半导体装置46,图6(d)示出第4实施例的半导体装置47。
第3实施方式的第1~第3实施例的半导体装置42、44、46与第2实施方式的第1~第3实施例的半导体装置26、28、30分别除了保护膜的结构不同以外,基本上相同。此外,第3实施方式的第4实施例的半导体装置47与第2实施方式的第1实施例的半导体装置26除了保护膜的结构不同以外,基本上相同。因此,在图6中对与图5同样的构成部分附以同一标号并省略其说明,以不同的部分为中心进行说明。
半导体装置26、28、30(图5)中的保护膜32中开设的贯通孔34的内壁36是大致锥面状(斜度大致固定),与此相对,在第3实施方式中,贯通孔50的内壁的倾斜角被形成为根据离基板12的距离而变化的曲面形状。
具体地说,第3实施方式的第1~第3实施例的半导体装置42、44、46的保护膜48中开设的贯通孔50的内壁52被形成为,离基板12(电极焊盘20)越远、则其倾斜角越大(斜度越陡)的曲面形状。
通过这种结构,即使在凸点材料1018(图4)从金属层24、40溢出的情况下,也能利用与金属层24、40的周缘部相比具有大的倾斜角度的内壁52部分,来更加有效地阻止凸点材料1018(图4)扩大。
其中,保护膜48由聚酰亚胺构成,将贯通孔侧壁先形成为大致锥面状后,通过对该侧壁部分进行灰化(アツシング),能够形成为上述曲面形状。
此外,在第3实施方式的第4实施例的半导体装置47中,如图6(d)所示,保护膜48中开设的贯通孔50的内壁52被形成为曲面形状,使得离基板12越远,则其倾斜角越大(斜度越陡),并且,被形成得使得在远离金属层24端部的保护膜48表面附近,该倾斜角变小(斜度变缓)。即,构成为,使得斜面22相对于电极焊盘20的倾斜角在从电极焊盘20到斜面22的中途,离电极焊盘20越远则越大;斜面52相对于电极焊盘20的倾斜角在从斜面20的中途到保护膜38的表面部,离电极焊盘20越远则越小。
如果采用这种结构,则利用如上所述与金属层24的周缘部相比具有大的倾斜角度的内壁52部分来更加有效地阻止凸点材料1018扩大,并且,由于在保护膜48表面付近,内壁52的倾斜角变小,所以成为开口扩大的形状,发挥出在搭载凸点材料1018(图4)时更容易搭载这一效果。
另外,在第4实施例中,也可以将金属层24替换为第2实施例的金属层40来构成半导体装置。
<第4实施方式>
图7示出第4实施方式的半导体装置在包含凸点的位置处切断的局部剖视图。图7(a)示出第4实施方式的第1实施例的半导体装置54,图7(b)示出第2实施例的半导体装置56,图7(c)示出第3实施例的半导体装置58。
在第1~第3实施方式中,贯通孔的内壁被形成为倾斜面的保护膜是单层构造,与此相对,在第4实施方式中,不同点在于,将该保护膜做成双层构造。
第4实施方式的第1~第3实施例的半导体装置54、56、58与第2实施方式的第1~第3实施例的半导体装置26、28、30除了保护膜的结构不同以外,基本上相同。因此,在图7中对与图5同样的构成部分附以同一标号并省略其说明,以不同的部分为中心进行说明。
半导体装置54、56、58的保护膜60从基板12侧起具有第1层62、第2层64这一双层构造。
保护膜60中开设的贯通孔66的内壁,在第1层62部分和第2层64 部分处其倾斜角不同,第2层64部分的倾斜角比第1层62部分的倾斜角大(倾斜陡)。
通过采用这种结构,能得到与第3实施方式同样的效果。
这里,以半导体装置58(图7(c))为例来说明这种具有双层构造的保护膜60的半导体装置的制造方法。
在基板12的凸点预定形成面一侧形成由铝等构成的电极焊盘20,覆盖基板12的凸点预定形成面及电极焊盘20地形成由Si3N4等构成的保护膜38。接着,选择性地除去保护膜38,而露出电极焊盘20的一部分(中央部)。
接着,用旋涂器(スピソナ)在电极焊盘20及保护膜38上均匀地涂敷例如聚酰亚胺作为第1层62。进而在其上层形成耐蚀性更小的、即蚀刻速度更大的聚酰亚胺作为第2层64。另外,已知这种蚀刻速度不同的聚酰亚胺可以例如通过使聚酰亚胺各层的热硬化时的升温速度具有差异来准备((日本)特开平1-312084)。
通过在第2层64上粘附规定的形状的光刻胶图案,并浸渍到蚀刻液中,来开始从光刻图案露出的聚酰亚胺各层的蚀刻,由于蚀刻速度的差异,能够得到如图7(c)例示的加工断面的倾斜发生差异的第1层62和第2层64。另外,在聚酰亚胺的加工方法中,也可以复合采用激光烧蚀(レ一ザ一アブレ一シヨン)等其他方法。
接着,例如如下形成厚度为1×10-3mm~7×10-3mm左右的金属层24。软蚀刻电极焊盘20的表面而除去氧化膜后,浸渍到锌酸盐处理液中而使锌粒子析出,接着,浸渍到无电解镀镍(Ni)液中而在电极焊盘20上形成厚度为5×10-3mm左右的Ni膜。也可以进而浸渍到无电解镀金(Au)液中,在Ni膜上形成厚度为5×10-5mm左右的闪镀Au(flash Au plating)。
接着,在金属层24上形成凸点18。凸点18可以通过植球(ボ一ルマウント)法、镀法或点胶(デイスペンス)法等方法形成。例如在采用植球法的情况下,准备在与金属层24对应的位置具有开口部的、厚度为0.02mm~0.04mm左右的金属板构成的印刷掩模。用印刷掩模覆盖凸点预定形成面以外的整个基板12后,用橡胶制或金属制的涂刷器(スキ一ジ),在金属层24的表面(凸点预定形成面)印刷焊剂。
接着,用在与金属层24对应的位置具有开口部的搭载掩模,在印刷了 焊剂的金属层24上设置凸点材料。
接着,通过对设有凸点材料的基板12进行热处理而熔融凸点材料,从而将凸点材料与金属层24接合。在上述工艺中,印刷到金属层24上的焊剂主要具有保持凸点材料及再熔化(回流)时除去氧化膜这2个功能。因此,焊剂可以用松香类或水溶性焊剂等,特别是优选采用无卤素型的松香类焊剂。
凸点材料优选是由锡、银及铜等焊料构成的焊球等,但是也可以采用其他组成的材料。凸点材料的大小优选直径是0.07mm~0.125mm左右。另外,在与本例不同、凸点材料不是球形的情况下,优选长度方向的幅度和宽度方向的幅度的平均值是0.07mm~0.125mm左右。
<第5实施方式>
图8示出第5实施方式的半导体装置在包含凸点的位置处切断的局部剖视图。图8(a)示出第5实施方式的第1实施例的半导体装置68,图8(b)示出第2实施例的半导体装置70,图8(c)示出第3实施例的半导体装置72。
第5实施方式的第1~第3实施例的半导体装置68、70、72与第4实施方式的第1~第3实施例的半导体装置54、56、58(图7)除了构成保护膜的第2层的结构不同以外,基本上相同。因此,在图8中对与图7同样的构成部分附以同一标号并省略其说明,以不同的部分为中心进行说明。
在第5实施方式的第1~第3实施例的半导体装置68、70、72中,使构成保护膜74的第2层76中开设的贯通孔的直径比实施方式4大。换言之,使第2层76中开设的贯通孔的周缘部向直径方向外侧后退,保护膜74的贯通孔78的内壁被形成为在第1层62和第2层76之间产生阶差的阶梯状。
在采用这种构造的情况下,能够在确保降低/防止凸点溢出的效果的同时,自由度更高地设定规定的凸点形状和溢出容许限度的幅度。这在预想到凸点体积的偏差等情况下特别有效。
另外,具有内壁呈阶梯状的贯通孔78的保护膜74可以通过将第1层62和第2层76的蚀刻工序作为分别的工序来形成。
<第6实施方式>
图9示出第6实施方式的半导体装置在包含凸点的位置处切断的局部 剖视图。图9(a)示出第6实施方式的第1实施例的半导体装置80,图9(b)示出第2实施例的半导体装置82,图9(c)示出第3实施例的半导体装置84。
第6实施方式的第1~第3实施例的半导体装置80、82、84与第5实施方式的第1~第3实施例的半导体装置68、70、72(图8)主要除了金属层的形成区域不同以外,基本上相同。因此,在图9中对与图8同样的构成部分附以同一标号并省略其说明,以不同的部分为中心进行说明。
在第5实施方式中,金属层24的周缘位于在保护膜74的第1层62中开设的贯通孔的内壁的中途(图8);而第6实施方式的金属层86将其周缘延设到第1层62和第2层76之间的阶差部、即第1层62的顶面,该周缘接触第2层76中开设的贯通孔的内壁。
通过采用这种形状,能够进一步提高降低/防止凸点18从金属层86区域溢出的效果,能够将相对于规定的凸点形状的变形程度抑制到最小限度。
<第7实施方式>
图10示出第3实施方式(图6)中所用的凸点18的形状的变形例。图10(a)、图10(b)、图10(c)中标号“88”指示的是回流后的凸点的形状。另外,除凸点形状以外的结构是与第3实施方式的第1~第3实施例42、44、46同样的结构。因此,在图10中对与图6同样的构成部分附以同一标号,并省略其说明。
在第7实施方式中,将凸点88的形状做成圆柱状(ペレツト)。即,搭载凸点材料后,通过用回流进行熔融,从而形成为凸点88那样的圆柱状。
如图10(a)~图(c)例示的那样,通过采用满足凸点材料的(最大)外径比金属层24、40的外径小的关系的凸点形状88,降低/防止凸点溢出的效果提高。也就是说,相对于凸点材料的横断面外径、即金属层24、40的外径,凸点材料88的(最大)外径越大则凸点从金属层24、40溢出的风险越高,但是如果这样采用满足(凸点材料88的最大外径≤金属层外径)这一关系的凸点形状,则能够进一步提高降低/防止凸点溢出的效果。
<第8实施方式>
图11是将半导体装置28(图5(b))安装到安装基板90而成的半导体装置单元92的局部剖视图。图11是在凸点18所在的位置处切断的图。
在由有机树脂基板构成的安装基板90上,安装了半导体装置28。在半导体装置28的基板12和安装基板90之间,填充了底部填充树脂(アンダ一フイル樹脂)94,用该树脂层来吸收半导体装置28(基板12)和安装基板90之间的热膨胀率的差异造成的膨胀差。这种构造在以有利于多管脚化、高速传输性优良的面连接(エリア接 )为基础的FC-BGA及FC-PoP的领域中特别需要。
工业实用性
本发明的半导体装置特别适用于例如CSP、BGA等在基板单面设有多个凸点的小型半导体封装。
标号说明
10,26,28,42,44,46,47,54,56,58,68,70,72,80,82,84 半导体装置
12 基板
14,32,38,48,60,72 保护膜
16,34,50,66 贯通孔
18 凸点
20 电极焊盘
22,36,52 内壁(斜面)
24,40,86 金属层
62 第1层
64,76 第2层。
Claims (10)
1.一种半导体装置,其特征在于,
具备:
基板;
多个电极焊盘,形成在上述基板上;以及
保护膜,具有与各电极焊盘对应而开设的贯通孔,并形成为覆盖电极焊盘的周缘部及上述基板;
上述贯通孔的内壁被形成为倾斜的斜面,使得离对应的电极焊盘越远则该贯通孔越开阔;
覆盖上述电极焊盘的经由上述贯通孔从上述保护膜露出的露出面以及上述贯通孔的上述斜面的中途而形成金属层;
该金属层接合有凸点。
2.如权利要求1所述的半导体装置,其特征在于,
离上述电极焊盘越远则上述斜面相对于该电极焊盘的倾斜角越大。
3.如权利要求1所述的半导体装置,其特征在于,
上述保护膜具有从上述基板侧起按第1层、第2层的顺序层叠的双层构造;
与第2层对应的上述斜面部分相对于上述电极焊盘的倾斜角,大于与第1层对应的上述斜面部分相对于上述电极焊盘的倾斜角。
4.如权利要求3所述的半导体装置,其特征在于,
第2层的贯通孔部分的直径大于上述第1层的贯通孔部分的直径,上述斜面被形成为阶梯状。
5.如权利要求3所述的半导体装置,其特征在于,
上述金属层的周缘位于上述第1层的厚度方向中途。
6.如权利要求4所述的半导体装置,其特征在于,
上述金属层的周缘位于上述第1层的顶面。
7.如权利要求2所述的半导体装置,其特征在于,
上述多个电极焊盘被排列为矩阵状。
8.如权利要求1所述的半导体装置,其特征在于,
从上述电极焊盘到上述斜面的中途,离上述电极焊盘越远则上述斜面相对于上述电极焊盘的倾斜角越大。
9.如权利要求8所述的半导体装置,其特征在于,
从上述斜面的中途到上述保护膜的表面部,离上述电极焊盘越远则上述斜面相对于上述电极焊盘的倾斜角越小。
10.一种半导体装置单元,在安装基板安装了如权利要求2所述的半导体装置。
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Also Published As
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US20110285008A1 (en) | 2011-11-24 |
JP5299458B2 (ja) | 2013-09-25 |
US8492896B2 (en) | 2013-07-23 |
JP2012009822A (ja) | 2012-01-12 |
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