CN102214628B - 封装基板及其制造方法 - Google Patents
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Abstract
本发明提供了一种封装基板及其制造方法。该封装基板包括:晶圆,其具有形成在其上表面中的包括芯片安装区域的腔体;第一布线层和第二布线层,第二布线层形成为与第一布线层分开,第一布线层和第二布线层形成为在腔体中延伸;芯片,其被设置在芯片安装区域中以连接到第一布线层和第二布线层;通孔和导通体,通孔贯通晶圆并且导通体填充在通孔中;以及至少一个电子器件,其连接到导通体。因此,可以提供一种封装基板及其制造方法,该封装基板能够在其中嵌入具有预定容量的无源器件,同时减小图案尺寸并且增加组件安装密度。
Description
相关专利申请的交叉引用
该专利申请要求于2010年4月8日在韩国知识产权局提交的韩国专利申请No.10-2010-0032244的优先权,其公开内容以引用方式并入本文。
技术领域
本发明涉及一种封装基板及其制造方法,更具体来讲,涉及下述基板及其制造方法,该基板能够在其中嵌入具有预定容量的无源器件同时减小图案尺寸并且增加组件安装密度。
背景技术
根据电子业的最近的发展,对紧凑的多功能电子组件的需求快速地增加。
根据这种趋势,要求封装基板具有高密度的电路图案。因此,已经设计和使用了实现精细电路图案的各种方法。
作为实现精细电路图案的一种方法的嵌入工艺具有其中用绝缘材料浸渍电路的结构,并且可以改善产品的平坦度和强度并具有较少的电路损坏,由此该方法适于实现精细电路图案。
在根据现有技术的嵌入工艺的情况下,通过在基板上直接安装或堆叠封装或器件来构造基板。在这种情况下,当封装安装在基板的双侧或单侧时,可以减小整个封装面积。
因此,已经对用于有源器件和LRC器件的嵌入工艺或结构进行了各种研究。
然而,在根据现有技术制造其中嵌入了电子器件的基板的情况下,存在可能由于使用了粘合胶带而使电子器件损坏等的风险,并且基板的制造工艺复杂得多。
发明内容
本发明的一方面提供了一种封装基板及其制造方法,该封装基板通过在底部封装的上表面上形成金属凸块并且将与顶部封装的下表面耦合的焊料球和与电子器件的下表面耦合的焊料球中的每个结合到金属凸块,能够对应于精细节距,同时确保了当电子器件堆叠在底部封装上时所需的封装之间的间隔。
根据本发明的方面,提供了一种封装基板,包括:晶圆,所述晶圆具有形成在其上表面中的腔体,所述腔体包括芯片安装区域;第一布线层和第二布线层,所述第二布线层形成为与所述第一布线层分开,所述第一布线层和所述第二布线层形成为在腔体中延伸;芯片,其位于芯片安装区域中,以连接到第一布线层和第二布线层;贯通晶圆的通孔和填充通孔的导通体;以及一个或多个电子器件,所述一个或多个电子器件连接到所述导通体。
导通体可以通过焊料凸块连接到电子器件或外部装置。
芯片可以是多层陶瓷电容器(MLCC)。
电子器件可以是从电阻器和电感器中选择的至少一个。
晶圆可以由硅制成。
封装基板还可以包括绝缘层,该绝缘层形成为覆盖芯片和电子器件并且暴露第一布线层和第二布线层的一部分。
根据本发明的另一个方面,提供了一种制造封装基板的方法,所述方法包括:在晶圆的上表面的至少一个区域中形成腔体,所述腔体包括芯片安装区域;形成贯通晶圆的通孔以及填充通孔的导通体;形成第一布线层和与所述第一布线层分开的第二布线层,该第一布线层和第二布线层延伸到腔体中;以及将芯片安装在腔体中以连接到第一布线层和第二布线层。
所述方法还可以包括在形成腔体之前抛光晶圆的上表面和下表面中的至少一个。
形成腔体可以包括:在晶圆的上表面上形成第一绝缘膜;通过蚀刻第一绝缘膜,形成用于形成腔体的第一绝缘图案;以及通过使用所述第一绝缘图案蚀刻晶圆来形成腔体。
通过蚀刻晶圆形成所述腔体可以包括使用氢氧化钾(KOH)溶液湿蚀刻晶圆。
形成通孔可以包括:在晶圆的上表面或下表面上形成第一感光树脂层;通过将第一感光树脂层曝光并显影来形成第一感光图案;以及通过使用第一感光图案蚀刻晶圆来形成通孔。
形成导通体可以包括:在包括通孔和腔体的晶圆的表面上形成第二绝缘膜;在第二绝缘膜上形成镀种层(plating seed layer);以及使用电镀法用导电材料填充通孔。
形成第一布线层和第二布线层可以包括:在晶圆的不形成第一布线层和第二布线层的区域上形成第二感光图案;在晶圆的上表面上形成布线材料;使用剥离法去除第二感光图案和形成在第二感光图案上的布线材料。
所述方法还可以包括:在腔体中安装芯片之后,通过使晶圆回流将芯片结合到第一布线层和第二布线层中的每个。
所述芯片可以是多层陶瓷电容器(MLCC)。
电子器件可以是从电阻器和电感器中选择的至少一个。
所述方法还可以包括形成绝缘层,所述绝缘层暴露第一布线层和第二布线层的一部分并且覆盖芯片和电子器件。
所述方法还可以包括通过焊料凸块将导通体连接到电子器件或外部装置。
附图说明
根据以下结合附图的详细描述,将更清楚地理解本发明的以上和其它方面、特征和其它优点,在附图中:
图1是示意性示出根据本发明的示例性实施例的封装基板的平面顶视图;
图2是沿着图1的线II-II′截取的剖视图;和
图3A至图3K是示意性示出根据本发明示例性实施例的制造封装基板的方法的剖视图。
具体实施方式
现在,将参照附图详细描述本发明的示例性实施例。
然而,本发明可以以许多不同形式来实现并且不应该被理解为限于本文阐述的实施例。而是提供这些实施例,使得该公开将是彻底和完整的,并且将本发明的构思完全传达给本领域的技术人员。在附图中,为了清楚起见,可以扩大形状和尺寸,并且将始终使用相同的附图标记来表示相同或类似的组件。
下文中,将参照图1和图2来描述根据本发明的示例性实施例的封装基板。
图1是示意性示出根据本发明的示例性实施例的封装基板1的平面顶视图,并且图2是沿着图1的线II-II′截取的剖视图。
根据本发明的示例性实施例的封装基板被构造成包括:晶圆10,具有形成在晶圆10的上表面中的腔体C,所述腔体包括芯片安装区域T;第一布线层13a和形成为与第一布线层13a分开的第二布线层13b,所述第一布线层13a和所述第二布线层13b形成为在腔体C中延伸;芯片M,所述芯片M位于芯片安装区域T中以连接到第一布线层13a和第二布线层13b;通孔H,所述通孔H贯通晶圆10;导通体V,所述导通体V填充在通孔H中;以及一个或多个电子器件R和L,所述一个或多个电子器件连接到导通体V。
在此,封装基板1还可以包括绝缘层14,所述绝缘层14覆盖芯片M以及电子器件R和L并且暴露第一布线层13a和第二布线层13b的一部分。
在此,晶圆10可以由硅制成,并且导通体V可以通过焊料凸块15连接到电子器件R和L或外部装置16。
另外,芯片M可以是多层陶瓷电容器(MLCC),并且电子器件R和L可以是从电阻器和电感器中选择的至少一个。然而,芯片M以及电子器件R和L不限于此。
下文中,将参照图3A至图3K描述根据本发明的示例性实施例的制造封装基板的方法。
图3A至图3K是示意性示出根据本发明的示例性实施例的制造封装基板的方法的剖视图。
根据本发明的示例性实施例的制造封装基板1的方法包括:在晶圆10的上表面的至少一个区域中形成腔体,该腔体包括芯片安装区域T;形成贯通晶圆10的通孔H以及填充在通孔H中的导通体V;形成第一布线层13a和与第一布线层13a分开的第二布线层13b,第一布线层13a和第二布线层13b在腔体C中延伸;以及将芯片M安装腔体C中,以连接到第一布线层13a和第二布线层13b。
如图3A中所示,在晶圆10的上表面上形成第一绝缘膜(未示出),然后将其蚀刻以形成用于形成腔体C的第一绝缘图案11a。在此,第一绝缘膜可以由氮化硅(Si3N4)制成;然而,形成第一绝缘膜的材料不限于此。另外,可以使用反应离子蚀刻(RIE)方法作为第一绝缘膜的蚀刻方法;然而,其蚀刻方法不限于此。
然后,如图3B中所示,通过使用第一绝缘图案11a作为掩模,在晶圆10的上表面中形成腔体C。在此,可以通过使用第一绝缘图案11a作为掩模对晶圆10进行使用氢氧化钾(KOH)溶液的湿蚀刻;然而,在湿蚀刻中使用的溶液不限于此。
此后,如图3C中所示,在晶圆10的下表面上形成第一感光树脂层(未示出),然后将第一感光树脂层曝光并显影以形成第一感光图案11b。
接着,如图3D中所示,使用第一感光图案作为掩模蚀刻晶圆10以形成通孔H。在此,可以使用RIE方法作为晶圆10的蚀刻方法;然而,其蚀刻方法不限于此。
此后,如图3E中所示,在包括通孔H和腔体C的晶圆10的表面上形成第二绝缘膜12a,并且在第二绝缘膜12a上形成镀种层(未示出)。在此,第二绝缘膜12a可以由氧化硅(SiO2)制成;然而,第二绝缘膜12a的材料不限于此。
然后,如图3F中所示,利用电镀方法,通过使用导电材料填充通孔H来形成导通体V。
接下来,如图3G中所示,在晶圆10的不形成第一布线层13a和第二布线层13b的区域上形成第二感光图案12b。然后,如图3H中所示,在晶圆10的上表面上形成布线材料13。
然后,如图3I中所示,通过剥离法,同时去除第二感光图案12b和形成在第二感光图案12b上的布线材料13。当晶圆10浸到有机溶剂中并且随后轻微晃动时,第二感光图案12b被溶解,并且/或有机溶剂渗透到晶圆10和第二感光图案12b之间的界面中,由此可以同时去除第二感光图案12b和形成在第二感光图案12b上的布线13。因此,可以在将要形成第一布线层13a和第二布线层13b的部分中形成第一布线层13a和第二布线层13b。
此后,如图3J中所示,在腔体C中安装芯片M,并且晶圆10随后回流以将芯片M单独结合到第一布线层13a并且将芯片M单独结合到第二布线层13b。在此,芯片M可以是多层陶瓷电容器(MLCC)。
接着,如图3K中所示,在安装电子器件R和L之后,并且形成绝缘层14,该绝缘层14暴露第一布线层13a和第二布线层13b的一部分并且覆盖芯片M以及电子器件R和L。另外,导通体V通过焊料凸块15连接到电子器件R和L或外部装置16,以完成如图1和图2中所示的封装基板。
如上所述,根据本发明的示例性实施例,可以提供一种封装基板及其制造方法,该封装基板能够在其中嵌入具有预定容量的无源器件,同时减小图案尺寸并增加组件安装密度。
虽然已经结合示例性实施例示出和描述了本发明,但是本领域的技术人员将显而易见的是,可以在不脱离所附权利要求限定的本发明的精神和范围的情况下,进行许多修改和变化。因此,在不脱离所附权利要求限定的本发明的精神的情况下,本领域的技术人员在本发明范围内进行各种替代、修改和改变。
Claims (11)
1.一种制造封装基板的方法,包括:
在晶圆的上表面的至少一个区域中形成腔体,所述腔体包括芯片安装区域;
形成贯通所述晶圆的通孔以及填充所述通孔的导通体;
形成第一布线层和与所述第一布线层分开的第二布线层,所述第一布线层和所述第二布线层延伸到所述腔体中;以及
将芯片安装在所述腔体中以连接到所述第一布线层和所述第二布线层,
其中形成所述腔体包括:
在所述晶圆的上表面上形成第一绝缘膜;
通过蚀刻所述第一绝缘膜,形成用于形成所述腔体的第一绝缘图案;以及
通过使用所述第一绝缘图案蚀刻所述晶圆,形成所述腔体,并且
其中形成所述导通体包括:
在包括所述通孔和所述腔体的所述晶圆的表面上形成第二绝缘膜;
在所述第二绝缘膜上形成镀种层;以及
使用电镀法用导电材料填充所述通孔。
2.根据权利要求1所述的方法,还包括:在形成所述腔体之前,抛光所述晶圆的上表面和下表面中的至少一个。
3.根据权利要求1所述的方法,其中通过蚀刻所述晶圆形成所述腔体包括使用氢氧化钾(KOH)溶液湿蚀刻所述晶圆。
4.根据权利要求1所述的方法,其中形成所述通孔包括:
在所述晶圆的上表面或下表面上形成第一感光树脂层;
通过曝光和显影所述第一感光树脂层,形成第一感光图案;以及
通过使用所述第一感光图案蚀刻所述晶圆,形成所述通孔。
5.根据权利要求1所述的方法,其中形成所述第一布线层和所述第二布线层包括:
在所述晶圆的不形成所述第一布线层和所述第二布线层的区域上形成第二感光图案;
在所述晶圆的上表面上形成布线材料;
使用剥离法去除所述第二感光图案和形成在所述第二感光图案上的所述布线材料。
6.根据权利要求1所述的方法,进一步包括在将所述芯片安装在所述腔体中之后,通过允许所述晶圆回流,将所述芯片结合到所述第一布线层和所述第二布线层中的每个。
7.根据权利要求1所述的方法,其中所述芯片是多层陶瓷电容器(MLCC)。
8.根据权利要求1所述的方法,其中连接到所述导通体的电子器件是从电阻器和电感器中选择的至少一个。
9.根据权利要求1所述的方法,进一步包括形成绝缘层,所述绝缘层暴露所述第一布线层和所述第二布线层的一部分并且覆盖所述芯片和连接到所述导通体的电子器件。
10.根据权利要求1所述的方法,进一步包括通过焊料凸块将所述导通体连接到电子器件或外部装置。
11.一种制造封装基板的方法,包括:
在晶圆的上表面的至少一个区域中形成腔体,所述腔体包括芯片安装区域;
形成贯通所述晶圆的通孔以及填充所述通孔的导通体;
形成第一布线层和与所述第一布线层分开的第二布线层,所述第一布线层和所述第二布线层延伸到所述腔体中;以及
将芯片安装在所述腔体中以连接到所述第一布线层和所述第二布线层,
其中形成所述导通体包括:
在包括所述通孔和所述腔体的所述晶圆的表面上形成第二绝缘膜;
在所述第二绝缘膜上形成镀种层;以及
使用电镀法用导电材料填充所述通孔。
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