CN102165533B - 半导体存储器件 - Google Patents
半导体存储器件 Download PDFInfo
- Publication number
- CN102165533B CN102165533B CN200980139398.4A CN200980139398A CN102165533B CN 102165533 B CN102165533 B CN 102165533B CN 200980139398 A CN200980139398 A CN 200980139398A CN 102165533 B CN102165533 B CN 102165533B
- Authority
- CN
- China
- Prior art keywords
- memory cell
- word
- district
- storage unit
- semiconductor storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 68
- 230000007547 defect Effects 0.000 claims abstract description 84
- 238000004891 communication Methods 0.000 claims description 5
- 230000002950 deficient Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 description 24
- 230000008569 process Effects 0.000 description 18
- 238000010586 diagram Methods 0.000 description 13
- 238000005516 engineering process Methods 0.000 description 9
- 230000006870 function Effects 0.000 description 9
- 238000012937 correction Methods 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 7
- 238000012795 verification Methods 0.000 description 6
- 230000003278 mimic effect Effects 0.000 description 3
- 230000000717 retained effect Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000005039 memory span Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
- G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
- G11C29/4401—Indication or identification of errors, e.g. for repair for self repair
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0409—Online test
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C2029/4402—Internal storage of test result, quality data, chip identification, repair information
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
- G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008-254100 | 2008-09-30 | ||
| JP2008254100 | 2008-09-30 | ||
| PCT/JP2009/066321 WO2010038630A1 (en) | 2008-09-30 | 2009-09-11 | Semiconductor memory device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102165533A CN102165533A (zh) | 2011-08-24 |
| CN102165533B true CN102165533B (zh) | 2015-01-28 |
Family
ID=42057334
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200980139398.4A Expired - Fee Related CN102165533B (zh) | 2008-09-30 | 2009-09-11 | 半导体存储器件 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20100080074A1 (enExample) |
| JP (1) | JP5366734B2 (enExample) |
| CN (1) | CN102165533B (enExample) |
| TW (1) | TWI523024B (enExample) |
| WO (1) | WO2010038630A1 (enExample) |
Families Citing this family (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102446280B (zh) | 2010-09-30 | 2016-03-23 | 西门子公司 | 一种验证数据的方法、装置及系统 |
| US9324398B2 (en) | 2013-02-04 | 2016-04-26 | Micron Technology, Inc. | Apparatuses and methods for targeted refreshing of memory |
| US9047978B2 (en) | 2013-08-26 | 2015-06-02 | Micron Technology, Inc. | Apparatuses and methods for selective row refreshes |
| CN103777907A (zh) * | 2014-02-25 | 2014-05-07 | 四川长虹空调有限公司 | 自动获取eeprom存储容量的方法 |
| JP2015219938A (ja) * | 2014-05-21 | 2015-12-07 | マイクロン テクノロジー， インク． | 半導体装置 |
| US9449720B1 (en) * | 2015-11-17 | 2016-09-20 | Macronix International Co., Ltd. | Dynamic redundancy repair |
| JP2017182854A (ja) | 2016-03-31 | 2017-10-05 | マイクロン テクノロジー， インク． | 半導体装置 |
| CN107342108B (zh) * | 2016-04-28 | 2020-12-25 | 中芯国际集成电路制造(上海)有限公司 | 电可编程熔丝系统及其测试方法 |
| US10580475B2 (en) | 2018-01-22 | 2020-03-03 | Micron Technology, Inc. | Apparatuses and methods for calculating row hammer refresh addresses in a semiconductor device |
| US11152050B2 (en) | 2018-06-19 | 2021-10-19 | Micron Technology, Inc. | Apparatuses and methods for multiple row hammer refresh address sequences |
| JP7112904B2 (ja) * | 2018-07-20 | 2022-08-04 | ラピスセミコンダクタ株式会社 | 半導体メモリのテスト方法 |
| CN109614275B (zh) * | 2018-12-12 | 2022-06-14 | 上海华力集成电路制造有限公司 | 冗余修正电路及应用其的冗余修正方法 |
| US10770127B2 (en) | 2019-02-06 | 2020-09-08 | Micron Technology, Inc. | Apparatuses and methods for managing row access counts |
| US11043254B2 (en) | 2019-03-19 | 2021-06-22 | Micron Technology, Inc. | Semiconductor device having cam that stores address signals |
| US11264096B2 (en) | 2019-05-14 | 2022-03-01 | Micron Technology, Inc. | Apparatuses, systems, and methods for a content addressable memory cell with latch and comparator circuits |
| US11158364B2 (en) | 2019-05-31 | 2021-10-26 | Micron Technology, Inc. | Apparatuses and methods for tracking victim rows |
| US11158373B2 (en) | 2019-06-11 | 2021-10-26 | Micron Technology, Inc. | Apparatuses, systems, and methods for determining extremum numerical values |
| US11139015B2 (en) | 2019-07-01 | 2021-10-05 | Micron Technology, Inc. | Apparatuses and methods for monitoring word line accesses |
| US10832792B1 (en) | 2019-07-01 | 2020-11-10 | Micron Technology, Inc. | Apparatuses and methods for adjusting victim data |
| US11386946B2 (en) | 2019-07-16 | 2022-07-12 | Micron Technology, Inc. | Apparatuses and methods for tracking row accesses |
| US10943636B1 (en) | 2019-08-20 | 2021-03-09 | Micron Technology, Inc. | Apparatuses and methods for analog row access tracking |
| US10964378B2 (en) | 2019-08-22 | 2021-03-30 | Micron Technology, Inc. | Apparatus and method including analog accumulator for determining row access rate and target row address used for refresh operation |
| US11200942B2 (en) | 2019-08-23 | 2021-12-14 | Micron Technology, Inc. | Apparatuses and methods for lossy row access counting |
| US11222682B1 (en) | 2020-08-31 | 2022-01-11 | Micron Technology, Inc. | Apparatuses and methods for providing refresh addresses |
| US11462291B2 (en) | 2020-11-23 | 2022-10-04 | Micron Technology, Inc. | Apparatuses and methods for tracking word line accesses |
| US11482275B2 (en) | 2021-01-20 | 2022-10-25 | Micron Technology, Inc. | Apparatuses and methods for dynamically allocated aggressor detection |
| US11600314B2 (en) | 2021-03-15 | 2023-03-07 | Micron Technology, Inc. | Apparatuses and methods for sketch circuits for refresh binning |
| US11664063B2 (en) | 2021-08-12 | 2023-05-30 | Micron Technology, Inc. | Apparatuses and methods for countering memory attacks |
| US11688451B2 (en) | 2021-11-29 | 2023-06-27 | Micron Technology, Inc. | Apparatuses, systems, and methods for main sketch and slim sketch circuit for row address tracking |
| US12165687B2 (en) | 2021-12-29 | 2024-12-10 | Micron Technology, Inc. | Apparatuses and methods for row hammer counter mat |
| CN118038948A (zh) * | 2022-11-02 | 2024-05-14 | 长鑫存储技术有限公司 | 存储器 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1264127A (zh) * | 1999-01-26 | 2000-08-23 | 日本电气株式会社 | 具有冗余存储电路的半导体存储器件 |
| US7379331B2 (en) * | 2005-04-12 | 2008-05-27 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory including redundant cell for replacing defective cell |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63239696A (ja) * | 1987-03-27 | 1988-10-05 | Toshiba Corp | 冗長回路付メモリの試験装置 |
| JP3301047B2 (ja) * | 1993-09-16 | 2002-07-15 | 株式会社日立製作所 | 半導体メモリシステム |
| JP2914171B2 (ja) * | 1994-04-25 | 1999-06-28 | 松下電器産業株式会社 | 半導体メモリ装置およびその駆動方法 |
| JPH07334999A (ja) * | 1994-06-07 | 1995-12-22 | Hitachi Ltd | 不揮発性半導体記憶装置及びデータプロセッサ |
| JPH087597A (ja) * | 1994-06-24 | 1996-01-12 | Toshiba Corp | 不揮発性半導体記憶装置 |
| JP2001501000A (ja) * | 1996-08-16 | 2001-01-23 | 東京エレクトロン株式会社 | エラー検出および訂正を有する半導体メモリ装置 |
| US5983374A (en) * | 1996-09-26 | 1999-11-09 | Kabushiki Kaisha Toshiba | Semiconductor test system and method, and medium for recording test program therefor |
| JPH10107096A (ja) * | 1996-09-26 | 1998-04-24 | Toshiba Microelectron Corp | 半導体試験装置、半導体試験方法及び半導体試験プログラムを記録した媒体 |
| US6035432A (en) * | 1997-07-31 | 2000-03-07 | Micron Electronics, Inc. | System for remapping defective memory bit sets |
| JP2000057795A (ja) * | 1998-08-07 | 2000-02-25 | Toshiba Corp | 不揮発性半導体メモリ |
| JP4316085B2 (ja) * | 1999-12-28 | 2009-08-19 | 株式会社東芝 | 半導体集積回路装置及び集積回路システム |
| US6373758B1 (en) * | 2001-02-23 | 2002-04-16 | Hewlett-Packard Company | System and method of operating a programmable column fail counter for redundancy allocation |
| US6711056B2 (en) * | 2001-03-12 | 2004-03-23 | Micron Technology, Inc. | Memory with row redundancy |
| US6469932B2 (en) * | 2001-03-12 | 2002-10-22 | Micron Technology, Inc. | Memory with row redundancy |
| US7162668B2 (en) * | 2001-04-19 | 2007-01-09 | Micron Technology, Inc. | Memory with element redundancy |
| US6865702B2 (en) * | 2001-04-09 | 2005-03-08 | Micron Technology, Inc. | Synchronous flash memory with test code input |
| DE10126599C2 (de) * | 2001-05-31 | 2003-12-18 | Infineon Technologies Ag | Speicherbaustein, Verfahren zum Aktivieren einer Speicherzelle und Verfahren zum Reparieren einer defekten Speicherzelle |
| JP2006107583A (ja) * | 2004-10-01 | 2006-04-20 | Renesas Technology Corp | 半導体記憶装置 |
| JP2006209900A (ja) * | 2005-01-31 | 2006-08-10 | Matsushita Electric Ind Co Ltd | メモリ回路 |
| JP2007058940A (ja) * | 2005-08-22 | 2007-03-08 | Sony Corp | 記憶装置、ファイル記憶装置、およびコンピュータシステム |
| US7469368B2 (en) * | 2005-11-29 | 2008-12-23 | Broadcom Corporation | Method and system for a non-volatile memory with multiple bits error correction and detection for improving production yield |
| US7386771B2 (en) * | 2006-01-06 | 2008-06-10 | International Business Machines Corporation | Repair of memory hard failures during normal operation, using ECC and a hard fail identifier circuit |
| JP4617405B2 (ja) * | 2008-02-05 | 2011-01-26 | 富士通株式会社 | 不良メモリを検出する電子機器、不良メモリ検出方法およびそのためのプログラム |
-
2009
- 2009-09-11 WO PCT/JP2009/066321 patent/WO2010038630A1/en not_active Ceased
- 2009-09-11 CN CN200980139398.4A patent/CN102165533B/zh not_active Expired - Fee Related
- 2009-09-23 JP JP2009218321A patent/JP5366734B2/ja not_active Expired - Fee Related
- 2009-09-28 US US12/567,975 patent/US20100080074A1/en not_active Abandoned
- 2009-09-29 TW TW098132969A patent/TWI523024B/zh not_active IP Right Cessation
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1264127A (zh) * | 1999-01-26 | 2000-08-23 | 日本电气株式会社 | 具有冗余存储电路的半导体存储器件 |
| US7379331B2 (en) * | 2005-04-12 | 2008-05-27 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory including redundant cell for replacing defective cell |
Non-Patent Citations (1)
| Title |
|---|
| JP特开2006-107583A 2006.04.20 * |
Also Published As
| Publication number | Publication date |
|---|---|
| JP5366734B2 (ja) | 2013-12-11 |
| TWI523024B (zh) | 2016-02-21 |
| WO2010038630A1 (en) | 2010-04-08 |
| CN102165533A (zh) | 2011-08-24 |
| TW201030761A (en) | 2010-08-16 |
| US20100080074A1 (en) | 2010-04-01 |
| JP2010108585A (ja) | 2010-05-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102165533B (zh) | 半导体存储器件 | |
| KR100781952B1 (ko) | 플래시 메모리 내의 결함 관리 방법 | |
| KR100929155B1 (ko) | 반도체 메모리 장치 및 그것의 메모리 셀 억세스 방법 | |
| US8345487B2 (en) | Method of setting read voltage minimizing read data errors | |
| US9460796B2 (en) | Memory system, program method thereof, and computing system including the same | |
| US7975170B2 (en) | Memory refresh system and method | |
| KR100799688B1 (ko) | 백업 회로를 갖는 메모리 시스템 및 그것의 프로그램 방법 | |
| JP5426711B2 (ja) | メモリコントローラ及び不揮発性記憶装置 | |
| KR100954731B1 (ko) | 에러 보고 방법 | |
| US20090161430A1 (en) | Bit map control of erase block defect list in a memory | |
| JP2009087509A (ja) | 半導体記憶装置 | |
| KR20210131443A (ko) | 메모리 디바이스들의 소프트 포스트 패키지 리페어 | |
| US10025526B2 (en) | Storage device and data moving method for storage device | |
| US5586074A (en) | Semiconductor memory device with function of preventing loss of information due to leak of charges or disturbing | |
| JP2005284700A (ja) | メモリカード | |
| US20190087292A1 (en) | Memory module | |
| US20090070523A1 (en) | Flash memory device storing data with multi-bit and single-bit forms and programming method thereof | |
| US20120303871A1 (en) | Semiconductor memory device and method of controlling the same | |
| CN112446059A (zh) | 使用保险丝防止行激活 | |
| US6754115B2 (en) | Nonvolatile semiconductor memory device with backup memory block | |
| EP3176789A1 (en) | Memory control method and apparatus | |
| CN110765041A (zh) | 自适应的Nand Flash读写速度调整系统 | |
| US10665297B2 (en) | Memory systems for memory devices and methods of operating the memory systems | |
| US20130170295A1 (en) | Semiconductor memory device and operation method thereof | |
| US8488407B2 (en) | Nonvolatile memory apparatus and method for processing configuration information thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150128 Termination date: 20210911 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |