CN102045950B - 印刷电路板及其制造方法 - Google Patents

印刷电路板及其制造方法 Download PDF

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CN102045950B
CN102045950B CN2009102657695A CN200910265769A CN102045950B CN 102045950 B CN102045950 B CN 102045950B CN 2009102657695 A CN2009102657695 A CN 2009102657695A CN 200910265769 A CN200910265769 A CN 200910265769A CN 102045950 B CN102045950 B CN 102045950B
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circuit pattern
resin layer
insulating barrier
underfill resin
layer
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CN102045950A (zh
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李哉锡
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Samsung Electro Mechanics Co Ltd
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    • HELECTRICITY
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    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
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    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/428Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
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    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4658Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern characterized by laminating a prefabricated metal foil pattern, e.g. by transfer
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    • H05K2201/09209Shape and layout details of conductors
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Abstract

本发明披露了一种印刷电路板以及印刷电路板的制造方法。该方法包括:制备包括形成在其上的底层树脂层的载体;在底层树脂层上形成电路图案;将载体堆叠到绝缘层上使得电路图案埋置在绝缘层中;去除载体;在其上堆叠有底层树脂层的绝缘层中形成通孔;以及在通孔中形成导电通路。导电通路通过在通孔中和在底层树脂层上形成电镀层并且去除形成在底层树脂层上的一部分电镀层而形成。

Description

印刷电路板及其制造方法
相关申请的引用
本申请要求于2009年10月19日向韩国知识产权局提交的韩国专利申请第10-2009-0099217号的权益,将其全部披露内容结合于此作为参考。
技术领域
本发明涉及一种印刷电路板及其制造方法。
背景技术
随着最近对具有电器件的高密度多功能插件板(封装板)的趋势,存在对形成在基板上的高密度电路图案增加的需求。
根据相关技术,电路图案形成在绝缘层的表面上。然而,由于该结构不适合于高密度电路图案,所以已经引入将电路图案埋置在绝缘层中的技术。根据该技术,制备载体,并且在载体上形成电路图案。然后,电路图案被转移至绝缘树脂。
这里,由于金属阻挡层插入在载体与电路图案之间,所以对制造工艺的简化存在限制,因为在电路图案被转移至绝缘树脂时金属阻挡层必须被蚀刻。此外,当在绝缘树脂中加工孔以便形成用于层间连接的通路(通孔,via)时,在加工孔之前,必须打开一部分金属阻挡层。在这种情况下,层间精度可能由于打开一部分金属阻挡层的工艺而被劣化。
发明内容
本发明的一个方面提供了一种制造印刷电路板的方法,该方法可以包括:制备包括形成在其上的底层树脂层(primer resin layer)的载体(载板,carrier);在底层树脂层上形成电路图案;将载体堆叠到绝缘层上使得电路图案埋置在绝缘层中;去除载体;在其上堆叠有底层树脂层的绝缘层中形成通孔(过孔,via hole);以及在通孔中形成导电通路(conductive via)。导电通路可以通过在通孔中和在底层树脂层上形成电镀层并且去除形成在底层树脂层上的一部分电镀层而形成。
载体可以由金属制成,并且通孔可以是盲通孔(BVH)。
通孔可以通过从底层树脂层的方向上进行激光加工而形成。
本发明的另一个方面提供了一种印刷电路板。该印刷电路板可以包括:包括埋置在绝缘层两侧中的电路图案的绝缘层;电连接绝缘层的两侧的通路(via);堆叠在绝缘层的一侧上的底层树脂层;以及覆盖底层树脂层的阻焊层(solder-resist layer)。
通路可以是盲通路(BVH)。
附图说明
图1是示出了根据本发明一种实施方式的制造印刷电路板的方法的流程图。
图2至图14示出了根据本发明一种实施方式的用于制造印刷电路板的方法的过程。
图15示出了两个载体分别压在绝缘层的上侧和下侧上的过程。
具体实施方式
由于本发明允许各种变化和许多实施方式,因此将在附图中示出并在书面描述中详细地描述特定的实施方式。然而,这并不用于将本发明限制于特定的实践模式,并且应当理解,不背离本发明的精神和技术范围的所有变化、等价物、以及替换都包括在本发明中。在本发明的描述中,相关技术的某些详细描述在被认为可能不必要地使本发明的本质模糊时可以被忽略。
下面将参照附图更详细地描述根据本发明的某些实施方式的印刷电路板及其制造方法。不管图号如何,相同或相应的那些部件赋予相同的参考标号,并且省略多余的描述。
图1是示出了根据本发明一种实施方式的制造印刷电路板的方法的流程图,而图2至图14示出了根据本发明一种实施方式的用于制造印刷电路板的方法的过程。在图2至图14中示出了支撑件(支承构件)10,载体20,底层树脂层30,金属箔40,电镀抗蚀剂(电镀保护层,plating resist)42,电路图案44、62,绝缘层50,通孔52,电镀金属56,导电通路58以及内基板(inner substrate)60。
首先,制备包括底层树脂层30的载体20(S110),然后在底层树脂层30上形成电路图案44(S120)。对此,如图2所示,一种结构包括在支撑件10的两侧上以连续顺序的载体20、底层树脂层30以及金属箔40。这里,支撑件10可以由例如当对支撑件10加热时其粘附力可以降低的热塑性材料制成。堆叠在支撑件10的两侧上的载体20随后将与支撑件10分离。金属箔40可以由铜或其他导电金属制成。
其次,如图3所示,在金属箔40上形成图案化的电镀抗蚀剂42,然后通过电镀工艺形成电路图案44。这里,因为形成在底层树脂层30上的金属箔40可以用作种子层,所以可以实施用于形成电路图案44的电镀工艺。然后,去除电镀抗蚀剂42,并且在金属箔40上形成电路图案44使得电路图案44具有突出(突起)形状。
接着,如图5所示,使堆叠在支撑件10上的载体20与支撑件10分离。在此之前,可以在电路图案44上实施表面处理工艺,使得可以确保电路图案44与绝缘层50之间足够的粘附力。当通过快速蚀刻(flash etching)等实施表面处理工艺时,可以在电路图案44的表面上形成粗糙度,并且可以增加电路图案44与绝缘层50之间的粘附力。在该工艺过程中,可以去除在底层树脂层30上的金属箔40的暴露部分。
接着,如图6和图7所示,载体20堆叠在绝缘层50上,并且电路图案44埋置在绝缘层50中(S130)。因为底层树脂层30和电路图案44形成在载体20的表面上,所以当载体20堆叠在绝缘层50上时电路图案44可以埋置在绝缘层50中。这里,绝缘层50可以处于B-阶段(B-stage),即,半硬化。在这种情况下,电路图案44可以容易地埋置在绝缘层50中。然后,当绝缘层50硬化时可以获得在电路图案44与绝缘层50之间的固体粘结强度。
同时,如图6所示,内基板60可以堆叠在绝缘层50的下表面上。电路图案62可以形成在内基板60的表面上,并且通过彼此堆叠可以埋置在绝缘层50中。
当需要2层基板时,与支撑件10分离的两个载体20可以分别压在绝缘层50的上侧和下侧上,如图15所示。在这种情况下,电路图案44可以在一个过程(工艺)中同时埋置在绝缘层50的两侧中。
接着,如图8所示,去除载体20(S140)。当载体20由金属制成时,可以使用蚀刻剂通过湿法蚀刻工艺去除载体20。在这种情况下,因为埋置在绝缘层50中的电路图案44的上表面被底层树脂层30覆盖,所以电路图案44不能被用于去除载体20的蚀刻剂破坏。
接着,如图9所示,加工通孔52(S150)。可以使用激光用于加工通孔52。在该实施方式中,因为电路图案44被底层树脂层30覆盖,所以可以在没有加工窗口的情况下直接加工通孔52。同样,当通孔52的下侧被形成在内基板60上的电路图案62覆盖,即,通孔52是盲通孔(BVH)时,可以容易地控制通孔52的深度。
接着,在通孔52中形成用于层间连接的通路58(S160)。下面陈述简要的描述。
首先,如图10所示,在底层树脂层30和通孔52的内壁上形成种子层54。对此,可以实施无电电镀工艺。
然后,通过电镀工艺在通孔52中填充电镀金属56,如图11所示。填充在通孔52中的电镀金属56可以用作用于层间连接的导电通路58。电镀金属56可以是铜(Cu)或适合于传递电信号的任何物质。
其次,如图12所示,去除形成在底层树脂层30上的一部分电镀金属56。对此,可以实施使用蚀刻剂的湿法蚀刻工艺。在这种情况下,形成在绝缘层50的表面上的底层树脂层30可以用作蚀刻停止阻挡层(etch-stop barrier)。
然后,如图13所示,通过分散阻焊墨(solder resist ink)形成阻焊层70,同时保留底层树脂层30。并且然后,如图14所示,形成开口区(敞开区,open area)72使得电路图案44的一部分可以用作用于与其他装置连接的衬垫。可以使用激光加工方法用于形成开口区72。
通过上面陈述的过程制造的印刷电路板示出在图14中。参照图14,根据该实施方式的印刷电路板包括:绝缘层50,电路图案44、62埋置在绝缘层50的两侧中;电连接绝缘层50的两侧的导电通路58;堆叠在绝缘层50的一侧上的底层树脂层30;以及覆盖底层树脂层30的阻焊层70。
虽然已经参照特定的实施方式详细地描述了本发明的精神,但是该实施方式仅为了说明的目的,并且不应当限制本发明。应当理解,在不背离本发明的范围和精神的情况下,本领域技术人员可以改变或更改该实施方式。
同样,可以在所附的权利要求书中发现除了上面陈述的那些以外的许多实施方式。

Claims (5)

1.一种制造印刷电路板的方法,所述方法包括:
制备包括形成在其上的底层树脂层的载体;
在所述底层树脂层上形成电路图案;
将所述载体堆叠到绝缘层上使得所述电路图案埋置在所述绝缘层中;
去除所述载体;
在所述绝缘层中形成通孔,所述底层树脂层堆叠在所述绝缘层上;以及
通过在所述通孔中和在所述底层树脂层上形成电镀层并且去除形成在所述底层树脂层上的一部分所述电镀层而在所述通孔中形成导电通路,
其中,形成在所述绝缘层的表面上的所述底层树脂层用作蚀刻停止层,使得去除形成在所述底层树脂层上的一部分所述电镀层。
2.根据权利要求1所述的方法,其中,所述载体由金属制成。
3.根据权利要求1所述的方法,其中,所述形成通孔包括从所述底层树脂层的方向上进行激光加工。
4.根据权利要求3所述的方法,其中,所述通孔是盲通孔(BVH)。
5.一种印刷电路板,包括:
包括第一表面和第二表面的绝缘层;
第一电路图案和第二电路图案,所述第一电路图案和所述第二电路图案分别埋置在所述绝缘层的所述第一表面和所述第二表面中;
盲通路,通过穿透所述绝缘层而电连接所述第一表面和所述第二表面,所述盲通路的上表面和所述第一电路图案的上表面被设置在相同的平坦表面上;
底层树脂层,堆叠在所述绝缘层的所述第一表面上,使得所述第一电路图案的上表面的一部分和所述盲通路的上表面被暴露;以及
阻焊层,覆盖所述底层树脂层、所述第一电路图案和所述盲通路,所述阻焊层暴露所述第一电路图案的上表面的一部分,
其中在所述绝缘层的所述第一表面上形成的所述底层树脂层暴露所述盲通路的所述上表面。
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