JP4785946B2 - 印刷回路基板の製造方法 - Google Patents
印刷回路基板の製造方法 Download PDFInfo
- Publication number
- JP4785946B2 JP4785946B2 JP2009105524A JP2009105524A JP4785946B2 JP 4785946 B2 JP4785946 B2 JP 4785946B2 JP 2009105524 A JP2009105524 A JP 2009105524A JP 2009105524 A JP2009105524 A JP 2009105524A JP 4785946 B2 JP4785946 B2 JP 4785946B2
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- JP
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- Prior art keywords
- circuit board
- printed circuit
- manufacturing
- barrier layer
- carrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B38/00—Ancillary operations in connection with laminating processes
- B32B38/04—Punching, slitting or perforating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/428—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B38/00—Ancillary operations in connection with laminating processes
- B32B2038/0052—Other operations not otherwise provided for
- B32B2038/0092—Metallizing
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B38/00—Ancillary operations in connection with laminating processes
- B32B38/04—Punching, slitting or perforating
- B32B2038/047—Perforating
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2309/00—Parameters for the laminating or treatment process; Apparatus details
- B32B2309/08—Dimensions, e.g. volume
- B32B2309/10—Dimensions, e.g. volume linear, e.g. length, distance, width
- B32B2309/105—Thickness
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2310/00—Treatment by energy or chemical effects
- B32B2310/08—Treatment by energy or chemical effects by wave energy or particle radiation
- B32B2310/0806—Treatment by energy or chemical effects by wave energy or particle radiation using electromagnetic radiation
- B32B2310/0843—Treatment by energy or chemical effects by wave energy or particle radiation using electromagnetic radiation using laser
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2457/00—Electrical equipment
- B32B2457/08—PCBs, i.e. printed circuit boards
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B38/00—Ancillary operations in connection with laminating processes
- B32B38/10—Removing layers, or parts of layers, mechanically or chemically
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0384—Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0548—Masks
- H05K2203/0554—Metal used as mask for etching vias, e.g. by laser ablation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
- H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/421—Blind plated via connections
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
- Y10T156/1056—Perforating lamina
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
- Y10T156/1056—Perforating lamina
- Y10T156/1057—Subsequent to assembly of laminae
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
- Y10T156/1062—Prior to assembly
- Y10T156/1064—Partial cutting [e.g., grooving or incising]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
- Y10T156/1082—Partial cutting bonded sandwich [e.g., grooving or incising]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
12a,12b 障壁層
14a,14b シード層
16a,16b メッキレジスト
18a,18b 回路パターン
19 ビアランド
20 接着層
30 穴
40 内層基板
42 内層回路
50 絶縁体
54 ビアホール
56,58 シード層
62,64 導電性物質
70 ソルダーレジスト
Claims (8)
- 層間導通のためのビアを含む印刷回路基板の製造方法であって、
キャリアの一面に回路パターンを形成する工程と、
前記キャリアの一面に前記ビアに対応する穴を加工する工程と、
前記キャリアの一面を絶縁体の一面に圧着する工程と、
前記キャリアを除去する工程と、
前記穴の位置に対応して前記絶縁体にビアホールを加工する工程と、
前記ビアホールの内部に導電性物質を形成する工程と、
を含む印刷回路基板の製造方法。 - 前記回路パターンを形成する工程は、
前記キャリアの一面に障壁層を形成する工程と、
前記障壁層上に前記回路パターンを形成する工程と、
を含むことを特徴とする請求項1に記載の印刷回路基板の製造方法。 - 前記障壁層上に前記障壁層と異なる材質の第1シード層を形成する工程をさらに含み、
前記回路パターンは、電解メッキにより前記第1シード層上に形成されることを特徴とする請求項2に記載の印刷回路基板の製造方法。 - 前記ビアホールの内部に導電性物質を形成する工程は、
前記ビアホールの内壁及び前記障壁層の表面に第2シード層を形成する工程と、
電解メッキにより前記ビアホールの内部及び前記障壁層上に導電性物質を形成する工程と、
前記障壁層上の導電性物質を除去する工程と、
を含むことを特徴とする請求項2に記載の印刷回路基板の製造方法。 - 前記キャリアの一面を前記絶縁体の一面に圧着する工程の前に、
前記第1シード層の一部を除去する工程をさらに含むことを特徴とする請求項3に記載の印刷回路基板の製造方法。 - 前記穴は、前記第1シード層及び前記障壁層を貫通するように形成されることを特徴とする請求項3に記載の印刷回路基板の製造方法。
- 前記回路パターンはビアランドを含み、
前記穴は、前記ビアランドの中央部を貫通するように形成されることを特徴とする請求項1に記載の印刷回路基板の製造方法。 - 前記導電性物質を形成する工程は、前記ビアホールの内部が充填されるように行われることを特徴とする請求項1に記載の印刷回路基板の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080071153A KR100960954B1 (ko) | 2008-07-22 | 2008-07-22 | 인쇄회로기판 제조방법 |
KR10-2008-0071153 | 2008-07-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010028091A JP2010028091A (ja) | 2010-02-04 |
JP4785946B2 true JP4785946B2 (ja) | 2011-10-05 |
Family
ID=41567567
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009105524A Expired - Fee Related JP4785946B2 (ja) | 2008-07-22 | 2009-04-23 | 印刷回路基板の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7972460B2 (ja) |
JP (1) | JP4785946B2 (ja) |
KR (1) | KR100960954B1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5607573B2 (ja) * | 2011-04-28 | 2014-10-15 | パナソニック株式会社 | 多層配線基板、部品内蔵基板、および多層配線基板の製造方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030143837A1 (en) * | 2002-01-28 | 2003-07-31 | Applied Materials, Inc. | Method of depositing a catalytic layer |
JP4488187B2 (ja) | 2003-06-27 | 2010-06-23 | Tdk株式会社 | ビアホールを有する基板の製造方法 |
JP4291279B2 (ja) * | 2005-01-26 | 2009-07-08 | パナソニック株式会社 | 可撓性多層回路基板 |
KR100779061B1 (ko) | 2006-10-24 | 2007-11-27 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
KR100776248B1 (ko) | 2006-11-21 | 2007-11-16 | 삼성전기주식회사 | 인쇄회로기판 제조방법 |
-
2008
- 2008-07-22 KR KR1020080071153A patent/KR100960954B1/ko active IP Right Grant
-
2009
- 2009-03-20 US US12/408,366 patent/US7972460B2/en active Active
- 2009-04-23 JP JP2009105524A patent/JP4785946B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100960954B1 (ko) | 2010-06-03 |
JP2010028091A (ja) | 2010-02-04 |
KR20100010253A (ko) | 2010-02-01 |
US20100018633A1 (en) | 2010-01-28 |
US7972460B2 (en) | 2011-07-05 |
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