CN102040375A - 低温烧结陶瓷材料、低温烧结陶瓷烧结体和多层陶瓷基板 - Google Patents

低温烧结陶瓷材料、低温烧结陶瓷烧结体和多层陶瓷基板 Download PDF

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CN102040375A
CN102040375A CN2010105090699A CN201010509069A CN102040375A CN 102040375 A CN102040375 A CN 102040375A CN 2010105090699 A CN2010105090699 A CN 2010105090699A CN 201010509069 A CN201010509069 A CN 201010509069A CN 102040375 A CN102040375 A CN 102040375A
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substrate
bao
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temperature sintered
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横山智哉
川田裕三
马场彰
川上弘伦
加藤功
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Murata Manufacturing Co Ltd
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Abstract

本发明解决如下问题:对于SiO2-BaO-Al2O3系低温烧结陶瓷材料而言,特别是将其作为原料工业上制造多层陶瓷基板时,存在原料批次间的品质(特别是烧结性)易于产生偏差。本发明中,作为用于构成多层陶瓷基板(1)的陶瓷层(2)而使用的陶瓷材料使用以下材料:以SiO2-BaO-Al2O3系低温烧结陶瓷材料作为基本成分,并且相对于该SiO2-BaO-Al2O3系基本成分100重量份,作为副成分含有以Fe2O3换算计为0.044~0.077重量份的铁,和以ZrO2换算计为0.30~0.55重量份的锆。优选的是所述SiO2-BaO-Al2O3系基本成分分别含有47~60重量%的SiO2,20~42重量%的BaO,5~30重量%的Al2O3

Description

低温烧结陶瓷材料、低温烧结陶瓷烧结体和多层陶瓷基板
技术领域
本发明涉及低温烧结陶瓷材料、低温烧结陶瓷烧结体和多层陶瓷基板,尤其涉及用于抑制低温烧结陶瓷材料的烧结性的偏差的改良。
背景技术
作为多层陶瓷基板中使用的电气绝缘体材料,已知有SiO2-BaO-Al2O3系低温烧结陶瓷材料。该材料由于可与铜之类的比电阻小的金属材料同时进行烧结、绝缘电阻高、介电常数小,因此,作为高频用的电子部件模块中使用的基板材料特别有用。
为了对SiO2-BaO-Al2O3系低温烧结陶瓷材料进行各种特性的改善,可以加入各种添加物。例如,如在日本特开2004-345928号公报(专利文献1)、日本特开2008-44829号公报(专利文献2)所公开的那样,有时加入Zr作为添加物。
在专利文献1的段落[0029]等中,公开了通过加入适量的锆,可以得到致密且烧结性好、Q值高的陶瓷烧结体的技术思想。另外,在专利文献2的段落[0074]等中,公开了通过加入适量的锆,可以得到高弯曲强度和高Qf值的技术思想。
然而,对于SiO2-BaO-Al2O3系低温烧结陶瓷材料而言,特别是将其作为原料工业上制造多层陶瓷基板时,存在原料批次间的品质(特别是烧结性)易于产生偏差的问题。
【专利文献】
专利文献1:日本特开2004-345928号公报
专利文献2:日本特开2008-44829号公报
发明内容
因此,本发明的目的在于,提供可以解决上述的问题的低温烧结陶瓷材料,烧结该低温烧结陶瓷材料而成的低温烧结陶瓷烧结体以及使用低温烧结陶瓷材料制造的多层陶瓷基板。
为了解决上述的技术性课题,本发明的低温烧结陶瓷材料的特征在于,其以SiO2-BaO-Al2O3系低温烧结陶瓷材料作为基本成分,并且,相对于该SiO2-BaO-Al2O3系基本成分100重量份,作为副成分含有以Fe2O3换算计为0.044~0.077重量份的铁和以ZrO2换算计为0.30~0.55重量份的锆。
在本发明的低温烧结陶瓷材料中,优选SiO2-BaO-Al2O3系基本成分分别含有47~60重量%的SiO2、20~42重量%的BaO和5~30重量%的Al2O3
另外,本发明是将上述本发明的低温烧结陶瓷材料在1050℃以下的温度条件下烧成而成的,也可以面向低温烧结陶瓷烧结体。
而且,本发明具备层叠了多个陶瓷层而成的层叠体,也可以面向多层陶瓷基板。本发明的多层陶瓷基板的特征在于,多个陶瓷层中的至少1层由上述本发明的低温烧结陶瓷烧结体构成。
在本发明的多层陶瓷基板中,优选还具备设置在层叠体的表面和/或内部的、包含铜系材料的导体图案。
根据本发明的低温烧结陶瓷材料,在SiO2-BaO-Al2O3系低温烧结陶瓷材料的基本成分中,加入规定量的铁和锆作为成为烧结助剂的副成分,严格地控制这些铁和锆的量。其结果是,对于使用烧结该低温烧结陶瓷材料而成的低温烧结陶瓷烧结体来构成的多层陶瓷基板而言,可以实现尺寸精度高、镀覆附着性优良、对于表面导体膜的基板的接合强度高、基板本身强度(抗折强度、弯曲强度)高、翘曲或起伏小、基板密度高(电气特性优良)等优点。
特别是对于SiO2-BaO-Al2O3系基本成分的组成的情况,在使其分别含有47~60重量%的SiO2、20~42重量%的BaO、和5~30重量%的Al2O3时,可以良好且确实地实现上述的优点。
附图说明
图1是图解性地表示使用本发明的低温烧结陶瓷材料来制造的多层陶瓷基板1的剖面图。
符号的说明
1多层陶瓷基板
2陶瓷层
3层叠体
4,5外部导体膜
6内部导体膜
7贯通孔导体
具体实施方式
参照图1,对本发明适用的多层陶瓷基板的一例进行说明。
图1所示的多层陶瓷基板1,具备层叠了多个陶瓷层2而构成的层叠体3。在该层叠体3中,与陶瓷层2的特定的部分相关联地设置有各种导体图案。
作为上述的导体图案,有在层叠体3的层叠方向中的端面上形成的若干个外部导体膜4和5、沿着陶瓷层2之间的特定的界面形成的若干个内部导体膜6、以及以贯通陶瓷层2的特定部分的方式形成的若干个贯通孔导体7等。
上面侧的外部导体膜4是用于与应该在层叠体3的外表面上搭载的电子部件8和9连接而使用的。在图1中,图示有例如半导体装置那样的具备突起电极10的电子部件8、以及例如片状电容器那样的具备面状的端子电极11的电子部件9。
另外,下面侧的外部导体膜5是用于与安装该多层陶瓷基板1的主板(未图示)连接而使用的。
这样的多层陶瓷基板1所具备的层叠体3具备应该成为陶瓷层2的多个层叠了的陶瓷胚片层、以及利用导电性糊剂形成的内部导体膜6和贯通孔导体7,根据情况,还具备利用导电性糊剂形成的外部导体膜4和5,通过将未烧制的层叠体烧成可以得到层叠体3。
对于上述的未烧制的层叠体中的陶瓷胚片层的层叠结构而言,典型的情况是通过将成形了陶瓷浆料而得到的多片陶瓷胚片层叠来得到,导体图案,特别是内部的导体图案,可以在层叠前的陶瓷胚片上设置。
陶瓷浆料,在后述的本发明中,在具有成为特征的组成的低温烧结陶瓷材料中加入聚乙烯基缩丁醛之类的有机粘结剂、甲苯和乙醇之类的溶剂、邻苯二甲酸二正丁酯之类的增塑剂以及其他根据需要的分散剂等的添加物,进行浆料化,由此可以得到。
在为了进行使用陶瓷浆料得到陶瓷胚片的成形时,例如可以通过在包含聚对苯二甲酸乙二酯之类的有机树脂的载体膜上,应用刮刀法将陶瓷浆料成形为片状的方法来进行。
在陶瓷胚片中设置导体图案时,优选使用含有铜作为导电成分的主成分的导电性糊剂,陶瓷胚片中设置用于贯通孔导体7的贯通孔,在贯通孔中填充导电性糊剂,并且通过例如丝网印刷法形成用于内部导体膜6的导电性糊剂膜以及根据需要的用于外部导体膜4和5的导电性糊剂膜。
通过按照规定的顺序层叠这样的陶瓷胚片,沿层叠方向以例如1000kgf/cm2的压力进行压合,由此可以得到未烧制的层叠体。
在该未烧制的层叠体中,虽然没有图示,但是也可以设置用于收容其他的电子部件的腔洞、用于固定覆盖电子部件8和9等的覆盖物的接合部分。
未烧制的层叠体在陶瓷胚片层中所含的低温烧结陶瓷材料可以烧结的温度以上,例如900℃以上,导体图案中所含金属的熔点以下,例如为铜或金时为1050℃以下的温度区域进行烧成。
另外,导体图案中所含的金属为铜时,烧成可以在氮气氛之类的非氧化性气氛中进行,在900℃以下的温度条件下完成脱粘结剂,另外,降温时,将氧分压设置得较低,以使得在烧成结束时铜不被实质上氧化。
烧成温度为例如980℃以上时,作为导体图案中所含的金属,虽然不能使用银,但是可以使用钯含量为20重量%以上的Ag-Pd系合金。这时,可以在空气中实施烧成。
烧成温度为例如950℃以下时,作为导体图案中所含的金属,可以使用银。
如以上所述,结束烧成工序时,可以得到图1中示出的层叠体3。
其后,根据需要,形成外部导体膜4和/或5,安装电子部件8和9,由此,完成图1示出的多层陶瓷基板1。
作为上述的陶瓷浆料中所含的低温烧结陶瓷材料,可以使用以下材料,即所述材料以SiO2-BaO-Al2O3系低温烧结陶瓷材料作为基本成分,相对于该SiO2-BaO-Al2O3系基本成分100重量份,作为副成分含有以Fe2O3换算计为0.044~0.077重量份的铁,和以ZrO2换算计为0.30~0.55重量份的锆。
这样,将作为副成分的铁和锆的添加量严格地控制在规定的范围内,由此可以实现以下的作用。
(1)防止当陶瓷的烧成收缩过渡发展时多层陶瓷基板1变成比设计值更小的尺寸(过烧结状态)。或者,防止当烧成收缩(即致密化)没有充分进行时多层陶瓷基板1变成比设计值更大的尺寸(烧焙过浅的状态)。
(2)防止在多层陶瓷基板1的表背面或多层陶瓷基板1的表面所具有的外部导体膜4和5的表面上渗出玻璃(烧成中通过基本成分的反应的进行而生成的玻璃成分)的情况(过烧结状态)。其结果是,防止外部导体膜4和5上的镀覆附着性的下降或外部导体膜4和5的耐剥离强度的下降。
(3)防止基本成分中的SiO2(石英/quartz)向方石英(cristobalite)相转移而造成多层陶瓷基板1的强度下降(过烧结状态)。
(4)在集合基板(用于将作为多个子基板的多个多层陶瓷基板1取出的基板,其包含多个子基板以格子状排列而成的子基板区域及在其周围设置的耳部。)中,防止伴随烧结而发生起伏,特别是防止在耳部发生局部翘曲(烧焙过浅(焼きが甘い)的状态)。
(5)防止陶瓷层2、导体膜4~6和贯通孔导体7之类的导体图案不发生致密化而产生空隙(烧焙过浅的状态)。
因此,在得到的多层陶瓷基板1中,可以实现以下的优点:尺寸精度高、镀覆附着性优良、相对于表面导体膜的基板的接合强度高、基板本身的强度(抗折强度、弯曲强度)高、翘曲或起伏小、基板密度高(电气特性优良)等。
特别是涉及SiO2-BaO-Al2O3系基本成分的组成时,分别使其含有SiO247~60重量%、BaO20~42重量%、Al2O35~30重量%时,可以良好且确实地实现上述的优点。
此外,在具备具有上述的层叠结构的层叠体3的多层陶瓷基板1中,为了简单地构成1个陶瓷层2也可以使用烧成本发明的低温烧结陶瓷材料而成的低温烧结陶瓷烧结体。
另外,本发明的低温烧结陶瓷材料不限于上述那样的具备具有层叠结构的层叠体的多层陶瓷基板,在简单地具备1个陶瓷层的单层结构的陶瓷基板中也可以应用。
以下,对于为了确认本发明产生的效果而实施的实验例进行说明。
(实验例1)
首先,作为低温烧结陶瓷材料的基本成分的原料粉末,准备平均粒径(D50)都为2.0μm以下的SiO2、BaCO3和Al2O3的各粉末。接着,将这些原料粉末按照成为表1的“基本成分”所示的组成比率的方式秤量。此外,对于作为副成分的Fe2O3,以成为表1的“添加成分”所示的添加量的方式使其预先附着在上述SiO2粉末的表面。
接着,以800~1000℃的温度将混合上述原料粉末而得到的混合粉末进行预烧。预烧后,粉碎预烧物,在该粉碎时,以表1的“添加成分”所示的添加量加入ZrO2粉末,得到各试样的低温烧结陶瓷材料粉末。
在表1中,作为基本成分的SiO2、BaCO3和Al2O3以重量%作为单位来表示,它们的合计为100重量%。另一方面,对于作为添加成分的Fe2O3和ZrO2而言,将相对于基本成分100重量份的重量比率以重量份作为单位来表示。
接着,在上述的各试样的低温烧结陶瓷材料粉末中,加入作为有机粘结剂的聚乙烯基缩丁醛、作为溶剂的乙醇和作为增塑剂的邻苯二甲酸二辛酯,进行湿式混合,减压条件下进行脱泡处理,得到陶瓷浆料。
接着,利用刮刀法将陶瓷浆料成形为片状,进行干燥,切割为适当的尺寸,得到厚度50μm的陶瓷胚片。
接着,在陶瓷胚片上丝网印刷导电性糊剂,形成导电性糊剂膜。在此,作为导电性糊剂,使用将以铜作为主成分的金属粉末与有机粘结剂一起在溶剂中分散而制成糊剂状的物质。
接着,使陶瓷胚片成为规定尺寸,将10片这些陶瓷胚片重叠压合,得到用于集合基板的未烧制的层叠体。
接着,在非氧化性气氛中以950~1000℃的温度烧成未烧制的层叠体,由此得到使陶瓷胚片和导电性糊剂膜烧结的状态的各试样的集合基板。该集合基板为通过将其分割,可以取出多个多层陶瓷基板的基板。
对于由此得到的各试样,如表1所示地评价“尺寸精度”、“镀覆附着性”、“导体膜强度”、“基板强度”、“翘曲/起伏”以及“基板密度”。评价手法如下所述。
“尺寸精度”:求出得到的集合基板的烧结的X-Y平面方向的收缩率,该评价用来确认安装以后的集合基板是否能满足流水线工序的管理规格(收缩率的规格中心值:例如±0.6%),满足管理规格的试样为95%以上时评价为“○”,若为80%以上且小于95%时则评价为“△”,若小于80%则评价为“×”。
“镀覆附着性”:在集合基板的表面所具有的基于同时烧结的铜系导体膜上实施镀镍和镀金,检查镀覆状态的外观,将铜系导体膜的面积的95%以上被镀镍/镀金膜覆盖的试样评价为“○”,将铜系导体膜的面积的85%以上且小于95%被覆盖的试样评价为“△”,将只有铜系导体膜的面积的小于85%被覆盖的试样评价为“×”。
“导体膜强度”:集合基板的表面所具有的基于同时烧结的铜系导体膜上通过焊料接合金属棒,进行90度剥离试验(JIS Z0237),将未剥离的接合部为95%以上的情况评价为“○”,将未剥离的接合部为85%以上且小于95%的情况评价为“△”,将未剥离的接合部仅为小于85%的情况评价为“×”。
“基板强度”:依照“JIS R1601”测定由集合基板得到的试验片的抗折强度。将抗折强度为220MPa以上的试样评价为“○”,将抗折强度为180MPa以上且小于220MPa的试样评价为“△”,将抗折强度小于180MPa的试样评价为“×”。
“翘曲/起伏”:测定集合基板全体的翘曲以及集合基板耳部的局部的翘曲的状态,确认其是否满足工序的管理规格,满足管理规格的试样为95%以上,评价为“○”,若为80%以上且小于95%则评价为“△”,若小于80%则评价为“×”。
“基板密度”:对于由集合基板得到的试验片,通过阿基米德法测定密度,若规格密度为98%以上则评价为“○”,若为95%以上且小于98%则评价为“△”,若小于95%则评价为“×”。
【表1】
Figure BSA00000306564100081
如表1所示,相对于SiO2-BaO-Al2O3系基本成分100重量份,根据满足以0.044~0.077重量份的范围含有Fe2O3且以0.30~0.55重量份的范围含有ZrO2的条件的本发明的范围内的试样2~6、9~11和15~26,对于“尺寸精度”、“镀覆附着性”、“导体膜强度”、“基板强度”、“翘曲/起伏”和“基板密度”的各项目而言,为“○”或“△”的评价。
特别是,在本发明的范围内而且SiO2-BaO-Al2O3系基本成分满足分别含有47~60重量%的SiO2、20~42重量%的BaO、5~30重量%的Al2O3的条件的如试样2~6、9~11、16、17、20、21、24和25所示那样,“尺寸精度”、“镀覆附着性”、“导体膜强度”、“基板强度”、“翘曲/起伏”和“基板密度”的各项目都为“○”的评价。
虽然为本发明的范围内的试样,但是试样15中SiO2-BaO-Al2O3系基本成分中的SiO2的含量比47重量%少,因此对于“尺寸精度”、“导体膜强度”、“基板强度”和“基板密度”的各项目而言,为“△”的评价。另一方面,在试样18中,SiO2的含量比60重量%多,因此对于“尺寸精度”、“镀覆附着性”、“导体膜强度”和“基板密度”的各项目而言,为“△”的评价。
另外,虽然为本发明的范围内的试样,但是在试样19中,SiO2-BaO-Al2O3系基本成分中的BaO的含量比20重量%少,因此对于“尺寸精度”、“导体膜强度”、“基板强度”和“基板密度”的各项目而言,为“△”的评价。另一方面,在试样22中,BaO的含量比42重量%多,因此对于“镀覆附着性”的项目而言为“△”的评价。
另外,虽然为本发明的范围内的试样,但是在试样23中,SiO2-BaO-Al2O3系基本成分中的Al2O3的含量比5重量%少,因此对于“尺寸精度”和“基板强度”的各项目而言,为“△”的评价。另一方面,在试样26中,Al2O3的含量比30重量%少,因此对于“尺寸精度”、“导体膜强度”和“基板密度”的各项目而言,“△”的评价。
与此相对的是,对于本发明的范围外的试样1,作为添加成分的Fe2O3的添加量比0.044重量份少,因此对“尺寸精度”和“基板密度”的各项目而言,为“×”的评价,对于“基板密度”的项目而言,为“△”的评价。另一方面,在试样7,作为添加成分的Fe2O3的添加量比0.077重量份多,因此对于“镀覆附着性”、“导体膜强度”、“基板强度”和“基板密度”的各项目而言,为“×”的评价,对于“尺寸精度”的项目而言,为“△”的评价。
另外,在本发明的范围外的试样8中,作为添加成分的ZrO2的添加量比0.30重量份少,因此对于“尺寸精度”,“基板强度”和“翘曲/起伏”的各项目而言,为“×”的评价。另一方面,试样12中,作为添加成分的ZrO2的添加量比0.55重量份多,因此对于“镀覆附着性”、“导体膜强度”和“基板强度”的各项目而言,为“×”的评价,对于“基板密度”的项目而言,为“△”的评价。
而且,在本发明的范围外的试样13中,作为添加成分的Fe2O3的添加量比0.044重量份少,且作为添加成分的ZrO2的添加量比0.30重量份少,因此对于“尺寸精度”、“基板强度”和“翘曲/起伏”的各项目而言,为“×”的评价,对于“基板密度”的项目而言,为“△”的评价。
另外,在本发明的范围外的试样14中,作为添加成分的Fe2O3的添加量比0.077重量份多,且作为添加成分的ZrO2的添加量比0.55重量份多,因此对于“镀覆附着性”、“导体膜强度”、“基板强度”和“基板密度”的各项目而言,为“×”的评价,对于“尺寸精度”的项目而言,为“△”的评价。

Claims (5)

1.一种低温烧结陶瓷材料,其以SiO2-BaO-Al2O3系低温烧结陶瓷材料作为基本成分,并且,相对于该SiO2-BaO-Al2O3系基本成分100重量份,作为副成分含有以Fe2O3换算计为0.044~0.077重量份的铁和以ZrO2换算计为0.30~0.55重量份的锆。
2.根据权利要求1所述的低温烧结陶瓷材料,其中,所述SiO2-BaO-Al2O3系基本成分分别含有47~60重量%的SiO2、20~42重量%的BaO和5~30重量%的Al2O3
3.一种低温烧结陶瓷烧结体,其通过将权利要求1或2所述的低温烧结陶瓷材料在1050℃以下的温度进行烧成而成。
4.一种多层陶瓷基板,其具有层叠了多个陶瓷层而成的层叠体,所述多个陶瓷层中的至少1层由权利要求3所述的低温烧结陶瓷烧结体构成。
5.根据权利要求4的多层陶瓷基板,其还具备在所述层叠体的表面和/或内部设置的包含铜系材料的导体图案。
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