CN1020027C - 一种利用npn晶体管锁闩电压的横向pnp晶体管 - Google Patents

一种利用npn晶体管锁闩电压的横向pnp晶体管 Download PDF

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CN1020027C
CN1020027C CN90109971A CN90109971A CN1020027C CN 1020027 C CN1020027 C CN 1020027C CN 90109971 A CN90109971 A CN 90109971A CN 90109971 A CN90109971 A CN 90109971A CN 1020027 C CN1020027 C CN 1020027C
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CN1052573A (zh
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李镐真
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Quick Korea Semiconductor Co., Ltd.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0821—Combination of lateral and vertical transistors only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/735—Lateral transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/52—Circuit arrangements for protecting such amplifiers

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Abstract

一种利用NPN晶体管的锁闩电压的横向PNP晶体管，用NPN晶体管的集电极和发射极之间的锁闩电压替代PNP晶体管的击穿电压，其中在P型扩散层内部形成一个n+型扩散层并作为公共端，因此在静电放电路径提高了静电耐压能力。

Description

本发明涉及一种利用NPN型晶体管锁闩电压的横向PNP型晶体管，更具体地说，涉及这样一种晶体管，其中，在发射极或集电极内部形成n+扩散层，利用NPN型晶体管集电极-发射极锁闩电压（latch Voltage）释放静电（即使静电是加于PNP晶体管的基极的）来提高静电耐压性能。
在传统的横向PNP型晶体管中，如图1所示，n+型埋层11与n-型外延层12被置于p-型衬基上，作为发射极的P型扩散层13，作为集电极的P型扩散层14和作为基极的n+型扩散层15形成于n-型外延层12上。然后在这些扩散层上通过各自的接触孔形成电极13′、14′、15′。在图1中，标号16显示的是器件隔离层。
在此结构中，当静电加于横向PNP晶体管的基极时，静电的放电路径是由基极15和集电极14之间的路径或基极15与发射极13的路径构成的。
然而，众所周知，在放电路径形成的击穿电压电压越高，器件很容易被越低的静电电压损坏。
在实际当中，基极15与集电极14之间的击穿电压BVCBO和基极15与发射极13之间的击射电压BVEBO与高压一起形成，于是便产生这样的问题，即，器件被一个低静电电压损坏。
于是，本发明的目的就是提供一个横向PNP晶体管，通过利用NPN型晶体管的集电极和发射极之间的锁闩电压（Latch Voltage）来取代横向PNP型晶体管基极与集电极之间的击穿电压BVCBO和基极与发射机之间的击穿电压BVEBO来改善静电极穿。
根据本发明的原则，应该注意到的是在形成静电放电路径时，如果击穿电压是在较低电压下形成的，则静电耐压会增加。更具体地说，就是横向PNP型晶体管的击穿电压BVCBO和BVEBO被NPN型晶体管的发射极和集电极之间的锁闩电压LVCEO所取代，以提高静电耐压能力。为了实现这个目的，需要在对应于PNP型晶体管的发射区与集电压的扩散层内形成一个不同的n+型扩散层。
附图构成说明书的一部分并图示了本发明的最佳实施例。
图1是显示传统的横向PNP型晶体管的水平面和垂直方向结构示意图。
图2是显示根据本发明的横向PNP型晶体管的水平面和垂直方向结构示意图。
图3是显示根据本发明的横向PNP型晶体管的经过改进的水平面及垂直方向结构的示意图。
图4（a）是图2的等效电路。
图4（b）是图3的等效电路。
图5是用来说明图4（a）的等效电路应用于传统的OP放大器的输入端的电路结构的例子。
以下将通过参考附图对本发明进行详细描述。
图2显示了n+型扩散层根据本发明形成于横向PNP晶体管集 电区的结构。在图2中，n+埋层11和n-外延层12相继沉积在p-衬基上，于是，作为发射极的P型扩散层13，作为集电极的P型扩散层14作为基极的n+型扩散层15在n-型外延层12内各自形成。在作为集电极的P型扩散层14内形成n+型扩散层并与集电极电极14′相连。这里，图的下半部分显示的是横向PNP晶体管的垂直结构，图的上半部分显示的是横向PNP晶体管的水平结构。
图3显示了n+型扩散层按照本发明形成于横向PNP晶体管发射区内部的情况的结构。在此结构中，P-型衬基层10，n+型埋层11和n-型外延层12相继沉积，而且作为发射极的P型扩散层13，作为集电极的P型扩散层14及作为基极的n+型扩散层15是处于n-型外延层之内的。然后，在作为发射极的P型扩散层13内形成n+型扩散层构成发射极电极。
此外，图4（a）是图2的等效电路图。在图中，晶体管Q11的基极与集电极分别接于晶体管Q12的集电极与发射极。晶体管Q12的基极与集电极分别连接到公共端。晶体管Q11包括扩散层14作为集电极并且n+型扩散层20公共连接到晶体管Q11的集电极。
图4（b）是图3的等效电路图。晶体管Q21的基极和发射极分别接于晶体管Q2的集电极和发射极，晶体管Q22的基极和发射极各自连接公共端。晶体管21由图3所示的扩散层13、14 15构成，并且作为发射极的P型扩散层13和n+型层21共同接于晶体管Q21的发射极。
图5显示的是在图4（a）显示的结构基础上构成的差分放大 器。图5显示的结构是本发明应用于OP放大器输入部分的电路的电路。
在这个作为OP放大器输入电路的差分放大器中，晶体管Q2和Q3作为差分放大器的基本晶体管，晶体管Q4与Q5的发射极与集电极分别接于晶体管Q2与Q3的集电极和基极，晶体管Q4和Q5的基极与发射极各自接于公共端。晶体管Q2和Q3的集电极分别接于晶体管Q6和Q7的集电极，并通过Q6和Q7接于电阻R2和R3，晶体管Q6和Q7的基极连接在一起。晶体管Q3的输出提供给晶体管Q8，然后，晶体管Q8的输出再提供给OP放大器（图中未画出）。
在此例中，差分放大器包括晶体管Q2和Q4及晶体管Q3和Q5，它们具有图4（a）所示的结构并作为基本结构（如图5中A所示）。
以下，将参考图5的结构对本发明进行描述。
晶体管Q1的基极加有偏置电压，其发射极通过电阻R1接于电源电压VCC，于是，将电流提供给差分放大器。在图5中，电阻R4作为该输入电路的负载元件。
当正的静电压加于具有图2所示的结构的横向PNP晶体管的集电极14和基极15时，对传统的横向PNP晶体管而言，其放电路径的形成取决于击穿电压BVCBO。在本发明中，其放电路径是由NPN晶体管的锁闩电压LVCBO形成的。同时，横向PNP晶体管的击穿电压BVCBO比NPN晶体管的锁闩电压LVCEO高，所以在NPN晶体管Q12的锁闩电压LVCEO的放电路径的静电耐压比PNP晶体管Q11的击穿电压LVCBO的放电路径的静电耐压 高。
根据本发明，提供一种新型横向PNP晶体管，其在电路中起一个横向晶体管的作用，并提高了静电耐压能力。同样，前述的原则也将适用于如图3和图4所示的在发射区13内形成n+型扩散层的情况。
本发明如前述通过利用n+型扩散层而不是增加NPN晶体管，提供一种新的横向PNP晶体管，通过这种方法，增加了足够的静电耐压能力。

Claims (4)

1、一种利用NPN晶体管闩锁电压的横向PNP晶体管，该晶体管包括一个作为发射区的第一P型扩散层，一个作为基区的第一n+扩散层和一个作为集电区物第二P扩散层，其特征在于至少在两个所说的P型扩散层中的一个之内设置一个第二n+型扩散层，所说的设置了第二n+型扩散层的P型扩散层与其内所设置的第二n+型扩层具有一个公共引出端。
2、根据权利要求1的利用NPN晶体管闩锁电压的横向PNP晶体管，其中所述的设置了第二n+扩散层的P型扩散层是作为一个集电极。
3、根据权利要求1的利用NPN晶体管闩锁电压的横向PNP晶体管，其中所述的设置了第二n+扩散层的P型扩散层是作为一个发射极。
4、根据权利要求1的利用NPN晶体管闩锁电压的横向PNP晶体管，其中所述的设置了第二n+扩散层的P型扩散层是作为一个集电极和发射极，所述的n+型扩散层分别形成于后来作为集电极的P型扩散层和后来作为发射极的P型扩散层之内。
CN90109971A 1989-12-16 1990-12-15 一种利用npn晶体管锁闩电压的横向pnp晶体管 Expired - Lifetime CN1020027C (zh)

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