CN101911292B - 半导体的微焊盘形成 - Google Patents
半导体的微焊盘形成 Download PDFInfo
- Publication number
- CN101911292B CN101911292B CN2008801238236A CN200880123823A CN101911292B CN 101911292 B CN101911292 B CN 101911292B CN 2008801238236 A CN2008801238236 A CN 2008801238236A CN 200880123823 A CN200880123823 A CN 200880123823A CN 101911292 B CN101911292 B CN 101911292B
- Authority
- CN
- China
- Prior art keywords
- semiconductor device
- copper
- tin
- forms
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07232—Compression bonding, e.g. thermocompression bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
- H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/969,368 | 2008-01-04 | ||
| US11/969,368 US7807572B2 (en) | 2008-01-04 | 2008-01-04 | Micropad formation for a semiconductor |
| PCT/US2008/086920 WO2009088659A2 (en) | 2008-01-04 | 2008-12-16 | Micropad formation for a semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101911292A CN101911292A (zh) | 2010-12-08 |
| CN101911292B true CN101911292B (zh) | 2012-06-20 |
Family
ID=40844919
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008801238236A Active CN101911292B (zh) | 2008-01-04 | 2008-12-16 | 半导体的微焊盘形成 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7807572B2 (https=) |
| JP (1) | JP5248627B2 (https=) |
| CN (1) | CN101911292B (https=) |
| TW (1) | TWI442476B (https=) |
| WO (1) | WO2009088659A2 (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2298960A1 (en) * | 2009-08-24 | 2011-03-23 | ATOTECH Deutschland GmbH | Method for electroless plating of tin and tin alloys |
| US20120175772A1 (en) * | 2011-01-07 | 2012-07-12 | Leung Andrew K | Alternative surface finishes for flip-chip ball grid arrays |
| US9117772B2 (en) * | 2012-06-19 | 2015-08-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding package components through plating |
| JP6079374B2 (ja) * | 2013-03-29 | 2017-02-15 | 三菱マテリアル株式会社 | ハンダ粉末の製造方法及びこの粉末を用いたハンダ用ペースト |
| JP6181441B2 (ja) * | 2013-06-24 | 2017-08-16 | 新光電気工業株式会社 | パッド構造、実装構造、及び、製造方法 |
| DE102016109349A1 (de) * | 2016-05-20 | 2017-11-23 | Infineon Technologies Ag | Chipgehäuse, verfahren zum bilden eines chipgehäuses und verfahren zum bilden eines elektrischen kontakts |
| US11276659B2 (en) | 2020-02-28 | 2022-03-15 | Micron Technology, Inc. | Methods for forming elements for microelectronic components, related conductive elements, and microelectronic components, assemblies and electronic systems incorporating such conductive elements |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1561544A (zh) * | 2001-07-14 | 2005-01-05 | 摩托罗拉公司 | 半导体器件及其制造方法 |
Family Cites Families (35)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3395040A (en) * | 1965-01-06 | 1968-07-30 | Texas Instruments Inc | Process for fabricating cryogenic devices |
| US4692349A (en) * | 1986-03-03 | 1987-09-08 | American Telephone And Telegraph Company, At&T Bell Laboratories | Selective electroless plating of vias in VLSI devices |
| US4832799A (en) * | 1987-02-24 | 1989-05-23 | Polyonics Corporation | Process for coating at least one surface of a polyimide sheet with copper |
| US5309632A (en) * | 1988-03-28 | 1994-05-10 | Hitachi Chemical Co., Ltd. | Process for producing printed wiring board |
| US5162144A (en) * | 1991-08-01 | 1992-11-10 | Motorola, Inc. | Process for metallizing substrates using starved-reaction metal-oxide reduction |
| US5196053A (en) * | 1991-11-27 | 1993-03-23 | Mcgean-Rohco, Inc. | Complexing agent for displacement tin plating |
| KR970701428A (ko) * | 1994-02-16 | 1997-03-17 | 알베르트 발도르프, 롤프 옴케 | 3차원 회로 장치의 제조 방법(process for producing a three-dimensional circuit) |
| JPH09170083A (ja) * | 1995-12-20 | 1997-06-30 | Mitsubishi Electric Corp | スズまたはスズ合金の無電解めっき方法 |
| US6245658B1 (en) * | 1999-02-18 | 2001-06-12 | Advanced Micro Devices, Inc. | Method of forming low dielectric semiconductor device with rigid, metal silicide lined interconnection system |
| US6882045B2 (en) * | 1999-10-28 | 2005-04-19 | Thomas J. Massingill | Multi-chip module and method for forming and method for deplating defective capacitors |
| US6361823B1 (en) * | 1999-12-03 | 2002-03-26 | Atotech Deutschland Gmbh | Process for whisker-free aqueous electroless tin plating |
| US6638847B1 (en) * | 2000-04-19 | 2003-10-28 | Advanced Interconnect Technology Ltd. | Method of forming lead-free bump interconnections |
| US6811658B2 (en) * | 2000-06-29 | 2004-11-02 | Ebara Corporation | Apparatus for forming interconnects |
| WO2002004704A2 (en) * | 2000-07-11 | 2002-01-17 | Applied Materials, Inc. | Method and apparatus for patching electrochemically deposited layers using electroless deposited materials |
| US6551931B1 (en) * | 2000-11-07 | 2003-04-22 | International Business Machines Corporation | Method to selectively cap interconnects with indium or tin bronzes and/or oxides thereof and the interconnect so capped |
| JP3642034B2 (ja) * | 2001-03-26 | 2005-04-27 | 日立電線株式会社 | 半導体装置用テープキャリア及びその製造方法 |
| US6680128B2 (en) * | 2001-09-27 | 2004-01-20 | Agilent Technologies, Inc. | Method of making lead-free solder and solder paste with improved wetting and shelf life |
| US6605874B2 (en) * | 2001-12-19 | 2003-08-12 | Intel Corporation | Method of making semiconductor device using an interconnect |
| US6824666B2 (en) * | 2002-01-28 | 2004-11-30 | Applied Materials, Inc. | Electroless deposition method over sub-micron apertures |
| JP2003282615A (ja) | 2002-03-20 | 2003-10-03 | Seiko Epson Corp | バンプの構造、バンプの形成方法、半導体装置およびその製造方法並びに電子機器 |
| JP2003282616A (ja) * | 2002-03-20 | 2003-10-03 | Seiko Epson Corp | バンプの形成方法及び半導体装置の製造方法 |
| US6750133B2 (en) * | 2002-10-24 | 2004-06-15 | Intel Corporation | Selective ball-limiting metallurgy etching processes for fabrication of electroplated tin bumps |
| JP3815429B2 (ja) * | 2002-12-05 | 2006-08-30 | 日立電線株式会社 | 半導体装置用テープキャリアの製造方法 |
| TWI229930B (en) * | 2003-06-09 | 2005-03-21 | Advanced Semiconductor Eng | Chip structure |
| US6924232B2 (en) * | 2003-08-27 | 2005-08-02 | Freescale Semiconductor, Inc. | Semiconductor process and composition for forming a barrier material overlying copper |
| US7049234B2 (en) * | 2003-12-22 | 2006-05-23 | Intel Corporation | Multiple stage electroless deposition of a metal layer |
| US7119019B2 (en) * | 2004-03-31 | 2006-10-10 | Intel Corporation | Capping of copper structures in hydrophobic ILD using aqueous electro-less bath |
| KR100597993B1 (ko) * | 2004-04-08 | 2006-07-10 | 주식회사 네패스 | 반도체 패키지용 범프, 그 범프를 적용한 반도체 패키지 및 제조방법 |
| KR100642633B1 (ko) * | 2004-06-11 | 2006-11-10 | 삼성전자주식회사 | 엠아이엠 캐패시터들 및 그의 제조 방법 |
| US7745376B2 (en) * | 2004-08-10 | 2010-06-29 | Nove Technologies, Inc. | Superconducting composite |
| US7078272B2 (en) * | 2004-09-20 | 2006-07-18 | Aptos Corporation | Wafer scale integration packaging and method of making and using the same |
| US7449409B2 (en) * | 2005-03-14 | 2008-11-11 | Infineon Technologies Ag | Barrier layer for conductive features |
| US7317253B2 (en) * | 2005-04-25 | 2008-01-08 | Sony Corporation | Cobalt tungsten phosphate used to fill voids arising in a copper metallization process |
| US7585760B2 (en) * | 2006-06-23 | 2009-09-08 | Intel Corporation | Method for forming planarizing copper in a low-k dielectric |
| US7572723B2 (en) * | 2006-10-25 | 2009-08-11 | Freescale Semiconductor, Inc. | Micropad for bonding and a method therefor |
-
2008
- 2008-01-04 US US11/969,368 patent/US7807572B2/en active Active
- 2008-12-16 WO PCT/US2008/086920 patent/WO2009088659A2/en not_active Ceased
- 2008-12-16 CN CN2008801238236A patent/CN101911292B/zh active Active
- 2008-12-16 JP JP2010541477A patent/JP5248627B2/ja active Active
- 2008-12-31 TW TW097151677A patent/TWI442476B/zh active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1561544A (zh) * | 2001-07-14 | 2005-01-05 | 摩托罗拉公司 | 半导体器件及其制造方法 |
Non-Patent Citations (1)
| Title |
|---|
| JP特开平10-70154A 1998.03.10 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20090176366A1 (en) | 2009-07-09 |
| WO2009088659A2 (en) | 2009-07-16 |
| JP5248627B2 (ja) | 2013-07-31 |
| JP2011508983A (ja) | 2011-03-17 |
| US7807572B2 (en) | 2010-10-05 |
| TW200939348A (en) | 2009-09-16 |
| CN101911292A (zh) | 2010-12-08 |
| TWI442476B (zh) | 2014-06-21 |
| WO2009088659A3 (en) | 2009-09-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: Texas in the United States Patentee after: NXP America Co Ltd Address before: Texas in the United States Patentee before: Fisical Semiconductor Inc. |