CN101911292B - 半导体的微焊盘形成 - Google Patents
半导体的微焊盘形成 Download PDFInfo
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- CN101911292B CN101911292B CN2008801238236A CN200880123823A CN101911292B CN 101911292 B CN101911292 B CN 101911292B CN 2008801238236 A CN2008801238236 A CN 2008801238236A CN 200880123823 A CN200880123823 A CN 200880123823A CN 101911292 B CN101911292 B CN 101911292B
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Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/969,368 | 2008-01-04 | ||
| US11/969,368 US7807572B2 (en) | 2008-01-04 | 2008-01-04 | Micropad formation for a semiconductor |
| PCT/US2008/086920 WO2009088659A2 (en) | 2008-01-04 | 2008-12-16 | Micropad formation for a semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101911292A CN101911292A (zh) | 2010-12-08 |
| CN101911292B true CN101911292B (zh) | 2012-06-20 |
Family
ID=40844919
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008801238236A Active CN101911292B (zh) | 2008-01-04 | 2008-12-16 | 半导体的微焊盘形成 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7807572B2 (enExample) |
| JP (1) | JP5248627B2 (enExample) |
| CN (1) | CN101911292B (enExample) |
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| EP2298960A1 (en) * | 2009-08-24 | 2011-03-23 | ATOTECH Deutschland GmbH | Method for electroless plating of tin and tin alloys |
| US20120175772A1 (en) * | 2011-01-07 | 2012-07-12 | Leung Andrew K | Alternative surface finishes for flip-chip ball grid arrays |
| US9117772B2 (en) * | 2012-06-19 | 2015-08-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding package components through plating |
| JP6079374B2 (ja) * | 2013-03-29 | 2017-02-15 | 三菱マテリアル株式会社 | ハンダ粉末の製造方法及びこの粉末を用いたハンダ用ペースト |
| JP6181441B2 (ja) * | 2013-06-24 | 2017-08-16 | 新光電気工業株式会社 | パッド構造、実装構造、及び、製造方法 |
| DE102016109349A1 (de) | 2016-05-20 | 2017-11-23 | Infineon Technologies Ag | Chipgehäuse, verfahren zum bilden eines chipgehäuses und verfahren zum bilden eines elektrischen kontakts |
| US11276659B2 (en) * | 2020-02-28 | 2022-03-15 | Micron Technology, Inc. | Methods for forming elements for microelectronic components, related conductive elements, and microelectronic components, assemblies and electronic systems incorporating such conductive elements |
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| CN1561544A (zh) * | 2001-07-14 | 2005-01-05 | 摩托罗拉公司 | 半导体器件及其制造方法 |
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- 2008-12-16 JP JP2010541477A patent/JP5248627B2/ja active Active
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| CN1561544A (zh) * | 2001-07-14 | 2005-01-05 | 摩托罗拉公司 | 半导体器件及其制造方法 |
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Also Published As
| Publication number | Publication date |
|---|---|
| WO2009088659A3 (en) | 2009-09-03 |
| CN101911292A (zh) | 2010-12-08 |
| US20090176366A1 (en) | 2009-07-09 |
| TW200939348A (en) | 2009-09-16 |
| WO2009088659A2 (en) | 2009-07-16 |
| TWI442476B (zh) | 2014-06-21 |
| JP2011508983A (ja) | 2011-03-17 |
| JP5248627B2 (ja) | 2013-07-31 |
| US7807572B2 (en) | 2010-10-05 |
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