CN101779284B - 用于制造不同高度的相邻硅鳍的方法 - Google Patents

用于制造不同高度的相邻硅鳍的方法 Download PDF

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CN101779284B
CN101779284B CN2008801032765A CN200880103276A CN101779284B CN 101779284 B CN101779284 B CN 101779284B CN 2008801032765 A CN2008801032765 A CN 2008801032765A CN 200880103276 A CN200880103276 A CN 200880103276A CN 101779284 B CN101779284 B CN 101779284B
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B·S·多伊尔
B-Y·吉恩
U·沙阿
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Abstract

一种用于制造不同高度的相邻硅鳍的方法包括：提供硅衬底，所述硅衬底具有沉积在其上的隔离层，对所述隔离层进行构图以形成第一和第二隔离结构，对所述硅衬底进行构图以形成在所述第一隔离结构下方的第一硅鳍以及在所述第二隔离结构下方的第二硅鳍，在所述衬底上沉积绝缘层；平坦化所述绝缘层以暴露所述第一和第二隔离结构的顶表面，沉积掩蔽层且对所述掩蔽层进行构图以掩蔽所述第一隔离结构但不掩蔽所述第二隔离结构，应用湿法蚀刻以去除所述第二隔离结构且暴露所述第二硅鳍，在所述第二硅鳍上外延沉积硅层，以及使所述绝缘层凹陷以暴露所述第一硅鳍的至少一部分和所述第二硅鳍的至少一部分。

Description

用于制造不同高度的相邻硅鳍的方法
背景技术
在集成电路的制造中，用于多栅极晶体管中、也被称为硅“鳍”的半导体主体通常形成有均匀的尺寸。为了产生更多的驱动电流，由于没有适用的中等尺寸的鳍，所以鳍的数量必须增加。当前需要具有不同尺寸的硅鳍。例如，对于逻辑和存储器晶体管的约束是不同的——逻辑晶体管要求深的鳍以最大化ldsat/布图面积(layout area)，而存储器晶体管要求相对浅的鳍。此外，为了传输晶体管以及在静态随机存取存储(SRAM)器件中的拉降(pull-down)，需要晶体管宽度差。
一种用于制造具有不同尺寸的鳍的常规解决方法以制造均匀的硅鳍开始。如图1A所示，将诸如浅沟槽隔离(STI)材料的绝缘材料104沉积在衬底100上的均匀鳍102周围。然后，该常规工艺以不同的深度蚀刻STI材料104，以暴露硅鳍102的不同高度，如图1B所示。因此，STI材料104的高度在整个衬底100的表面上发生变化。
该现有技术方案的问题在于后来用来形成栅极电极的多晶硅将发生什么。在沉积多晶硅层并且对其平坦化之后，必须对多晶硅进行构图以形成栅极电极106。这要求向下蚀刻多晶硅至STI材料104的表面。由于STI材料104的高度在整个衬底上发生变化，所以一些多晶硅栅极106的构图到达其端点，而其他的仍在被蚀刻，如图1B所示。然后，在蚀刻多晶硅栅极的剩余部分时，首先到达其端点的多晶硅栅极经历过蚀刻和凹口，对于较短的鳍来说将导致更短的沟道效应。因此，需要改善的工艺来形成改变高度的硅鳍。
附图说明
图1A和1B示出了形成不同高度的硅鳍的现有技术方法的问题。
图2是根据本发明的实施方式制造不同高度的硅鳍的方法。
图3A至3H示出了随着执行图2的方法所形成的结构。
具体实施方式
这里所述的是制造不同高度的硅鳍的系统和方法。在以下描述中，将利用本领域技术人员为向其它本领域技术人员传达其工作内容而通常采用的术语来描述示例性实施方式的各方面。然而，本领域的技术人员将会明了，可以仅利用一些所述方面来实施本发明。出于解释的目的，对具体的数量、材料和构造进行了阐述，以便提供对示例性实施方式透彻的理解。然而，本领域的技术人员将会明了，可以在没有这些具体细节的情况下实施本发明。在其它情况下，省略或简化了公知特征，以免使示例性实施方式不清楚。
将以最有助于理解本发明的方式来依次把各个操作描述为多个分立的操作，然而，不应将描述的顺序视为暗指这些操作必定与顺序有关。具体而言，不必按照所呈现的顺序来执行这些操作。
本发明的实施方式提供了制造具有不同尺寸的相邻硅鳍，例如相对长的硅鳍相邻于相对短的硅鳍的方法。这使得能够彼此相邻地形成具有不同宽度的半导体主体的晶体管。这里所提供的实施方式能够形成这种硅鳍，而不会发生常规的问题，例如随后的多晶硅栅极电极的过蚀刻或凹口(notching)。
根据本发明的实施方式，图2是在相同衬底上制造相对短的硅鳍和相对长的硅鳍的方法200，该方法没有如上所述的多晶硅恶化的问题。图3A至3H示出了在执行图2的方法时所形成的结构。
方法200以提供半导体衬底开始(202)。在本发明的各实施方式中，所述半导体衬底是可以利用体硅形成的晶体衬底或绝缘体上硅子结构。在其他实施方式中，可以利用可以与硅或不与硅结合的替代材料形成所述半导体衬底，所述替代材料包括但不限于锗、锑化铟、碲化铅、砷化铟、磷化铟、砷化镓或锑化镓。尽管在这里描述了可以由其形成衬底的材料的一些示例，但是可以用作在其上可以构建半导体器件的基础的任何材料都落入本发明的精神和范围内。
在半导体衬底的表面上制造具有基本相同高度的两个或更多硅鳍(204)。根据本发明的实施方式，一种用于制造硅鳍的工艺以在衬底上沉积隔离层开始。所述隔离层可以利用诸如氮化物或氮氧化物的材料来形成，且厚度可以落在大约10纳米(nm)和100nm之间。在本发明的实施方式中，所述隔离层的厚度相对大于用于形成硅鳍的常规隔离层的厚度。如同将在下面所述，隔离层的厚度对应于相对短的硅鳍和相对长的硅鳍之间的高度差。
然后，使用常规的光刻工艺对所述隔离层进行构图，以形成用作限定硅鳍的掩模的隔离结构。接着进行硅蚀刻工艺，以通过隔离结构蚀刻衬底且制造硅鳍。根据本发明的实施方式，在衬底蚀刻工艺之后，所述隔离结构保留在硅鳍的顶部。在本发明的一些实施方式中，可以使用光刻胶材料替代隔离结构直接对硅鳍进行构图。
尽管在本说明书中将鳍称为“硅”鳍，但是本领域技术人员将意识到所述鳍通常由与衬底相同的材料形成。衬底通常由体硅构成，因此，所述鳍通常是硅鳍。在替代实施例中，所述鳍可以由与衬底不同的材料形成。例如，可以在由除了纯硅之外的材料形成的衬底上外延生长硅鳍。出于描述的目的，即使所述鳍可以由除了硅之外的材料形成，但是在这里所述鳍将被称为“硅鳍”。
在衬底(包括硅鳍之间的沟槽之内)的上方沉积绝缘层(206)。在一些实施方式中，所述绝缘层可以由用于常规浅沟槽隔离工艺的材料构成，所述材料包括但是不限于二氧化硅。在一些实施方式中，所述绝缘层可以由层间电介质材料构成，所述电介质材料包括但是不限于二氧化硅、掺碳氧化物、氮化硅、有机聚合物诸如全氟环丁烷、聚四氟乙烯、氟硅酸盐玻璃以及有机硅酸盐诸如倍半硅氧烷、硅氧烷，或有机硅酸盐玻璃。
图3A示出了具有一对彼此相邻的硅鳍302的衬底300。如同将在下面所说明的，一个硅鳍302A将用来形成相对短的硅鳍，而另一硅鳍302B将用来形成相对长的硅鳍。隔离结构304位于每一个硅鳍302的顶表面上。此外，隔离结构304的厚度对应于在要形成的相对短的硅鳍302A和相对长的硅鳍302B之间将生成的高度差。由诸如二氧化硅的材料形成的绝缘层306沉积在整个结构的上方且填充硅鳍302之间的沟槽。
然后，所述绝缘层被向下蚀刻或平坦化至所述隔离结构的顶部(208)。可以使用用于平坦化或蚀刻所述绝缘层的常规工艺。在暴露所述隔离结构的顶表面时，平坦化或蚀刻工艺的端点出现。图3B示出了在已经向下抛光至隔离结构304的顶表面之后的绝缘层306。
接下来，在所述绝缘层上沉积掩蔽层，且对所述掩蔽层进行构图以在将用来形成相对短的硅鳍的硅鳍的上方形成掩蔽结构(210)。所述掩蔽层可以由氮化硅或任何其他常规的掩蔽材料形成。所述经构图的掩蔽结构不掩蔽将用来形成相对长的硅鳍的硅鳍，从而使其对应的隔离结构保持暴露。图3C示出了掩蔽相对短的硅鳍302A但是不掩蔽将用来形成相对长的硅鳍的硅鳍302B的掩蔽结构308。
在掩蔽结构就位的情况下，通过应用适当的湿法蚀刻化学反应(chemistry)来蚀刻掉暴露的隔离结构(212)。在本发明的一些实施方式中，可以使用本领域公知的用于去除氮化物层的湿法或干法蚀刻工艺，诸如热磷酸。蚀刻工艺持续到去除了所述隔离结构且暴露下层的硅鳍为止。在本发明的实施方式中，基本去除或全部去除所述隔离结构。图3C示出了从硅鳍302B的顶部去除了被暴露的隔离结构304，从而在硅鳍302B的上方形成沟槽。
然后，执行外延沉积工艺以在所述被暴露的硅鳍上方的沟槽中生长硅，从而延伸所述硅鳍以形成相对长的硅鳍(214)。可以使用常规的外延沉积工艺以在所述被暴露的硅鳍上沉积硅层。例如，可以使用基于SiH4或二氯硅烷化学反应的常规低压化学气相外延沉积工艺以在所述被暴露的硅鳍上沉积硅层。在填充所述沟槽之后，接下来进行平坦化工艺以从绝缘层的表面上去除多余的硅(216)。可以使用本领域技术人员公知的常规平坦化工艺。在一些实施方式中，所述平坦化工艺还去除掩蔽结构。或者，可以使用蚀刻工艺来去除多余的硅。
所述被暴露的硅鳍上的硅生长以及随后的平坦化导致被暴露的硅鳍的高度增长了基本等于所述沟槽的高度的量。而所述沟槽的高度又由初始的隔离层的厚度来控制。因此，可以通过隔离层来控制所述相对长的硅鳍的高度。
图3D示出了如何通过在硅鳍302B的顶表面上外延沉积硅来延伸硅鳍302B。现在已经制造了与相对短的硅鳍302A相邻的相对长的硅鳍302B。如图所示，多余的硅趋于变为沉积在绝缘层306的表面上。图3E示出了在使用了平坦化工艺去除了多余的硅之后的长的硅鳍302B。
在完成相对长的硅鳍的形成之后，使绝缘层凹陷(218)。使所述绝缘层凹陷直至相对短的硅鳍的至少一部分被暴露。在相对短的硅鳍变得被暴露时，相对长的硅鳍的一部分已经被暴露。可以使用针对所选择的绝缘层的常规的蚀刻工艺，例如氢氟酸湿法蚀刻或干法氧化蚀刻。在一些实施方式中，现在可以去除相对短的硅鳍上的隔离结构。在其他实施方式中，隔离结构可以保留在相对短的硅鳍上。图3F示出了形成凹陷的绝缘层306。在所示的实施方式中，隔离结构304保留在相对短的硅鳍302A上。
然后，在短的和长的硅鳍的上方沉积栅极电介质层和栅极电极层(220)。可以使用诸如高k电介质材料的常规栅极电介质材料来形成栅极电介质层。可以使用常规栅极电极材料，诸如多晶硅或通常用于金属栅极电极的金属，来形成栅极电极层。图3G示出了在硅鳍302上的栅极电极层310。出于清楚的原因，在图3G中未示出栅极电介质层。
最后，可以对栅极电极层和栅极电介质层进行蚀刻以形成用于两个硅鳍中的每一个的单独的栅极电介质层和栅极电极(222)。在图3H中对此进行了图示。栅极电介质层和栅极电极层的蚀刻可以发生在这两层都被沉积之后的随后工艺中。或者，可以在沉积栅极电极层之前蚀刻栅极电介质层。
如图3H所示，因为形成凹陷的绝缘层306具有齐平的(level)表面，所以栅极电极层的蚀刻在这两个硅鳍302上同时到达其端点。这与如上所述和图1中所示的现有技术工艺是相反的，在图1中短的鳍上方的多晶硅蚀刻在长的鳍上方的多晶硅蚀刻完成之前到达其端点。此外，在现有技术工艺中，短的鳍顶部上的多晶硅在等待长的鳍上的多晶硅蚀刻到达其端点的同时经历过蚀刻和形成凹口。根据这里所述的实施方式，因为栅极电极蚀刻在两个鳍上同时结束，硅鳍既不会经历过蚀刻也不会出现凹口问题。
在一些实施方式中，可以在工艺中的该点去除短的鳍上的隔离结构。在另一些实施方式中，可以在工艺中的随后点发生隔离结构的去除。在再一些实施方式中，因为外延生长加宽了隔离结构下方的硅鳍，所以隔离结构可以保留在相对短的硅鳍上，并且仍然可以形成与栅极电极的接触。
如同本领域技术人员将意识到的，可以对上述工艺进行改变以制造具有多余两个高度的相邻硅鳍。例如，可以通过在硅完全填充沟槽之前停止外延沉积工艺来形成中等高度的硅鳍。可以由隔离结构或牺牲层来填充沟槽的剩余部分，然后掩蔽中等的硅鳍而另一硅鳍延伸至更大高度。
以上对本发明所示实施方式的描述，包括在摘要中描述的内容，并不旨在是穷举性的或将本发明限于所公开的精确形式。尽管在本文中为了说明的目的描述了本发明的具体实施方式和例子，但如本领域的技术人员将意识到，在本发明的范围内各种等价的修改都是可能的。
可以依据以上详细描述对本发明进行这些修改。在所附权利要求书中使用的术语不应被视为将本发明限于在说明书和权利要求中所公开的具体实施方式。相反，本发明的范围完全由所附权利要求书决定，应根据已经确立的权利要求解释的原则来解释所附权利要求书。

Claims (19)

1.一种用于形成半导体装置的方法，包括：
在半导体衬底上制造第一和第二硅鳍，其中，每一硅鳍包括在其顶表面上的隔离结构；
在所述半导体衬底上沉积绝缘层；
形成掩蔽所述第一硅鳍但不掩蔽所述第二硅鳍的掩蔽结构；
从所述第二硅鳍的顶部去除所述隔离结构；
通过在所述第二硅鳍的顶表面上外延沉积硅层来延伸所述第二硅鳍；以及
去除所述绝缘层的至少一部分。
2.根据权利要求1所述的方法，其中，所述隔离结构包括选自由氮化物和氮氧化物构成的组的材料。
3.根据权利要求2所述的方法，其中，所述隔离结构的厚度落入10nm和100nm之间。
4.根据权利要求1所述的方法，其中，所述绝缘层包括二氧化硅。
5.根据权利要求1所述的方法，其中，所述掩蔽结构包括氮化硅。
6.根据权利要求1所述的方法，其中，所述从所述第二硅鳍的顶部去除所述隔离结构包括应用湿法蚀刻化学反应以去除所述隔离结构。
7.根据权利要求1所述的方法，还包括在去除所述绝缘层的至少一部分之前去除所述掩蔽结构。
8.根据权利要求1所述的方法，还包括平坦化经外延沉积的硅层以去除多余的硅。
9.根据权利要求1所述的方法，还包括在形成所述掩蔽结构之前平坦化所述绝缘层以暴露所述隔离结构的顶表面。
10.一种用于形成半导体装置的方法，包括：
提供硅衬底，所述硅衬底具有沉积在其上的隔离层；
对所述隔离层进行构图以形成第一隔离结构和第二隔离结构；
对所述硅衬底进行构图以形成在所述第一隔离结构下方的第一硅鳍以及在所述第二隔离结构下方的第二硅鳍；
在所述半导体衬底上沉积绝缘层；
平坦化所述绝缘层以暴露所述第一隔离结构的顶表面和所述第二隔离结构的顶表面；
在所述绝缘层上沉积掩蔽层；
对所述掩蔽层进行构图以形成掩蔽结构，所述掩蔽结构掩蔽所述第一隔离结构但不掩蔽所述第二隔离结构；
应用湿法蚀刻化学反应以去除所述第二隔离结构且暴露所述第二硅鳍；
在所述第二硅鳍上外延沉积硅层；以及
使所述绝缘层凹陷以暴露所述第一硅鳍的至少一部分和所述第二硅鳍的至少一部分。
11.根据权利要求10所述的方法，还包括：
在所述第一硅鳍和所述第二硅鳍的上方沉积共形的电介质层；
在所述共形的电介质层上沉积电极层；以及
对所述电极层和所述电介质层进行构图以形成在所述第一硅鳍的顶部上的第一栅极电介质层和第一栅极电极以及在所述第二硅鳍的顶部上的第二栅极电介质层和第二栅极电极。
12.根据权利要求10所述的方法，还包括平坦化经外延沉积的硅层以去除多余的硅。
13.根据权利要求10所述的方法，其中，所述隔离层包括氮化物层或氮氧化物层。
14.根据权利要求10所述的方法，其中，所述掩蔽层包括氮化硅。
15.根据权利要求11所述的方法，其中，所述共形的电介质层包括高k电介质层。
16.根据权利要求11所述的方法，其中，所述电极层包括多晶硅层或金属层。
17.一种半导体装置，包括：
硅衬底；
形成在所述硅衬底上的第一硅鳍，其中，所述第一硅鳍具有第一高度；形成在所述硅衬底上的第二硅鳍，其中，所述第二硅鳍具有大于所述第一高度的第二高度；
形成在所述第一和第二硅鳍中的每一个上的栅极电介质层和栅极电极；以及
形成在所述第一和第二硅鳍周围并具有齐平表面的绝缘层，其中所述绝缘层的高度小于所述第一高度。
18.根据权利要求17所述的半导体装置，其中，所述第一硅鳍和所述第二硅鳍之间的高度差由在所述第二硅鳍的顶部上外延沉积硅层来产生。
19.根据权利要求17所述的半导体装置，其中，所述第一硅鳍与所述第二硅鳍相邻。
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