CN101606232B - 脉冲超高纵横比电介质蚀刻 - Google Patents

脉冲超高纵横比电介质蚀刻 Download PDF

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Publication number
CN101606232B
CN101606232B CN2008800041803A CN200880004180A CN101606232B CN 101606232 B CN101606232 B CN 101606232B CN 2008800041803 A CN2008800041803 A CN 2008800041803A CN 200880004180 A CN200880004180 A CN 200880004180A CN 101606232 B CN101606232 B CN 101606232B
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China
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etch
gas
etching
source
carbon
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CN2008800041803A
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Chinese (zh)
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CN101606232A (zh
Inventor
池贞浩
埃里克·A·埃德尔伯格
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Pan Lin Semiconductor Equipment Technology (shanghai) Co Ltd
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Lam Research Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/73Etching of wafers, substrates or parts of devices using masks for insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/089Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning

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  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Plasma Technology (AREA)
CN2008800041803A 2007-02-05 2008-02-04 脉冲超高纵横比电介质蚀刻 Active CN101606232B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/671,342 2007-02-05
US11/671,342 US7547636B2 (en) 2007-02-05 2007-02-05 Pulsed ultra-high aspect ratio dielectric etch
PCT/US2008/052950 WO2008097925A1 (en) 2007-02-05 2008-02-04 Pulsed ultra-high aspect ratio dielectric etch

Publications (2)

Publication Number Publication Date
CN101606232A CN101606232A (zh) 2009-12-16
CN101606232B true CN101606232B (zh) 2013-01-23

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2008800041803A Active CN101606232B (zh) 2007-02-05 2008-02-04 脉冲超高纵横比电介质蚀刻

Country Status (6)

Country Link
US (1) US7547636B2 (https=)
JP (2) JP5503976B2 (https=)
KR (1) KR101455883B1 (https=)
CN (1) CN101606232B (https=)
TW (1) TWI440083B (https=)
WO (1) WO2008097925A1 (https=)

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US8383001B2 (en) * 2009-02-20 2013-02-26 Tokyo Electron Limited Plasma etching method, plasma etching apparatus and storage medium
US8475673B2 (en) * 2009-04-24 2013-07-02 Lam Research Company Method and apparatus for high aspect ratio dielectric etch
US8394723B2 (en) * 2010-01-07 2013-03-12 Lam Research Corporation Aspect ratio adjustment of mask pattern using trimming to alter geometry of photoresist features
JP2012079792A (ja) * 2010-09-30 2012-04-19 Fujitsu Semiconductor Ltd 半導体装置の製造方法
KR102023784B1 (ko) * 2011-03-04 2019-09-20 도쿄엘렉트론가부시키가이샤 질화규소막 에칭 방법
US8420545B2 (en) * 2011-05-23 2013-04-16 Nanya Technology Corporation Plasma etching method and plasma etching apparatus for preparing high-aspect-ratio structures
JP5802454B2 (ja) * 2011-06-30 2015-10-28 株式会社日立ハイテクノロジーズ プラズマ処理方法
US20130119018A1 (en) * 2011-11-15 2013-05-16 Keren Jacobs Kanarik Hybrid pulsing plasma processing systems
US9224618B2 (en) * 2012-01-17 2015-12-29 Lam Research Corporation Method to increase mask selectivity in ultra-high aspect ratio etches
US20140051256A1 (en) * 2012-08-15 2014-02-20 Lam Research Corporation Etch with mixed mode pulsing
KR102099408B1 (ko) 2012-09-18 2020-04-10 도쿄엘렉트론가부시키가이샤 플라즈마 에칭 방법 및 플라즈마 에칭 장치
JP6267953B2 (ja) * 2013-12-19 2018-01-24 東京エレクトロン株式会社 半導体装置の製造方法
US9159561B2 (en) 2013-12-26 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method for overcoming broken line and photoresist scum issues in tri-layer photoresist patterning
JP6315809B2 (ja) * 2014-08-28 2018-04-25 東京エレクトロン株式会社 エッチング方法
US10599039B2 (en) * 2016-09-14 2020-03-24 Mattson Technology, Inc. Strip process for high aspect ratio structure
US10134600B2 (en) 2017-02-06 2018-11-20 Lam Research Corporation Dielectric contact etch
JP6840041B2 (ja) * 2017-06-21 2021-03-10 東京エレクトロン株式会社 エッチング方法
JP2019102483A (ja) * 2017-11-28 2019-06-24 東京エレクトロン株式会社 エッチング方法およびエッチング装置
JP7399863B2 (ja) * 2018-02-05 2023-12-18 ラム リサーチ コーポレーション アモルファスカーボン層の開孔プロセス
US10504744B1 (en) 2018-07-19 2019-12-10 Lam Research Corporation Three or more states for achieving high aspect ratio dielectric etch
KR102878622B1 (ko) * 2019-10-01 2025-10-30 램 리써치 코포레이션 고 종횡비 피처들의 제조 동안 열화를 방지하기 위한 마스크 캡슐화
CN113035706A (zh) * 2019-12-25 2021-06-25 中微半导体设备(上海)股份有限公司 一种等离子体刻蚀方法和刻蚀装置
JP7462444B2 (ja) * 2020-03-19 2024-04-05 東京エレクトロン株式会社 エッチング方法及びプラズマ処理装置
US12266534B2 (en) * 2020-06-15 2025-04-01 Tokyo Electron Limited Forming a semiconductor device using a protective layer
KR20230165819A (ko) * 2021-04-14 2023-12-05 도쿄엘렉트론가부시키가이샤 에칭 방법 및 플라즈마 처리 장치
US11495470B1 (en) * 2021-04-16 2022-11-08 Applied Materials, Inc. Method of enhancing etching selectivity using a pulsed plasma
TW202538865A (zh) * 2024-02-22 2025-10-01 日商東京威力科創股份有限公司 基板處理方法及基板處理系統

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US6617253B1 (en) * 1999-07-20 2003-09-09 Samsung Electronics Co., Ltd. Plasma etching method using polymer deposition and method of forming contact hole using the plasma etching method
US6759340B2 (en) * 2002-05-09 2004-07-06 Padmapani C. Nallan Method of etching a trench in a silicon-on-insulator (SOI) structure

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US6147005A (en) 1999-07-23 2000-11-14 Worldwide Semiconductor Manufacturing Corp. Method of forming dual damascene structures
JP2001332510A (ja) * 2000-05-25 2001-11-30 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
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US6617253B1 (en) * 1999-07-20 2003-09-09 Samsung Electronics Co., Ltd. Plasma etching method using polymer deposition and method of forming contact hole using the plasma etching method
US6368974B1 (en) * 1999-08-02 2002-04-09 United Microelectronics Corp. Shrinking equal effect critical dimension of mask by in situ polymer deposition and etching
US6759340B2 (en) * 2002-05-09 2004-07-06 Padmapani C. Nallan Method of etching a trench in a silicon-on-insulator (SOI) structure

Also Published As

Publication number Publication date
JP2013239729A (ja) 2013-11-28
KR20090125076A (ko) 2009-12-03
JP2010518605A (ja) 2010-05-27
TW200849377A (en) 2008-12-16
US20080188082A1 (en) 2008-08-07
JP5503976B2 (ja) 2014-05-28
US7547636B2 (en) 2009-06-16
CN101606232A (zh) 2009-12-16
WO2008097925A1 (en) 2008-08-14
TWI440083B (zh) 2014-06-01
KR101455883B1 (ko) 2014-11-03

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Patentee after: Pan Lin semiconductor equipment technology (Shanghai) Co., Ltd.

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Patentee before: Lam Research Corp.