CN101606232A - 脉冲超高纵横比电介质蚀刻 - Google Patents
脉冲超高纵横比电介质蚀刻 Download PDFInfo
- Publication number
- CN101606232A CN101606232A CNA2008800041803A CN200880004180A CN101606232A CN 101606232 A CN101606232 A CN 101606232A CN A2008800041803 A CNA2008800041803 A CN A2008800041803A CN 200880004180 A CN200880004180 A CN 200880004180A CN 101606232 A CN101606232 A CN 101606232A
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- China
- Prior art keywords
- gas
- source
- etching
- selective etch
- described method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000007789 gas Substances 0.000 claims abstract description 85
- 238000005530 etching Methods 0.000 claims abstract description 81
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 40
- 238000000034 method Methods 0.000 claims abstract description 38
- 230000005284 excitation Effects 0.000 claims abstract description 27
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 19
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 claims abstract description 16
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 15
- 239000001301 oxygen Substances 0.000 claims abstract description 15
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 15
- 150000001875 compounds Chemical class 0.000 claims abstract description 5
- 229920000642 polymer Polymers 0.000 claims description 33
- 229920002313 fluoropolymer Polymers 0.000 claims description 29
- 150000001721 carbon Chemical class 0.000 claims description 21
- 239000000758 substrate Substances 0.000 claims description 14
- 238000009832 plasma treatment Methods 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- 229910003481 amorphous carbon Inorganic materials 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- 238000012545 processing Methods 0.000 claims description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 4
- 230000001105 regulatory effect Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 description 43
- 238000000151 deposition Methods 0.000 description 11
- 230000008021 deposition Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 5
- 235000012431 wafers Nutrition 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000004380 ashing Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000000926 separation method Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000006116 polymerization reaction Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
- Plasma Technology (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (19)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/671,342 | 2007-02-05 | ||
US11/671,342 US7547636B2 (en) | 2007-02-05 | 2007-02-05 | Pulsed ultra-high aspect ratio dielectric etch |
PCT/US2008/052950 WO2008097925A1 (en) | 2007-02-05 | 2008-02-04 | Pulsed ultra-high aspect ratio dielectric etch |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101606232A true CN101606232A (zh) | 2009-12-16 |
CN101606232B CN101606232B (zh) | 2013-01-23 |
Family
ID=39676541
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2008800041803A Active CN101606232B (zh) | 2007-02-05 | 2008-02-04 | 脉冲超高纵横比电介质蚀刻 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7547636B2 (zh) |
JP (2) | JP5503976B2 (zh) |
KR (1) | KR101455883B1 (zh) |
CN (1) | CN101606232B (zh) |
TW (1) | TWI440083B (zh) |
WO (1) | WO2008097925A1 (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102800551A (zh) * | 2011-05-23 | 2012-11-28 | 南亚科技股份有限公司 | 制备高宽深比结构的等离子蚀刻方法及等离子蚀刻装置 |
CN103208420A (zh) * | 2012-01-17 | 2013-07-17 | 朗姆研究公司 | 具有提高的掩模选择比的蚀刻 |
CN113035706A (zh) * | 2019-12-25 | 2021-06-25 | 中微半导体设备(上海)股份有限公司 | 一种等离子体刻蚀方法和刻蚀装置 |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070218691A1 (en) * | 2006-03-17 | 2007-09-20 | Tokyo Electron Limited | Plasma etching method, plasma etching apparatus and computer-readable storage medium |
US8609546B2 (en) * | 2007-11-29 | 2013-12-17 | Lam Research Corporation | Pulsed bias plasma process to control microloading |
US9059116B2 (en) * | 2007-11-29 | 2015-06-16 | Lam Research Corporation | Etch with pulsed bias |
US20100099266A1 (en) * | 2008-09-22 | 2010-04-22 | Applied Materials, Inc. | Etch reactor suitable for etching high aspect ratio features |
US8383001B2 (en) * | 2009-02-20 | 2013-02-26 | Tokyo Electron Limited | Plasma etching method, plasma etching apparatus and storage medium |
US8475673B2 (en) * | 2009-04-24 | 2013-07-02 | Lam Research Company | Method and apparatus for high aspect ratio dielectric etch |
US8394723B2 (en) * | 2010-01-07 | 2013-03-12 | Lam Research Corporation | Aspect ratio adjustment of mask pattern using trimming to alter geometry of photoresist features |
JP2012079792A (ja) * | 2010-09-30 | 2012-04-19 | Fujitsu Semiconductor Ltd | 半導体装置の製造方法 |
US20130344702A1 (en) * | 2011-03-04 | 2013-12-26 | Tokyo Electron Limited | Method of etching silicon nitride films |
JP5802454B2 (ja) * | 2011-06-30 | 2015-10-28 | 株式会社日立ハイテクノロジーズ | プラズマ処理方法 |
US20130119018A1 (en) * | 2011-11-15 | 2013-05-16 | Keren Jacobs Kanarik | Hybrid pulsing plasma processing systems |
US20140051256A1 (en) * | 2012-08-15 | 2014-02-20 | Lam Research Corporation | Etch with mixed mode pulsing |
JP6141855B2 (ja) | 2012-09-18 | 2017-06-07 | 東京エレクトロン株式会社 | プラズマエッチング方法及びプラズマエッチング装置 |
JP6267953B2 (ja) * | 2013-12-19 | 2018-01-24 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
US9159561B2 (en) * | 2013-12-26 | 2015-10-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for overcoming broken line and photoresist scum issues in tri-layer photoresist patterning |
JP6315809B2 (ja) * | 2014-08-28 | 2018-04-25 | 東京エレクトロン株式会社 | エッチング方法 |
CN109690735B (zh) * | 2016-09-14 | 2023-02-21 | 玛特森技术公司 | 用于高纵横比结构的剥离方法 |
US10134600B2 (en) * | 2017-02-06 | 2018-11-20 | Lam Research Corporation | Dielectric contact etch |
JP6840041B2 (ja) * | 2017-06-21 | 2021-03-10 | 東京エレクトロン株式会社 | エッチング方法 |
JP2019102483A (ja) * | 2017-11-28 | 2019-06-24 | 東京エレクトロン株式会社 | エッチング方法およびエッチング装置 |
KR20200108361A (ko) * | 2018-02-05 | 2020-09-17 | 램 리써치 코포레이션 | 비정질 탄소 층 개방 프로세스 |
US10504744B1 (en) | 2018-07-19 | 2019-12-10 | Lam Research Corporation | Three or more states for achieving high aspect ratio dielectric etch |
CN114503240A (zh) * | 2019-10-01 | 2022-05-13 | 朗姆研究公司 | 用于防止在制造高深宽比特征过程中退化的掩模封装 |
JP7462444B2 (ja) * | 2020-03-19 | 2024-04-05 | 東京エレクトロン株式会社 | エッチング方法及びプラズマ処理装置 |
US20210391181A1 (en) * | 2020-06-15 | 2021-12-16 | Tokyo Electron Limited | Forming a semiconductor device using a protective layer |
CN117099189A (zh) * | 2021-04-14 | 2023-11-21 | 东京毅力科创株式会社 | 蚀刻方法和等离子体处理装置 |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4687543A (en) * | 1986-02-21 | 1987-08-18 | Tegal Corporation | Selective plasma etching during formation of integrated circuitry |
JP3239460B2 (ja) * | 1992-09-08 | 2001-12-17 | ソニー株式会社 | 接続孔の形成方法 |
US5843847A (en) * | 1996-04-29 | 1998-12-01 | Applied Materials, Inc. | Method for etching dielectric layers with high selectivity and low microloading |
US20010051438A1 (en) * | 1997-06-25 | 2001-12-13 | Samsung Electronics | Process and apparatus for dry-etching a semiconductor layer |
JP3336975B2 (ja) * | 1998-03-27 | 2002-10-21 | 日本電気株式会社 | 基板処理方法 |
US6284149B1 (en) * | 1998-09-18 | 2001-09-04 | Applied Materials, Inc. | High-density plasma etching of carbon-based low-k materials in a integrated circuit |
JP4153606B2 (ja) * | 1998-10-22 | 2008-09-24 | 東京エレクトロン株式会社 | プラズマエッチング方法およびプラズマエッチング装置 |
JP4408313B2 (ja) * | 1999-10-29 | 2010-02-03 | 東京エレクトロン株式会社 | プラズマ処理装置およびプラズマ処理方法 |
KR100327346B1 (ko) * | 1999-07-20 | 2002-03-06 | 윤종용 | 선택적 폴리머 증착을 이용한 플라즈마 식각방법 및 이를이용한 콘택홀 형성방법 |
US6147005A (en) * | 1999-07-23 | 2000-11-14 | Worldwide Semiconductor Manufacturing Corp. | Method of forming dual damascene structures |
US6368974B1 (en) * | 1999-08-02 | 2002-04-09 | United Microelectronics Corp. | Shrinking equal effect critical dimension of mask by in situ polymer deposition and etching |
JP2001332510A (ja) * | 2000-05-25 | 2001-11-30 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
US6831018B2 (en) * | 2001-08-21 | 2004-12-14 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating semiconductor device |
US20030153195A1 (en) * | 2002-02-13 | 2003-08-14 | Applied Materials, Inc. | Method and apparatus for providing modulated bias power to a plasma etch reactor |
US6759340B2 (en) * | 2002-05-09 | 2004-07-06 | Padmapani C. Nallan | Method of etching a trench in a silicon-on-insulator (SOI) structure |
US6916746B1 (en) * | 2003-04-09 | 2005-07-12 | Lam Research Corporation | Method for plasma etching using periodic modulation of gas chemistry |
US20050112891A1 (en) * | 2003-10-21 | 2005-05-26 | David Johnson | Notch-free etching of high aspect SOI structures using a time division multiplex process and RF bias modulation |
KR20070009729A (ko) * | 2004-05-11 | 2007-01-18 | 어플라이드 머티어리얼스, 인코포레이티드 | 불화탄소 에칭 화학반응에서 H2 첨가를 이용한탄소-도핑-Si 산화물 에칭 |
US7344975B2 (en) * | 2005-08-26 | 2008-03-18 | Micron Technology, Inc. | Method to reduce charge buildup during high aspect ratio contact etch |
US7432210B2 (en) * | 2005-10-05 | 2008-10-07 | Applied Materials, Inc. | Process to open carbon based hardmask |
US7531102B2 (en) * | 2006-03-31 | 2009-05-12 | Intel Corporation | Simultaneous selective polymer deposition and etch pitch doubling for sub 50nm line/space patterning |
-
2007
- 2007-02-05 US US11/671,342 patent/US7547636B2/en active Active
-
2008
- 2008-02-04 KR KR1020097018057A patent/KR101455883B1/ko active IP Right Grant
- 2008-02-04 JP JP2009548493A patent/JP5503976B2/ja active Active
- 2008-02-04 WO PCT/US2008/052950 patent/WO2008097925A1/en active Application Filing
- 2008-02-04 CN CN2008800041803A patent/CN101606232B/zh active Active
- 2008-02-05 TW TW097104575A patent/TWI440083B/zh active
-
2013
- 2013-07-11 JP JP2013145614A patent/JP2013239729A/ja not_active Withdrawn
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102800551A (zh) * | 2011-05-23 | 2012-11-28 | 南亚科技股份有限公司 | 制备高宽深比结构的等离子蚀刻方法及等离子蚀刻装置 |
CN102800551B (zh) * | 2011-05-23 | 2015-03-18 | 南亚科技股份有限公司 | 制备高宽深比结构的等离子蚀刻方法及堆叠式电容器的制备方法 |
CN103208420A (zh) * | 2012-01-17 | 2013-07-17 | 朗姆研究公司 | 具有提高的掩模选择比的蚀刻 |
CN103208420B (zh) * | 2012-01-17 | 2016-01-06 | 朗姆研究公司 | 具有提高的掩模选择比的蚀刻 |
CN113035706A (zh) * | 2019-12-25 | 2021-06-25 | 中微半导体设备(上海)股份有限公司 | 一种等离子体刻蚀方法和刻蚀装置 |
Also Published As
Publication number | Publication date |
---|---|
JP5503976B2 (ja) | 2014-05-28 |
JP2013239729A (ja) | 2013-11-28 |
CN101606232B (zh) | 2013-01-23 |
US7547636B2 (en) | 2009-06-16 |
KR20090125076A (ko) | 2009-12-03 |
US20080188082A1 (en) | 2008-08-07 |
TWI440083B (zh) | 2014-06-01 |
KR101455883B1 (ko) | 2014-11-03 |
JP2010518605A (ja) | 2010-05-27 |
TW200849377A (en) | 2008-12-16 |
WO2008097925A1 (en) | 2008-08-14 |
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