CN101604632B - 台型半导体装置及其制造方法 - Google Patents

台型半导体装置及其制造方法 Download PDF

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Publication number
CN101604632B
CN101604632B CN2009101406685A CN200910140668A CN101604632B CN 101604632 B CN101604632 B CN 101604632B CN 2009101406685 A CN2009101406685 A CN 2009101406685A CN 200910140668 A CN200910140668 A CN 200910140668A CN 101604632 B CN101604632 B CN 101604632B
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CN
China
Prior art keywords
aforementioned
dielectric film
ditch
semiconductor layer
mesa
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2009101406685A
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English (en)
Chinese (zh)
Other versions
CN101604632A (zh
Inventor
关克行
铃木彰
小田岛庆汰
冈田喜久雄
龟山工次郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niigata Sanyo Electronics Corp
Sanyo Electric Co Ltd
System Solutions Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Semiconductor Co Ltd
Sanyo Semiconductor Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Semiconductor Co Ltd, Sanyo Semiconductor Manufacturing Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN101604632A publication Critical patent/CN101604632A/zh
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Publication of CN101604632B publication Critical patent/CN101604632B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/422PN diodes having the PN junctions in mesas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02249Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by combined oxidation and nitridation performed simultaneously
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/115Dielectric isolations, e.g. air gaps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/01Manufacture or treatment

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
CN2009101406685A 2008-06-12 2009-06-12 台型半导体装置及其制造方法 Expired - Fee Related CN101604632B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008-153851 2008-06-12
JP2008153851A JP2009302222A (ja) 2008-06-12 2008-06-12 メサ型半導体装置及びその製造方法
JP2008153851 2008-06-12

Publications (2)

Publication Number Publication Date
CN101604632A CN101604632A (zh) 2009-12-16
CN101604632B true CN101604632B (zh) 2012-03-07

Family

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CN2009101406685A Expired - Fee Related CN101604632B (zh) 2008-06-12 2009-06-12 台型半导体装置及其制造方法

Country Status (5)

Country Link
US (1) US8227901B2 (enExample)
JP (1) JP2009302222A (enExample)
KR (1) KR101075709B1 (enExample)
CN (1) CN101604632B (enExample)
TW (1) TWI415192B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010021532A (ja) * 2008-06-12 2010-01-28 Sanyo Electric Co Ltd メサ型半導体装置及びその製造方法
DE102011112659B4 (de) * 2011-09-06 2022-01-27 Vishay Semiconductor Gmbh Oberflächenmontierbares elektronisches Bauelement
CN104681633B (zh) * 2015-01-08 2018-05-08 北京时代民芯科技有限公司 具备低漏电高耐压终端结构的台面二极管及其制备方法
US10479675B2 (en) * 2015-09-30 2019-11-19 Denso Corporation Method of production of semiconductor device having semiconductor layer and support substrate spaced apart by recess
CN106098791A (zh) * 2016-06-16 2016-11-09 杭州赛晶电子有限公司 U型蚀刻直角台面硅二极管及其硅芯和制备方法
CN108365015A (zh) * 2017-12-29 2018-08-03 济南兰星电子有限公司 半导体二极管芯片及其制作方法
CN119673784B (zh) * 2024-11-20 2025-07-22 济南科盛电子有限公司 一种高效的gpp芯片玻璃钝化层制备工艺

Citations (1)

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Publication number Priority date Publication date Assignee Title
US6521538B2 (en) * 2000-02-28 2003-02-18 Denso Corporation Method of forming a trench with a rounded bottom in a semiconductor device

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GB1485015A (en) * 1974-10-29 1977-09-08 Mullard Ltd Semi-conductor device manufacture
US3973270A (en) * 1974-10-30 1976-08-03 Westinghouse Electric Corporation Charge storage target and method of manufacture
JPS51139281A (en) * 1975-05-28 1976-12-01 Hitachi Ltd Semi-conductor device
US4179794A (en) * 1975-07-23 1979-12-25 Nippon Gakki Seizo Kabushiki Kaisha Process of manufacturing semiconductor devices
US4389281A (en) * 1980-12-16 1983-06-21 International Business Machines Corporation Method of planarizing silicon dioxide in semiconductor devices
JPS57196585A (en) * 1981-05-28 1982-12-02 Nec Corp Manufacture of high-speed mesa type semiconductor device
JPS5943545A (ja) * 1982-09-06 1984-03-10 Hitachi Ltd 半導体集積回路装置
US4738936A (en) * 1983-07-01 1988-04-19 Acrian, Inc. Method of fabrication lateral FET structure having a substrate to source contact
US4663832A (en) * 1984-06-29 1987-05-12 International Business Machines Corporation Method for improving the planarity and passivation in a semiconductor isolation trench arrangement
US4725562A (en) * 1986-03-27 1988-02-16 International Business Machines Corporation Method of making a contact to a trench isolated device
US4775643A (en) * 1987-06-01 1988-10-04 Motorola Inc. Mesa zener diode and method of manufacture thereof
KR940016546A (ko) * 1992-12-23 1994-07-23 프레데릭 얀 스미트 반도체 장치 및 제조방법
JPH1075012A (ja) * 1996-06-27 1998-03-17 Mitsubishi Electric Corp 半導体レーザ装置,及びその製造方法
JP2001110799A (ja) * 1999-10-04 2001-04-20 Sanken Electric Co Ltd 半導体素子及びその製造方法
JP3492279B2 (ja) * 2000-03-21 2004-02-03 Necエレクトロニクス株式会社 素子分離領域の形成方法
US6383933B1 (en) * 2000-03-23 2002-05-07 National Semiconductor Corporation Method of using organic material to enhance STI planarization or other planarization processes
JP2002261269A (ja) 2001-02-27 2002-09-13 Matsushita Electric Ind Co Ltd メサ型半導体装置の製造方法
JP3985582B2 (ja) * 2002-05-24 2007-10-03 松下電器産業株式会社 半導体装置の製造方法
JP2004319554A (ja) * 2003-04-11 2004-11-11 Oki Electric Ind Co Ltd 光半導体素子および光半導体素子の製造方法
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JP4901300B2 (ja) 2006-05-19 2012-03-21 新電元工業株式会社 半導体装置の製造方法
JP5117698B2 (ja) * 2006-09-27 2013-01-16 ルネサスエレクトロニクス株式会社 半導体装置
JP2010021532A (ja) * 2008-06-12 2010-01-28 Sanyo Electric Co Ltd メサ型半導体装置及びその製造方法

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Publication number Priority date Publication date Assignee Title
US6521538B2 (en) * 2000-02-28 2003-02-18 Denso Corporation Method of forming a trench with a rounded bottom in a semiconductor device

Non-Patent Citations (3)

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Title
JP昭57-196585A 1982.12.02
JP昭60-137073A 1985.07.20
JP特开2003-347306A 2003.12.05

Also Published As

Publication number Publication date
KR101075709B1 (ko) 2011-10-21
TW200952085A (en) 2009-12-16
TWI415192B (zh) 2013-11-11
US20090309194A1 (en) 2009-12-17
JP2009302222A (ja) 2009-12-24
KR20090129367A (ko) 2009-12-16
CN101604632A (zh) 2009-12-16
US8227901B2 (en) 2012-07-24

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Owner name: SANYO SEMICONDUCTOR CO., LTD. NIIGATA SANYO ELECTR

Free format text: FORMER OWNER: SANYO SEMICONDUCTOR CO., LTD. SANYO SEMICONDUCTOR MANUFACTURING CO., LTD.

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Effective date of registration: 20110121

Address after: Japan Osaka

Applicant after: Sanyo Electric Co., Ltd.

Co-applicant after: Sanyo Semiconductor Co., Ltd.

Co-applicant after: Niigata SANYO Electronics Corporation

Address before: Japan's Osaka Moriguchi city Beijing Sakamoto 2 D eyes 5 times 5

Applicant before: Sanyo Electric Co., Ltd.

Co-applicant before: Sanyo Semiconductor Co., Ltd.

Co-applicant before: Sanyo Semiconductor Manufacturing Co., Ltd.

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120307

Termination date: 20210612

CF01 Termination of patent right due to non-payment of annual fee