CN101552292A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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CN101552292A
CN101552292A CNA2009101184317A CN200910118431A CN101552292A CN 101552292 A CN101552292 A CN 101552292A CN A2009101184317 A CNA2009101184317 A CN A2009101184317A CN 200910118431 A CN200910118431 A CN 200910118431A CN 101552292 A CN101552292 A CN 101552292A
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理崎智光
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Ablic Inc
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Abstract

本发明的名称为“半导体器件及其制造方法”。所提供的是一种半导体器件，半导体衬底(1)上形成的阱区(2)包括多个槽区(12)，以及源电极(10)与槽区(12)之间的衬底表面上形成的源区(6)连接。与源区(6)相邻地形成高浓度区(11)，它连同源区(6)一起与源电极(10)对接接触，由此固定衬底电位。漏区(5)在槽区(12)的底部形成，其电位通过内埋于槽区(12)的漏电极(9)引向衬底表面。将任意电压施加到栅电极(4a，4b)和漏电极(9)，由此载流子从源区(6)流动到漏区(5)，并且半导体器件处于导通状态。

Description

半导体器件及其制造方法
技术领域
本发明涉及半导体器件和制造半导体器件、如金属氧化物半导体(MOS)晶体管的方法。
背景技术
通过充分使用微细加工技术，随时间推移，就能够在实现缩小规模的同时制造半导体器件，而没有降低其性能。这种趋势也存在于具有高驱动性能的半导体元件中，因此通过充分使用微细加工技术来寻求每单位面积的导通电阻的降低。但是，实际上，微细加工技术导致的元件的小型化所引起的耐受电压的下降阻碍了驱动性能的进一步增强。为了解决小型化与耐受电压之间的折衷，已经提出具有各种结构的元件，并且在具有高耐受电压和高驱动性能的功率MOS场效应晶体管(FET)领域，目前可将槽栅MOS晶体管指定为主流结构。
在具有高耐受电压和高驱动性能的双扩散MOS(CMOS)晶体管之中，槽栅MOS晶体管具有最高的集成规模(例如参见JP 01-310576A)。
槽栅MOS晶体管作为元件本身呈现极优良的性能，但是，在与其它半导体元件共同安装到芯片时是不利的，因为槽栅MOS晶体管具有垂直MOS结构，其中电流沿衬底的深度方向流动，并且半导体衬底的整个背面是电极。
发明内容
本发明的一个目的是提供具有低导通电阻的半导体器件，它能够与其它半导体元件共同安装到芯片上。
(1)根据本发明，提供一种半导体器件，包括：第一导电类型阱区，以任意深度在半导体衬底的表面上形成；多个槽区，以比第一导电类型阱区的预定深度更小的深度形成；栅电极，经由栅绝缘膜设置在多个槽区的每个的侧表面，并且使其与栅绝缘膜接触；第二导电类型漏区，在多个槽区的每个的底部形成；第二导电类型源区，在半导体衬底的表面的在多个槽区之间形成的区的一部分中形成；以及第一导电类型高浓度区，在半导体衬底的表面的在多个槽区之间形成的区的一部分中形成。
(2)根据条款(1)的半导体器件还包括在半导体衬底与第一导电类型阱区之间形成以围绕第二导电类型漏区的第二导电类型低浓度扩散区。
(3)根据本发明，提供一种制造半导体器件的方法，包括：在半导体衬底上形成第一导电类型阱区；以比第一导电类型阱区的深度更小的深度形成多个槽区；形成栅绝缘膜；形成栅电极膜；通过各向异性蚀刻去除在多个槽区的每个的底部上形成的栅绝缘膜和栅电极膜以及在多个槽区其中两个之间的半导体衬底的表面上形成的栅电极膜和栅绝缘膜的一部分；形成层间绝缘膜；通过蚀刻去除在栅电极膜上形成的层间绝缘膜的一部分、在多个槽区的每个的底部上形成的层间绝缘膜的一部分以及在多个槽区其中两个之间的半导体衬底的表面上形成的层间绝缘膜的一部分；形成金属膜；以及蚀刻金属膜的一部分。
(4)制造根据条款(3)的制造半导体器件的方法还包括形成第二导电类型低浓度扩散区。
(5)制造根据条款(3)的制造半导体器件的方法还包括执行外延生长。
根据本发明，从槽内部抽出漏电极，因此可从半导体衬底表面提取漏电极，由此可轻而易举地实现与其它半导体元件的芯片上安装。
附图说明
附图包括：
图1A和图1B是用于描述根据本发明的一个实施例的半导体器件的结构的视图；
图2A至图2F是用于描述根据本发明的实施例制造半导体器件的方法的视图；以及
图3是用于描述根据本发明的实施例的半导体器件的修改示例的视图。
具体实施方式
(1)实施例概述
图1A和图1B示出根据本发明的一个实施例的半导体器件的结构。图1A是顶视图，以及图1B是鸟瞰图，沿图1A的虚线部分切割。
多个槽区12在第一导电类型阱区2中形成，第一导电类型阱区2在半导体衬底1上形成。源电极10具有与槽区12之间的衬底表面上所形成的第二导电类型源区6的欧姆接触。与第二导电类型源区6相邻地形成第一导电类型高浓度区11，它连同第二导电类型源区6一起与源电极10对接接触，由此固定衬底电位。
第二导电类型漏区5在槽区12的底部形成，并且通过内埋于槽区12中的漏电极9将电位引向衬底表面。
将任意电压施加到漏电极9以及栅电极4b，栅电极4b由金属制成且与槽区12的外部的平坦区和槽区12内部的侧壁之上连续形成的栅电极4a连接，由此，载流子沿箭头8所指示的方向从第二导电类型源区6流动到第二导电类型漏区5，使半导体器件进入导通状态。
具体来说，如同槽MOS晶体管中那样，栅长度沿垂直于半导体衬底表面的方向延伸，因此与平面类型MOS晶体管相比，面积效率很好，从而产生每单位面积的驱动性能的增强。此外，所有电极均外露于半导体衬底表面，因此，轻而易举地实现与其它元件的芯片上安装，这在槽MOS晶体管中难以实现。
接下来描述制造半导体器件的方法。
图2A至图2F是示出制造根据图1A和图1B所示的本发明的基本实施例的半导体器件的方法的过程流程的鸟瞰图。
首先，如图2A所示，在半导体衬底1上形成第一导电类型阱区2，然后在第一导电类型阱区2中以比第一导电类型阱区2的深度更小的深度来形成槽区12。此后，执行热氧化，以便在衬底表面上以及槽区12内部形成栅氧化膜3。
随后，如图2B所示，栅电极膜4a沉积在栅氧化膜3上，并且如图2C所示，通过高各向异性干蚀刻部分地去除栅电极膜4a和栅氧化膜3。在这种情况下，对于待蚀刻区中包含的衬底表面和槽底面，栅电极膜4a和栅氧化膜3均被去除，但是，沉积在槽侧壁的栅电极膜4a和栅氧化膜3没有通过高各向异性干蚀刻去除。
如图2D所示，将第二导电类型杂质离子注入到不包括其中形成第一导电类型高浓度区11的区在内的区，使得以自对准(self-aligning)方式形成第二导电类型漏区5和第二导电类型源区6。此后，采用抗蚀剂或诸如此类遮蔽不包括其中形成第一导电类型高浓度区11的区在内的区，由此通过离子注入或诸如此类形成第一导电类型高浓度区11。
随后，如图2E所示，沉积层间绝缘膜7。此后，层间绝缘膜7在第二导电类型漏区5、第二导电类型源区6、第一导电类型高浓度区11和栅电极4a的区的一部分经过选择性蚀刻，由此形成开口。
最后，如图2F所示，沉积金属以被任意图案化(patterned)，由此形成栅电极4b、漏电极9和源电极10。
(修改示例)
在这个修改示例中，在漏区形成电场松弛区(relaxationregion)，由此增强半导体器件的耐受电压。
图3是修改示例的概念图。图3示出一种结构，其中，在图1A和图1B的基本结构中，第二导电类型低浓度扩散区13在半导体衬底1与第一导电类型阱区2之间形成。这种结构通过例如双扩散或外延生长等制造方法来实现。
如上所述，形成第二导电类型低浓度扩散区13，由此，可减小施加到漏极的电场，并且可增强漏极耐受电压。
在这种情况下，第二导电类型漏区5设置成处于第二导电类型低浓度扩散区13中，并且第二导电类型低浓度扩散区13的杂质浓度以及槽区12的最深底部与第一导电类型阱区2的底部之间的距离根据目标耐受电压任意调节。
注意，在图1A和图1B、图2A至图2F以及3中，第一导电类型设置为p型，而第二导电类型设置为n型，由此描述n沟道MOS晶体管，当第一导电类型设置为n型而第二导电类型设置为p型时，这个晶体管充当p沟道MOS晶体管。

Claims (5)

1.一种半导体器件，包括：
第一导电类型阱区，以预定深度设置在半导体衬底的表面上；
多个槽区，以比所述第一导电类型阱区的预定深度更小的深度设置；
栅电极，经由栅绝缘膜设置在所述多个槽区的每个的侧表面上，并且使其与所述栅绝缘膜接触；
第二导电类型漏区，设置在所述多个槽区的每个的底部中；
第二导电类型源区，设置在所述多个槽区之间形成的区中，并且沿所述栅绝缘膜设置在所述半导体衬底的表面上；以及
第一导电类型高浓度区，设置在所述多个槽区之间形成的区中，并且设置在所述半导体衬底的表面上，以便使其与所述第二导电类型源区接触。
2.如权利要求1所述的半导体器件，还包括：在所述半导体衬底与所述第一导电类型阱区之间形成以围绕所述第二导电类型漏区的第二导电类型低浓度扩散区。
3.一种制造半导体器件的方法，包括：
在半导体衬底上形成第一导电类型阱区；
以比所述第一导电类型阱区的深度更小的深度来形成多个槽区；
形成栅绝缘膜；
形成栅电极膜；
通过各向异性蚀刻去除所述多个槽区的每个的底部上形成的栅绝缘膜和栅电极膜以及所述多个槽区其中两个之间的半导体衬底表面上形成的栅电极膜和栅绝缘膜的一部分；
形成层间绝缘膜；
通过蚀刻去除在所述栅电极膜上形成的层间绝缘膜的一部分、在所述多个槽区的每个的底部上形成的层间绝缘膜的一部分以及在所述多个槽区其中两个之间的半导体衬底表面上形成的层间绝缘膜的一部分；
形成金属膜；以及
蚀刻所述金属膜的一部分。
4.如权利要求3所述的制造半导体器件的方法，还包括：在所述半导体衬底上形成所述第一导电类型阱区之前，在其上形成晶体管的区的整个表面上形成第二导电类型低浓度扩散区。
5.如权利要求4所述的制造半导体器件的方法，其中，在其上形成所述晶体管的区的整个表面上形成所述第二导电类型低浓度扩散区的步骤包括外延生长。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103262248A (zh) * 2010-12-10 2013-08-21 三菱电机株式会社 半导体装置及其制造方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100861213B1 (ko) * 2007-04-17 2008-09-30 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조방법
US8679919B2 (en) 2011-12-15 2014-03-25 Semiconductor Components Industries, Llc Electronic device comprising a conductive structure and an insulating layer within a trench and a process of forming the same
US8647970B2 (en) * 2011-12-15 2014-02-11 Semiconductor Components Industries, Llc Electronic device comprising conductive structures and an insulating layer between the conductive structures and within a trench
US8878287B1 (en) * 2012-04-12 2014-11-04 Micrel, Inc. Split slot FET with embedded drain
US20180145171A1 (en) * 2016-11-23 2018-05-24 Microchip Technology Incorporated Field Effect Transistor (FET) or Other Semiconductor Device with Front-Side Source and Drain Contacts
US10326013B2 (en) * 2016-11-23 2019-06-18 Microchip Technology Incorporated Method of forming a field-effect transistor (FET) or other semiconductor device with front-side source and drain contacts

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0783118B2 (ja) 1988-06-08 1995-09-06 三菱電機株式会社 半導体装置およびその製造方法
JP3395473B2 (ja) * 1994-10-25 2003-04-14 富士電機株式会社 横型トレンチｍｉｓｆｅｔおよびその製造方法
KR0165398B1 (ko) * 1995-05-26 1998-12-15 윤종용 버티칼 트랜지스터의 제조방법
JP3252804B2 (ja) * 1998-07-31 2002-02-04 日本電気株式会社 固体撮像素子の駆動方法
US6831294B1 (en) * 1999-01-22 2004-12-14 Renesas Technology Corp. Semiconductor integrated circuit device having bump electrodes for signal or power only, and testing pads that are not coupled to bump electrodes
US7470960B1 (en) * 1999-10-27 2008-12-30 Kansai Electric Power Company, Inc High-voltage power semiconductor device with body regions of alternating conductivity and decreasing thickness
JP2002141505A (ja) * 2000-10-31 2002-05-17 Shindengen Electric Mfg Co Ltd 電界効果トランジスタ
US6624470B2 (en) * 2001-05-30 2003-09-23 Fuji Electric Co., Ltd. Semiconductor device and a method for manufacturing same
JP4461676B2 (ja) * 2001-12-18 2010-05-12 富士電機システムズ株式会社 半導体装置の製造方法
JP4487481B2 (ja) * 2002-01-16 2010-06-23 富士電機システムズ株式会社 半導体装置およびその製造方法
US7372088B2 (en) * 2004-01-27 2008-05-13 Matsushita Electric Industrial Co., Ltd. Vertical gate semiconductor device and method for fabricating the same
CN101567373B (zh) * 2004-02-16 2011-04-13 富士电机系统株式会社 双方向元件及其制造方法
JP4765016B2 (ja) * 2004-04-06 2011-09-07 富士電機株式会社 半導体装置の製造方法
JP4997694B2 (ja) * 2004-10-07 2012-08-08 富士電機株式会社 半導体装置およびその製造方法
US20070032029A1 (en) * 2005-04-19 2007-02-08 Rensselaer Polytechnic Institute Lateral trench power MOSFET with reduced gate-to-drain capacitance
JP2008177335A (ja) * 2007-01-18 2008-07-31 Fuji Electric Device Technology Co Ltd 炭化珪素絶縁ゲート型半導体装置。

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103262248A (zh) * 2010-12-10 2013-08-21 三菱电机株式会社 半导体装置及其制造方法
US9224860B2 (en) 2010-12-10 2015-12-29 Mitsubishi Electric Corporation Trench-gate type semiconductor device and manufacturing method therefor
CN103262248B (zh) * 2010-12-10 2016-07-13 三菱电机株式会社 半导体装置及其制造方法
US9614029B2 (en) 2010-12-10 2017-04-04 Mitsubishi Electric Corporation Trench-gate type semiconductor device and manufacturing method therefor
US9985093B2 (en) 2010-12-10 2018-05-29 Mitsubishi Electric Corporation Trench-gate type semiconductor device and manufacturing method therefor

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US20090212357A1 (en) 2009-08-27
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