CN101496107B - 具有可变电源的sram及其方法 - Google Patents

具有可变电源的sram及其方法 Download PDF

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Publication number
CN101496107B
CN101496107B CN2007800281906A CN200780028190A CN101496107B CN 101496107 B CN101496107 B CN 101496107B CN 2007800281906 A CN2007800281906 A CN 2007800281906A CN 200780028190 A CN200780028190 A CN 200780028190A CN 101496107 B CN101496107 B CN 101496107B
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China
Prior art keywords
memory
row
cells
coupled
power supply
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CN2007800281906A
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English (en)
Chinese (zh)
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CN101496107A (zh
Inventor
欧尔加·R·卢
劳伦斯·F·蔡尔兹
克雷格·D·冈德森
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Vlsi Technology Co Ltd
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Freescale Semiconductor Inc
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Publication of CN101496107A publication Critical patent/CN101496107A/zh
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
CN2007800281906A 2006-07-31 2007-05-10 具有可变电源的sram及其方法 Active CN101496107B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/461,200 US7292485B1 (en) 2006-07-31 2006-07-31 SRAM having variable power supply and method therefor
US11/461,200 2006-07-31
PCT/US2007/068677 WO2008016737A2 (en) 2006-07-31 2007-05-10 Sram having variable power supply and method therefor

Publications (2)

Publication Number Publication Date
CN101496107A CN101496107A (zh) 2009-07-29
CN101496107B true CN101496107B (zh) 2012-06-13

Family

ID=38653438

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007800281906A Active CN101496107B (zh) 2006-07-31 2007-05-10 具有可变电源的sram及其方法

Country Status (5)

Country Link
US (1) US7292485B1 (https=)
JP (1) JP5179496B2 (https=)
CN (1) CN101496107B (https=)
TW (1) TW200807417A (https=)
WO (1) WO2008016737A2 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8264896B2 (en) * 2008-07-31 2012-09-11 Freescale Semiconductor, Inc. Integrated circuit having an array supply voltage control circuit
KR20100028416A (ko) * 2008-09-04 2010-03-12 삼성전자주식회사 반도체 메모리 장치 및 상기 반도체 메모리 장치의 동작 방법
KR101446337B1 (ko) * 2008-09-08 2014-10-02 삼성전자주식회사 반도체 메모리 장치 및 상기 반도체 메모리 장치의 동작 방법
KR101505554B1 (ko) * 2008-09-08 2015-03-25 삼성전자주식회사 반도체 메모리 장치 및 상기 반도체 메모리 장치의 동작 방법
US8045402B2 (en) * 2009-06-29 2011-10-25 Arm Limited Assisting write operations to data storage cells
US20120120702A1 (en) * 2010-11-13 2012-05-17 Browning Christopher D Power saving technique in a content addressable memory during compare operations
US9005409B2 (en) 2011-04-14 2015-04-14 Tel Nexx, Inc. Electro chemical deposition and replenishment apparatus
US9017528B2 (en) 2011-04-14 2015-04-28 Tel Nexx, Inc. Electro chemical deposition and replenishment apparatus
US9303329B2 (en) 2013-11-11 2016-04-05 Tel Nexx, Inc. Electrochemical deposition apparatus with remote catholyte fluid management
WO2015171680A1 (en) * 2014-05-07 2015-11-12 Fong John Yit Dram cells storing volatile and nonvolatile data
KR102714216B1 (ko) * 2016-12-06 2024-10-10 삼성전자주식회사 균일한 쓰기 특성을 갖는 에스램 장치
US10867646B2 (en) * 2018-03-28 2020-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Bit line logic circuits and methods
US12499934B2 (en) * 2022-03-02 2025-12-16 Taiwan Semiconductor Manufacturing Company, Ltd. Memory device and method of operating the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050128790A1 (en) * 2003-12-11 2005-06-16 Texas Instruments Incorporated Static random access memory device having reduced leakage current during active mode and a method of operating thereof
US6950354B1 (en) * 2004-09-06 2005-09-27 Fujitsu Limited Semiconductor memory
CN1755836A (zh) * 2004-09-27 2006-04-05 国际商业机器公司 具有改进的单元稳定性的静态随机存取存储器阵列

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4094008A (en) * 1976-06-18 1978-06-06 Ncr Corporation Alterable capacitor memory array
GB2259589A (en) * 1991-09-12 1993-03-17 Motorola Inc Self - timed random access memories
JP4198201B2 (ja) * 1995-06-02 2008-12-17 株式会社ルネサステクノロジ 半導体装置
JP4162076B2 (ja) 2002-05-30 2008-10-08 株式会社ルネサステクノロジ 半導体記憶装置
JP3906166B2 (ja) * 2003-02-25 2007-04-18 株式会社東芝 半導体記憶装置
JP4053510B2 (ja) 2004-03-23 2008-02-27 日本テキサス・インスツルメンツ株式会社 Ｓｒａｍ装置
JP2006127460A (ja) * 2004-06-09 2006-05-18 Renesas Technology Corp 半導体装置、半導体信号処理装置、およびクロスバースイッチ
JP4912016B2 (ja) * 2005-05-23 2012-04-04 ルネサスエレクトロニクス株式会社 半導体記憶装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050128790A1 (en) * 2003-12-11 2005-06-16 Texas Instruments Incorporated Static random access memory device having reduced leakage current during active mode and a method of operating thereof
US6950354B1 (en) * 2004-09-06 2005-09-27 Fujitsu Limited Semiconductor memory
CN1755836A (zh) * 2004-09-27 2006-04-05 国际商业机器公司 具有改进的单元稳定性的静态随机存取存储器阵列

Also Published As

Publication number Publication date
TW200807417A (en) 2008-02-01
US7292485B1 (en) 2007-11-06
JP5179496B2 (ja) 2013-04-10
JP2009545834A (ja) 2009-12-24
WO2008016737A2 (en) 2008-02-07
WO2008016737A3 (en) 2008-07-17
CN101496107A (zh) 2009-07-29

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Address after: Texas in the United States

Patentee after: NXP America Co Ltd

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Patentee before: Fisical Semiconductor Inc.

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Effective date of registration: 20190307

Address after: Delaware

Patentee after: VLSI Technology Co., Ltd.

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Patentee before: NXP America Co Ltd

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