CN101459127A - 传感器模块及其制造方法 - Google Patents

传感器模块及其制造方法 Download PDF

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CN101459127A
CN101459127A CNA2008101855073A CN200810185507A CN101459127A CN 101459127 A CN101459127 A CN 101459127A CN A2008101855073 A CNA2008101855073 A CN A2008101855073A CN 200810185507 A CN200810185507 A CN 200810185507A CN 101459127 A CN101459127 A CN 101459127A
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substrate
sensor assembly
magnetic
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array
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CN101459127B (zh
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H·托伊斯
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Intel Deutschland GmbH
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Infineon Technologies AG
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Abstract

本发明涉及传感器模块及其制造方法，其中制造传感器模块的方法，包括：提供基片，它的第一主面上包含一阵列磁性敏感元件。将一阵列导线加到基片的第一主面上。将一阵列电连线加到基片的第一主面上。在加上电连线后将基片分成单件。

Description

传感器模块及其制造方法
技术领域和背景技术
某些磁性速度传感器被用来测量磁性齿轮的速度。这类磁性速度传感器通常包含具有许多磁性传感器元件的集成电路，例如霍尔传感器元件或xMR传感器元件(例如，GMR-大型磁阻；AMR-各向异性磁阻；TMR-隧道磁阻；CMR-巨型磁阻)。永久磁体为传感器元件提供偏置磁场。当轮旋转时，轮齿通过传感器前面并产生小的场变化，这种变化可用集成电路检测。检测到的场包含有关轮的角向位置和旋转速度的信息。另一种类型磁性传感器是磁性开关(如霍尔开关)，它可用于折叠式手机内确定手机是开着或已关闭。
人们希望能对磁性传感器进行测试，以帮助确保此传感器正常工作。测试磁性传感器的方法之一，是利用外部磁芯将测试磁场加到传感器上，并测量传感器的响应。除了外部设备的费用之外，采用这类外部磁场源的另一个问题是，磁芯和被测试传感器之间必须精确对准。位置误差可能使测试结果不准确。
发明内容
一种实施例提供制造传感器模块的方法。此方法包括提供基片，在它的第一主面上有一阵列磁性敏感元件。在基片第一主面上有一阵列导线。在基片第一主面上有一阵列电连线。在加上电连线之后将基片分成独立的小块。
附图说明
所含附图可帮助进一步了解本发明，并与本说明书融合，构成它的一部分。附图演示本发明各实施例，并与说明一起用来解析本发明的原理。通过参阅以下详细说明更好地了解本发明，将容易领会它的其它实施例及许多预期的优点。附图各元件彼此不一定成比例。相似的参考数字表示相应的类似元件。
图1A-1D是按照一个实施例制造传感器模块的示意图。
图2A-2H是按照另一个实施例制造传感器模块的示意图。
图3是按照一个实施例的一种传感器模块(示于图2H)一部分的更详细示意图。
图4是按照另一个实施例制造传感器模块的示意图。
图5是按照另一个实施例制造传感器模块的剖视图。
图6是按照一个实施例的示于图5的传感器模块的底视示意图。
图7是按照一个实施例的示于图5的传感器模块的底视示意图，但增加了测试导体。
图8是按照一个实施例的示于图5的传感器模块的侧视图，及用测试导体产生磁场的示意图。
图9是按照一个实施例的示于图5的传感器模块的底视图，但增加了测试导体线圈。
图10是按照一个实施例的多芯片模块剖视图，包括测试导体线圈。
图11是图10所示多芯片模块，及按照一个实施例用测试导体线圈产生磁场的示意图。
具体实施方式
下面的详细说明参考了构成它的一部分的附图，其中举例展示了可实施本发明的一些具体实施例。说明中用到的方向性术语，如“顶”，“底”，“前”，“后”，“前沿”，“后尾”等，是对所述图形方位的参照。由于本发明各实施例的元件可处在一些不同的方位，所用的方向性术语只是展示性而不是限制性的。应该指出，可以采用其它的实施例，同时可以作结构上和逻辑上的改变，而不偏离本发明的范围。因此，不应把下面的详细说明看成是限制性的，而且本发明的范围是由后面的权利要求书界定。
我们希望对磁性传感器进行测试，以帮助确保传感器正常工作。一种实施例提供磁性传感器模块(例如，集成电路)，它包含至少一个集成在芯片上的导体，以便在模块的测试模式期间产生磁场。在测试模式期间加到磁性传感器上的磁场被用来测试该传感器的功能。
图1A-1D是按照一个实施例制造传感器模块的方法示意图。如图1A所示，提供了一个基片102，在它的第一主面106上包含一阵列磁性敏感元件104A-104C。如图1B所示，带一阵列导线110-110C的元件108被加到基片102的第一主面106上。如图1C所示，一阵列电连线112被加到基片102的第一主面106上。如图1D所示，在加上电连线112之后，基片102被分成独立的小块，从而形成许多分离的传感器模块114A-114C。在一个实施例中，电连线112是焊料元件。在另一个实施例中，电连线112由Au，Cu，Ni，AuSn，或CuSn制成。在还有一个实施例中，电连线112是用Sn帽盖住的Cu或Au接线柱。
在一个实施例中，基片102包含半导体晶片，如硅晶片。在另一个实施例中，基片102包含聚合物晶片，后者包含一阵列半导体芯片，且磁性敏感元件104A-104C被集成在这一阵列芯片内。在一个实施例中，每一个导线110A-110C被用来产生磁场，用以分别测试磁性敏感元件104A-104C。
在按照一个实施例的工作中，电压被加到或电流被注入供电焊料元件112，后者与在传感器模块(如模块114A)测试模式期间的一条导线110A-110C相连接，使电流经该导线流到接地焊料元件112，后者也连接到该导线。导线产生的磁场被加到磁性敏感元件。在一个实施例中，传感器模块按正常方式(也即与正常工作模式中处理信号相同的方式)，处理由磁性敏感元件产生的信号并产生相应的输出信号。
图2A-2H是按照另一个实施例制造传感器模块的方法示意图。如图2A所示，提供了一个承板204，同时双面胶带202被层压在该承板204上。在一个实施例中，承板204是金属板。如图2B所示，胶带202上有许多半导体芯片206A-206C。在一个实施例中，采用拾取-安置方法从独立的半导体晶片取出独立的半导体芯片，并将这些芯片置于胶带202上，而且半导体芯片的工作区面对胶带202。半导体芯片206A-206C分别包含磁性敏感元件208A-208C。如图2C所示，模压层210被加到半导体芯片206A-206C和胶带202上，以将半导体芯片206A-206C封装。在一个实施例中，模压层210是聚合物。按照一个实施例的半导体芯片206A-206C和模压层210组合，在这里被称为模压重新组合晶片212。在一个实施例中，该重新组合晶片212具有与标准硅晶片(如200mm硅晶片)相同的几何形状和尺寸。
如图2D所示，承板204被从胶带202取下，同时如图2E所示，胶带202被从重新组合晶片212取下。如图2F所示，具有一阵列导线216A-216C的元件214被加到重新组合晶片212上。如图2G所示，一阵列焊料元件(例如，焊料球)218被加在元件214上。在一个实施例中，至少两个焊料元件218被加在每条导线216A-216C上。如图2H所示，其上有焊料球218的重新组合晶片212被分成许多独立的传感器模块220A-220C。
在按照一个实施例的工作中，电压被加到或电流被注入供电焊料元件218，后者与在传感器模块(如模块220A)测试模式期间的一条导线216A-216C相连接，使电流经该导线流到接地焊料元件218，后者也连接到该导线。导线产生的磁场被加到磁性敏感元件。在一个实施例中，传感器模块按正常方式(也即与正常工作模式中处理信号相同的方式)，处理由磁性敏感元件产生的信号并产生相应的输出信号。
图3是按照一个实施例的传感器模块220A(如图2H所示)一部分的更详细示意图。如图3所示，元件214是形成在模压层210和芯片206A上。在一个实施例中，元件214是再分布层(RDL)结构，它包括一些绝缘层(如聚合物层)，至少一个金属层(例如夹在两个绝缘层间的金属层)。在所示实施例中，元件214包括夹在两个绝缘层214B和214C间的金属层214A。RDL的各独立层214A-214C结构是按顺序加在重新组合晶片212上。在另一个实施例中，元件214是层板，它是在加到重新组合晶片212上之前事先形成的。焊料球218通过绝缘层214B内的孔连接到金属层214A。金属层214A通过绝缘层214C内的孔连接到芯片206A上的芯片垫。在一个实施例中，元件108(图1B-1D)按与元件214相同的方式形成，而且具有与元件214同样的结构。在一个实施例中，导体110A-110C(图1B-1D)和导体216A-216C(图2F-2H)被置于金属层214A内。
图4是按照另一个实施例的传感器模块400示意图。传感器模块400包括基片402，它包含磁性敏感元件404。在一个实施例中，基片402是半导体芯片。在所示实施例中，有4个焊料元件408加在基片402上。在另一个实施例中，可采用多于或少于4个焊料元件408。导线406连接两个焊料元件408。在另一个实施例中，导线406连接两个以上焊料元件408。
在按照一个实施例的工作中，电压被加到或电流被注入供电焊料元件408，后者与在传感器模块400测试模式期间的一条导线406相连接，使电流经该导线流到接地焊料元件408，后者也连接到该导线406。导线406产生的磁场被加到磁性敏感元件404。在一个实施例中，传感器模块400按正常方式(也即与正常工作模式中处理信号相同的方式)处理在测试模式中由磁性敏感元件产生的信号并产生相应的输出信号。
图5是按照另一个实施例的传感器模块500A的剖视示意图。传感器模块500A包括形成在半导体芯片502上的绝缘层504。在一个实施例中，绝缘层504包含聚合物层。磁性敏感元件506形成在绝缘层504上或里面，同时一些导体508形成在绝缘层504上或里面。在一个实施例中，绝缘层504在加到导体508之前加到半导体芯片502上。一些焊料元件510穿过绝缘层504内的孔，并与芯片502的芯片垫相连接。在所示实施例中，焊料元件510是焊料球。
图6是示于图5的按照一个实施例的传感器模块500A底视示意图。如图6所示，传感器模块500A包含4个焊料球510。磁性敏感元件510通过导体508连接焊料球510中的三个(即，用于供电、接地、和输出连接的焊料球510)。第四个焊料球510不与所示实施例中的任何东西电连接，而是当作稳定之用。在一个实施例中，传感器模块500A是霍尔开关。在一个实施例中，传感器模块500A具有2mm×2mm或更小的横截面积。
图7是示于图5的按照一个实施例的传感器模块500A底视示意图，但加上了测试导体702。示于图7中的传感器模块实施例(其中包含导体702)，以参考数字500B代表。在一个实施例中，导体702形成在绝缘层504上或里面。
图8是示于图7的按照一个实施例的传感器模块500B及用测试导体702产生磁场的示意图。
如图8所示，当电流流过导体702时，产生磁场和磁感应强度(B)802，后者按垂直方向(即垂直于芯片502的平面)穿透磁性敏感元件506。下面的方程I用来估算磁感应强度的大小：
方程I
B＝μ0I/2πr
式中B＝磁感应强度
μ0＝真空磁导率
I＝流过导体702的电流
r＝离导体702的距离
对于30mA电流I通过导体702，当导体702和磁性敏感元件506间的距离r为30μm时，产生约0.2mT的磁感应强度B，它穿透磁性敏感元件502。采用较厚的导体702可以产生较高的电流和磁感应强度。减小导体702和磁性敏感元件506之间的距离也可增加元件506处的磁场。
图9是示于图5的按照一个实施例的传感器模块500A的底视示意图，但增加了测试导体线圈902。图9所示的传感器模块实施例(其中包含导体902)，用参考数字500C代表。在一个实施例中，导体902形成在绝缘层504上或里面。在所示实施例中，导体902是具有许多匝或绕组的线圈(例如螺旋形)，且导体902围绕磁性敏感元件506。在一个实施例中，线圈902由多个金属层构成。
在一个实施例中，每个传感器模块500A、500B、500C是芯片大小的封装件，采用晶片级的封装方法制成，其中分单发生在加上焊料球510之后。在按照一个实施例的工作中，电压被加到或电流被注入供电焊料元件510，后者与在传感器模块500B或500C测试模式期间的导线702或902相连接，使电流经该导体流到接地焊料元件510，后者也连接到该导体702或902。导体702或902产生的磁场被加到磁性敏感元件。在一个实施例中，传感器模块500B和500C按正常方式(也即与正常工作模式中处理信号相同的方式)处理测试模式中由磁性敏感元件506产生的信号，并产生相应的输出信号。按照一个实施例的导体线圈902产生比直线导体(如导体702)更大的磁场。
图10是按照一个实施例的多芯片模块1000剖面示意图(包含测试导体线圈)。此多芯片模块1000包含半导体芯片1004和1012，它们形成在元件1020上并由模压层1002封口。在一个实施例中，元件1020是再分布层(RDL)结构，它包括一些绝缘层和至少一个金属层(例如夹在两个绝缘层间的金属层)，各独立层按顺序加入。在另一个实施例中，元件1020是层板，它是在加到芯片1004和1012之前事先形成的。元件1020包含许多导体1022，它们通过焊料球1026连接半导体芯片1004和1012上的芯片垫1006。导体线圈1024也形成在元件1020里或上面，且邻近半导体芯片1004的磁性敏感元件1008。
在一个实施例中，模块1000中的半导体芯片1004和1012是不同类型的器件，它们起不同的作用，而且有不同的尺寸(例如，传感器芯片1004和逻辑芯片1012)。在一个实施例中，多芯片模块1000采用上面所述图2A-2H的方法形成。对于多芯片模块1000，不象图2H所示的那样将重新组合晶片分成单芯片模块220A-220C，而是把重新组合晶片分单成许多象模块1000的多芯片模块。
图11是按照一个实施例的示于图10的多芯片模块1000和用导体线圈1024产生磁场的示意图。如图11所示，当电流流过导体1024时，产生磁场1102，它沿垂直于磁性敏感元件1008平面的方向流过磁性敏感元件1008。
在按照一个实施例的工作中，电压被加到或电流被注入供电焊料元件1022，后者与在模块1000测试模式期间的导体线圈1024相连接，使电流经该导体线圈流到接地焊料元件1022，后者也连接到该导体线圈1024。导体线圈1024产生的磁场被加到磁性敏感元件1008。在一个实施例中，模块1000按正常方式(也即与正常工作模式中处理信号相同的方式)，处理在测试模式中由磁性敏感元件1008产生的信号，并产生相应的输出信号。
在一个实施例中，上述磁性敏感元件(例如，元件104，208A-208C，404,506和1008)是霍尔传感器元件。在另一个实施例中，磁性敏感元件为xMR传感器元件(如GMR-大型磁阻；AMR-各向异性磁阻；TMR-隧道磁阻；CMR-巨型磁阻)。
虽然上面展示并说明明了一些具体实施例，但本专业技术人员明白，可以用各种替代和/或等效的实施例替换这些具体实施例，而仍然属于本发明的范围。本申请预期将涵盖对此处讨论过的具体实施例的任何修正或变更。因此，本发明只由权利要求书及其等效条款加以限定。

Claims (21)

1.制造传感器模块的方法，包括：
提供基片，它的第一主面上包含一阵列磁性敏感元件；
将一阵列导线加到基片的第一主面上；
将一阵列电连线加到基片的第一主面上；及
在加上电连线后将基片分成单件。
2.如权利要求1的方法，其中基片包括半导体晶片。
3.如权利要求1的方法，其中基片包括包含一阵列芯片的聚合物晶片。
4.如权利要求3的方法，其中磁性敏感元件集成在芯片阵列内。
5.如权利要求1的方法，还包括：
在加上导线阵列之前在基片上加上第一聚合物层。
6.如权利要求5的方法，其中导线阵列加在第一聚合物层上面。
7.如权利要求6的方法，还包括：
在导线阵列上加上第二聚合物层。
8.如权利要求1的方法，其中导线阵列是通过加包括导线阵列的层板加上的。
9.如权利要求1的方法，其中电连线是焊料元件，且至少两个焊料元件被加到每个导线上。
10.如权利要求1的方法，其中每个导线用来产生磁场，用于测试磁性敏感元件。
11.传感器模块，包括：
基片，它包含磁性敏感元件；
至少4个焊料元件，其被加到基片上；及
导线，其连接4个焊料元件中的至少两个。
12.如权利要求11的传感器模块，其中基片是芯片。
13.如权利要求11的传感器模块，其中磁性敏感元件包括大磁阻(GMR)元件。
14.如权利要求11的传感器模块，其中磁性敏感元件包括霍尔元件。
15.如权利要求11的传感器模块，其中导线是线圈。
16.如权利要求11的传感器模块，还包括：
加在基片上的第一聚合物层；和
其中导线被加在第一聚合物层上。
17.如权利要求16的传感器模块，还包括：
加在导线上的第二聚合物层。
18.如权利要求11的传感器模块，还包括：
加在基片上的层板，其中该层板包含导线。
19.如权利要求11的传感器模块，其中导线用来产生磁场，用于测试磁性敏感元件。
20.传感器模块，包括：
基片，包括磁性敏感元件；及
导体线圈，用来产生磁场，此磁场被用来加在磁性敏感元件上。
21.制造传感器模块的方法，包括：
提供基片，它的第一主面上包含一阵列磁性敏感元件；
将一阵列导线加到基片的第一主面上；
将一阵列焊料元件加到基片的第一主面上；及
在加上电连线后将基片分成单件。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104459273A (zh) * 2013-09-16 2015-03-25 英飞凌科技股份有限公司 电流传感器设备

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102009042400A1 (de) * 2009-09-21 2011-03-31 Epcos Ag Chip-Anordnung für eine größenoptimierte Gehäuseform und Herstellungsverfahren
US8878527B2 (en) * 2010-11-29 2014-11-04 Amkor Technology, Inc. Magnetic field simulator for testing singulated or multi-site strip semiconductor device and method therefor
US9817078B2 (en) * 2012-05-10 2017-11-14 Allegro Microsystems Llc Methods and apparatus for magnetic sensor having integrated coil
US9244134B2 (en) * 2013-01-15 2016-01-26 Infineon Technologies Ag XMR-sensor and method for manufacturing the XMR-sensor
US10725100B2 (en) 2013-03-15 2020-07-28 Allegro Microsystems, Llc Methods and apparatus for magnetic sensor having an externally accessible coil
US10145908B2 (en) 2013-07-19 2018-12-04 Allegro Microsystems, Llc Method and apparatus for magnetic sensor producing a changing magnetic field
US10495699B2 (en) 2013-07-19 2019-12-03 Allegro Microsystems, Llc Methods and apparatus for magnetic sensor having an integrated coil or magnet to detect a non-ferromagnetic target
US9927498B2 (en) * 2014-06-06 2018-03-27 Infineon Technologies Ag Magnetic sensor device comprising a ring-shaped magnet and a sensor chip in a common package
US9823092B2 (en) 2014-10-31 2017-11-21 Allegro Microsystems, Llc Magnetic field sensor providing a movement detector
JP6301823B2 (ja) * 2014-12-18 2018-03-28 アルプス電気株式会社 磁気検知装置
CN105701904B (zh) * 2015-12-29 2018-03-30 威海华菱光电股份有限公司 磁图像传感器
US10996289B2 (en) 2017-05-26 2021-05-04 Allegro Microsystems, Llc Coil actuated position sensor with reflected magnetic field
US10837943B2 (en) 2017-05-26 2020-11-17 Allegro Microsystems, Llc Magnetic field sensor with error calculation
US11428755B2 (en) 2017-05-26 2022-08-30 Allegro Microsystems, Llc Coil actuated sensor with sensitivity detection
DE102018111011A1 (de) 2018-05-08 2019-11-14 Infineon Technologies Ag Magnetfeldsensorvorrichtung
US10823586B2 (en) 2018-12-26 2020-11-03 Allegro Microsystems, Llc Magnetic field sensor having unequally spaced magnetic field sensing elements
US11157058B2 (en) * 2019-05-29 2021-10-26 Motorola Mobility Llc Setting polling interval of open/closed position sensor for a movable portion of an electronic device based on activity state of the electronic device
US11237020B2 (en) 2019-11-14 2022-02-01 Allegro Microsystems, Llc Magnetic field sensor having two rows of magnetic field sensing elements for measuring an angle of rotation of a magnet
US11280637B2 (en) 2019-11-14 2022-03-22 Allegro Microsystems, Llc High performance magnetic angle sensor
US11262422B2 (en) 2020-05-08 2022-03-01 Allegro Microsystems, Llc Stray-field-immune coil-activated position sensor
US11493361B2 (en) 2021-02-26 2022-11-08 Allegro Microsystems, Llc Stray field immune coil-activated sensor
US11578997B1 (en) 2021-08-24 2023-02-14 Allegro Microsystems, Llc Angle sensor using eddy currents
JP7138261B1 (ja) 2022-06-30 2022-09-15 旭化成エレクトロニクス株式会社 半導体パッケージ、及び駆動装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1316104A (zh) * 1998-08-07 2001-10-03 旭化成株式会社 磁传感器及其制造方法
CN1417872A (zh) * 2001-10-29 2003-05-14 雅马哈株式会社 磁传感器
US20030206373A1 (en) * 2001-08-31 2003-11-06 Takahiro Kato Thin film magnetic head and thin film magnetic head slider, and methods of producing the same
JP2006275764A (ja) * 2005-03-29 2006-10-12 Yamaha Corp ３軸磁気センサ

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4121374C2 (de) 1991-06-28 2000-09-07 Lust Electronic Systeme Gmbh Kompensierter Magnetfeldsensor
US5247278A (en) 1991-11-26 1993-09-21 Honeywell Inc. Magnetic field sensing device
DE4319146C2 (de) 1993-06-09 1999-02-04 Inst Mikrostrukturtechnologie Magnetfeldsensor, aufgebaut aus einer Ummagnetisierungsleitung und einem oder mehreren magnetoresistiven Widerständen
DE19520206C2 (de) 1995-06-01 1997-03-27 Siemens Ag Magnetfeldsensor mit einer Brückenschaltung von magnetoresistiven Brückenelementen
FR2752302B1 (fr) 1996-08-08 1998-09-11 Commissariat Energie Atomique Capteur de champ magnetique a pont de magnetoresistances
WO1998048291A2 (en) 1997-04-18 1998-10-29 Koninklijke Philips Electronics N.V. Magnetic field sensor comprising a wheatstone bridge
JP3799168B2 (ja) * 1998-08-20 2006-07-19 株式会社日立グローバルストレージテクノロジーズ 磁気記録再生装置
EP1178326B1 (de) 2000-07-05 2005-12-21 Infineon Technologies AG Verfahren und System zur Bestimmung der Orientierung von Magnetfeldern mit GMR-Sensoren
US20020024109A1 (en) 2000-08-29 2002-02-28 Kambiz Hayat-Dawoodi Integrated circuit and method for magnetic sensor testing
DE10144467B4 (de) 2001-09-10 2006-07-27 Infineon Technologies Ag Elektronisches Sensorbauteil und Verfahren zu seiner Herstellung
DE10145655A1 (de) 2001-09-15 2003-04-10 Philips Corp Intellectual Pty Schaltungsanordnung für einen gradiometrischen Stromsensor sowie ein die Schaltungsanordnung aufweisender Sensorchip
US6785098B2 (en) * 2001-09-26 2004-08-31 International Business Machines Corporation First pole piece with frequency dependent variable effective throat height
DE10205127A1 (de) 2002-02-07 2003-08-28 Infineon Technologies Ag Halbleiterbauteil mit Sensor- bzw. Aktoroberfläche und Verfahren zu seiner Herstellung
DE10220911A1 (de) 2002-05-10 2003-12-24 Siemens Ag Verfahren zur Durchführung eines Funktionstests wenigstens eines magnetischen, insbesondere eines magneto-resistiven Sensorelements
DE10256116B4 (de) 2002-11-29 2005-12-22 Infineon Technologies Ag Elektronisches Bauteil und Verfahren zur Herstellung desselben
DE10325541A1 (de) 2003-06-04 2005-01-13 Infineon Technologies Ag Elektronisches Bauteil, sowie Halbleiterwafer und Bauteilträger zur Herstellung des Bauteils
US20050195528A1 (en) * 2004-03-05 2005-09-08 Bennin Jeffry S. Coined ground features for integrated lead suspensions
DE102004025776B3 (de) 2004-05-26 2005-07-21 Infineon Technologies Ag Verfahren zur Detektion von Störungen bei der Ermittlung der Drehgeschwindigkeit eines Rotors und Auswerteschaltung
DE102004029941B3 (de) 2004-06-21 2005-12-15 Infineon Technologies Ag System zur Auswertung eines Sensorsignals
DE102004046803B4 (de) 2004-09-27 2011-08-18 Infineon Technologies AG, 81669 Verfahren zur Bestimmung der Winkelposition eines rotierenden Objekts und Drehgeber
DE102005047413B8 (de) 2005-02-23 2012-06-06 Infineon Technologies Ag Magnetfeldsensorelement und Verfahren zum Durchführen eines On-Wafer-Funktionstests, sowie Verfahren zur Herstellung von Magnetfeldsensorelementen und Verfahren zur Herstellung von Magnetfeldsensorelementen mit On-Wafer-Funktionstest
DE102005027767A1 (de) 2005-06-15 2006-12-28 Infineon Technologies Ag Integriertes magnetisches Sensorbauteil
DE102005046008B4 (de) 2005-09-26 2007-05-24 Infineon Technologies Ag Halbleitersensorbauteil mit Sensorchip und Verfahren zur Herstellung desselben
JP4191720B2 (ja) * 2005-11-01 2008-12-03 Ｔｄｋ株式会社 磁気ヘッドアッセンブリ
JP2007149157A (ja) * 2005-11-24 2007-06-14 Fujitsu Ltd 記憶装置、磁気ヘッド駆動装置、及び中継フレキシブルプリント基板
JP4739963B2 (ja) 2006-01-18 2011-08-03 アルプス電気株式会社 車載用ｇｍｒ角度センサ
US7643250B2 (en) * 2006-01-27 2010-01-05 Hitachi Global Storage Technologies Netherlands B.V. Pad slider design for on-slider ELGs
DE102006005994A1 (de) 2006-02-08 2007-08-16 Infineon Technologies Ag Halbleiterbauteil mit einem Halbleiterchip und Verfahren zur Herstellung derartiger Halbleiterbauteile
JP4750584B2 (ja) * 2006-02-28 2011-08-17 ヒタチグローバルストレージテクノロジーズネザーランドビーブイ 磁気ヘッドスライダ
DE102006011753B4 (de) 2006-03-13 2021-01-28 Infineon Technologies Ag Halbleitersensorbauteil, Verfahren zur Herstellung eines Nutzens und Verfahren zur Herstellung von Halbleitersensorbauteilen
US20070230056A1 (en) * 2006-04-03 2007-10-04 Beach Robert S Slider incorporating heaters and ELGs and method of fabrication
JP2008080562A (ja) * 2006-09-26 2008-04-10 Brother Ind Ltd 記録装置
US8000491B2 (en) * 2006-10-24 2011-08-16 Nokia Corporation Transducer device and assembly
US7777991B2 (en) * 2007-01-12 2010-08-17 Sae Magnetics (H.K.) Ltd. Head gimbal assembly with improved interconnection between head slider and suspension, fabricating method thereof, and magnetic disk drive with the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1316104A (zh) * 1998-08-07 2001-10-03 旭化成株式会社 磁传感器及其制造方法
US20030206373A1 (en) * 2001-08-31 2003-11-06 Takahiro Kato Thin film magnetic head and thin film magnetic head slider, and methods of producing the same
CN1417872A (zh) * 2001-10-29 2003-05-14 雅马哈株式会社 磁传感器
JP2006275764A (ja) * 2005-03-29 2006-10-12 Yamaha Corp ３軸磁気センサ

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104459273A (zh) * 2013-09-16 2015-03-25 英飞凌科技股份有限公司 电流传感器设备
CN104459273B (zh) * 2013-09-16 2018-03-27 英飞凌科技股份有限公司 电流传感器设备

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