CN101454876B - 去除受损电介质材料的方法 - Google Patents

去除受损电介质材料的方法 Download PDF

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Publication number
CN101454876B
CN101454876B CN2007800197431A CN200780019743A CN101454876B CN 101454876 B CN101454876 B CN 101454876B CN 2007800197431 A CN2007800197431 A CN 2007800197431A CN 200780019743 A CN200780019743 A CN 200780019743A CN 101454876 B CN101454876 B CN 101454876B
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CN
China
Prior art keywords
superficial layer
dielectric film
exposure
layer
film
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Expired - Fee Related
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CN2007800197431A
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English (en)
Chinese (zh)
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CN101454876A (zh
Inventor
伊恩·J·布朗
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Publication of CN101454876A publication Critical patent/CN101454876A/zh
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    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C15/00—Surface treatment of glass, not in the form of fibres or filaments, by etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C25/00—Surface treatment of fibres or filaments made from glass, minerals or slags
    • C03C25/66—Chemical treatment, e.g. leaching, acid or alkali treatment
    • C03C25/68—Chemical treatment, e.g. leaching, acid or alkali treatment by etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H10P70/234—Cleaning during device manufacture during, before or after processing of insulating materials the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts

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  • Chemical & Material Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • General Life Sciences & Earth Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
CN2007800197431A 2006-03-28 2007-01-30 去除受损电介质材料的方法 Expired - Fee Related CN101454876B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/390,193 US7795148B2 (en) 2006-03-28 2006-03-28 Method for removing damaged dielectric material
US11/390,193 2006-03-28
PCT/US2007/002374 WO2007126461A2 (en) 2006-03-28 2007-01-30 Method for removing damaged dielectric material

Publications (2)

Publication Number Publication Date
CN101454876A CN101454876A (zh) 2009-06-10
CN101454876B true CN101454876B (zh) 2011-07-27

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Family Applications (1)

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CN2007800197431A Expired - Fee Related CN101454876B (zh) 2006-03-28 2007-01-30 去除受损电介质材料的方法

Country Status (6)

Country Link
US (1) US7795148B2 (https=)
JP (1) JP5271255B2 (https=)
KR (1) KR101283837B1 (https=)
CN (1) CN101454876B (https=)
TW (1) TWI385728B (https=)
WO (1) WO2007126461A2 (https=)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4939864B2 (ja) * 2006-07-25 2012-05-30 東京エレクトロン株式会社 ガス供給装置、ガス供給方法、薄膜形成装置の洗浄方法、薄膜形成方法及び薄膜形成装置
US7786016B2 (en) * 2007-01-11 2010-08-31 Micron Technology, Inc. Methods of uniformly removing silicon oxide and a method of removing a sacrificial oxide
US8252194B2 (en) 2008-05-02 2012-08-28 Micron Technology, Inc. Methods of removing silicon oxide
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US8382997B2 (en) * 2010-08-16 2013-02-26 Tokyo Electron Limited Method for high aspect ratio patterning in a spin-on layer
CN102420121B (zh) * 2011-05-26 2013-12-04 上海华力微电子有限公司 一种针对氟基等离子体刻蚀后的氮化钛薄膜的处理方法
CN102437037B (zh) * 2011-09-08 2014-06-04 上海华力微电子有限公司 一种有效减少水痕缺陷的方法
CN103094190B (zh) * 2011-11-01 2015-04-29 中芯国际集成电路制造(上海)有限公司 互连层中空气间隙的形成方法
US8592327B2 (en) 2012-03-07 2013-11-26 Tokyo Electron Limited Formation of SiOCl-containing layer on exposed low-k surfaces to reduce low-k damage
US8551877B2 (en) 2012-03-07 2013-10-08 Tokyo Electron Limited Sidewall and chamfer protection during hard mask removal for interconnect patterning
US8809194B2 (en) 2012-03-07 2014-08-19 Tokyo Electron Limited Formation of SiOCl-containing layer on spacer sidewalls to prevent CD loss during spacer etch
US8859430B2 (en) 2012-06-22 2014-10-14 Tokyo Electron Limited Sidewall protection of low-K material during etching and ashing
US8871639B2 (en) 2013-01-04 2014-10-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices and methods of manufacture thereof
CN103646872A (zh) * 2013-11-26 2014-03-19 上海华力微电子有限公司 一种去胶设备
US9508561B2 (en) 2014-03-11 2016-11-29 Applied Materials, Inc. Methods for forming interconnection structures in an integrated cluster system for semicondcutor applications
WO2016039940A1 (en) 2014-09-12 2016-03-17 Applied Materials, Inc. Controller for treatment of semiconductor processing equipment effluent
US9576811B2 (en) 2015-01-12 2017-02-21 Lam Research Corporation Integrating atomic scale processes: ALD (atomic layer deposition) and ALE (atomic layer etch)
US9806252B2 (en) 2015-04-20 2017-10-31 Lam Research Corporation Dry plasma etch method to pattern MRAM stack
US9870899B2 (en) 2015-04-24 2018-01-16 Lam Research Corporation Cobalt etch back
WO2016210299A1 (en) * 2015-06-26 2016-12-29 Tokyo Electron Limited GAS PHASE ETCH WITH CONTROLLABLE ETCH SELECTIVITY OF Si-CONTAINING ARC OR SILICON OXYNITRIDE TO DIFFERENT FILMS OR MASKS
US9972504B2 (en) 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US10096487B2 (en) 2015-08-19 2018-10-09 Lam Research Corporation Atomic layer etching of tungsten and other metals
US9984858B2 (en) 2015-09-04 2018-05-29 Lam Research Corporation ALE smoothness: in and outside semiconductor industry
FR3041471B1 (fr) * 2015-09-18 2018-07-27 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de formation des espaceurs d'une grille d'un transistor
US10727073B2 (en) 2016-02-04 2020-07-28 Lam Research Corporation Atomic layer etching 3D structures: Si and SiGe and Ge smoothness on horizontal and vertical surfaces
US10229837B2 (en) 2016-02-04 2019-03-12 Lam Research Corporation Control of directionality in atomic layer etching
US9991128B2 (en) 2016-02-05 2018-06-05 Lam Research Corporation Atomic layer etching in continuous plasma
US10269566B2 (en) 2016-04-29 2019-04-23 Lam Research Corporation Etching substrates using ale and selective deposition
US9837312B1 (en) 2016-07-22 2017-12-05 Lam Research Corporation Atomic layer etching for enhanced bottom-up feature fill
US10566212B2 (en) 2016-12-19 2020-02-18 Lam Research Corporation Designer atomic layer etching
US10559461B2 (en) 2017-04-19 2020-02-11 Lam Research Corporation Selective deposition with atomic layer etch reset
US9997371B1 (en) 2017-04-24 2018-06-12 Lam Research Corporation Atomic layer etch methods and hardware for patterning applications
US10832909B2 (en) 2017-04-24 2020-11-10 Lam Research Corporation Atomic layer etch, reactive precursors and energetic sources for patterning applications
CN107845574B (zh) * 2017-10-31 2018-11-23 长鑫存储技术有限公司 半导体上刻蚀去除氧化物的方法
WO2019190781A1 (en) 2018-03-30 2019-10-03 Lam Research Corporation Atomic layer etching and smoothing of refractory metals and other high surface binding energy materials
US10982335B2 (en) * 2018-11-15 2021-04-20 Tokyo Electron Limited Wet atomic layer etching using self-limiting and solubility-limited reactions
CN110928142B (zh) * 2019-11-28 2023-08-29 北京遥测技术研究所 一种光刻厚胶与金属基底结合力的改善方法
WO2021178399A1 (en) 2020-03-06 2021-09-10 Lam Research Corporation Atomic layer etching of molybdenum

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5685951A (en) * 1996-02-15 1997-11-11 Micron Technology, Inc. Methods and etchants for etching oxides of silicon with low selectivity in a vapor phase system
US5838055A (en) * 1997-05-29 1998-11-17 International Business Machines Corporation Trench sidewall patterned by vapor phase etching
US6627539B1 (en) * 1998-05-29 2003-09-30 Newport Fab, Llc Method of forming dual-damascene interconnect structures employing low-k dielectric materials
JP3662472B2 (ja) * 2000-05-09 2005-06-22 エム・エフエスアイ株式会社 基板表面の処理方法
US6451712B1 (en) * 2000-12-18 2002-09-17 International Business Machines Corporation Method for forming a porous dielectric material layer in a semiconductor device and device formed
US6541351B1 (en) * 2001-11-20 2003-04-01 International Business Machines Corporation Method for limiting divot formation in post shallow trench isolation processes
JP2003234402A (ja) * 2002-02-12 2003-08-22 Tokyo Electron Ltd 半導体製造方法及び半導体製造装置
US6858532B2 (en) * 2002-12-10 2005-02-22 International Business Machines Corporation Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related tooling
US6951821B2 (en) * 2003-03-17 2005-10-04 Tokyo Electron Limited Processing system and method for chemically treating a substrate
US7877161B2 (en) * 2003-03-17 2011-01-25 Tokyo Electron Limited Method and system for performing a chemical oxide removal process
US7029536B2 (en) * 2003-03-17 2006-04-18 Tokyo Electron Limited Processing system and method for treating a substrate
TWI220774B (en) * 2003-11-03 2004-09-01 Univ Nat Sun Yat Sen Method for patterning low dielectric constant film and method for manufacturing dual damascene structure
US20050218113A1 (en) * 2004-03-30 2005-10-06 Tokyo Electron Limited Method and system for adjusting a chemical oxide removal process using partial pressure
US20050227494A1 (en) * 2004-03-30 2005-10-13 Tokyo Electron Limited Processing system and method for treating a substrate
US20050269291A1 (en) * 2004-06-04 2005-12-08 Tokyo Electron Limited Method of operating a processing system for treating a substrate
US7097779B2 (en) * 2004-07-06 2006-08-29 Tokyo Electron Limited Processing system and method for chemically treating a TERA layer
US7510972B2 (en) * 2005-02-14 2009-03-31 Tokyo Electron Limited Method of processing substrate, post-chemical mechanical polishing cleaning method, and method of and program for manufacturing electronic device
JP4860219B2 (ja) * 2005-02-14 2012-01-25 東京エレクトロン株式会社 基板の処理方法、電子デバイスの製造方法及びプログラム
JP4515309B2 (ja) * 2005-03-31 2010-07-28 東京エレクトロン株式会社 エッチング方法
US20070031609A1 (en) * 2005-07-29 2007-02-08 Ajay Kumar Chemical vapor deposition chamber with dual frequency bias and method for manufacturing a photomask using the same
US7214626B2 (en) * 2005-08-24 2007-05-08 United Microelectronics Corp. Etching process for decreasing mask defect
US7288483B1 (en) * 2006-03-28 2007-10-30 Tokyo Electron Limited Method and system for patterning a dielectric film
US20070238301A1 (en) * 2006-03-28 2007-10-11 Cabral Stephen H Batch processing system and method for performing chemical oxide removal
US7368393B2 (en) * 2006-04-20 2008-05-06 International Business Machines Corporation Chemical oxide removal of plasma damaged SiCOH low k dielectrics
US7718032B2 (en) * 2006-06-22 2010-05-18 Tokyo Electron Limited Dry non-plasma treatment system and method of using
US7786016B2 (en) * 2007-01-11 2010-08-31 Micron Technology, Inc. Methods of uniformly removing silicon oxide and a method of removing a sacrificial oxide
KR101330707B1 (ko) * 2007-07-19 2013-11-19 삼성전자주식회사 반도체 장치의 형성 방법

Also Published As

Publication number Publication date
WO2007126461A2 (en) 2007-11-08
TW200802603A (en) 2008-01-01
US20070235411A1 (en) 2007-10-11
JP5271255B2 (ja) 2013-08-21
US7795148B2 (en) 2010-09-14
JP2009531857A (ja) 2009-09-03
CN101454876A (zh) 2009-06-10
KR101283837B1 (ko) 2013-07-08
KR20080109886A (ko) 2008-12-17
WO2007126461A3 (en) 2008-08-14
TWI385728B (zh) 2013-02-11

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Granted publication date: 20110727

Termination date: 20170130

CF01 Termination of patent right due to non-payment of annual fee