CN101436547B - 高散热性封装基板的制作方法 - Google Patents

高散热性封装基板的制作方法 Download PDF

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Publication number
CN101436547B
CN101436547B CN2008103045916A CN200810304591A CN101436547B CN 101436547 B CN101436547 B CN 101436547B CN 2008103045916 A CN2008103045916 A CN 2008103045916A CN 200810304591 A CN200810304591 A CN 200810304591A CN 101436547 B CN101436547 B CN 101436547B
Authority
CN
China
Prior art keywords
layer
several
heat dissipation
circuit
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2008103045916A
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English (en)
Chinese (zh)
Other versions
CN101436547A (zh
Inventor
林文强
王家忠
陈振重
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bridge Semiconductor Corp
Original Assignee
Bridge Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bridge Semiconductor Corp filed Critical Bridge Semiconductor Corp
Publication of CN101436547A publication Critical patent/CN101436547A/zh
Application granted granted Critical
Publication of CN101436547B publication Critical patent/CN101436547B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H10P72/74—
    • H10W70/05—
    • H10W70/685—
    • H10W74/129—
    • H10W90/701—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0376—Etching temporary metallic carrier substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H10P72/7424—
    • H10P72/7438—
    • H10P72/744—
    • H10W72/07204—
    • H10W72/07232—
    • H10W72/07236—
    • H10W72/20—
    • H10W72/252—
    • H10W72/90—
    • H10W72/923—
    • H10W72/9415—
    • H10W74/00—
    • H10W74/012—
    • H10W74/016—
    • H10W74/15—
    • H10W90/724—

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
CN2008103045916A 2007-11-15 2008-09-19 高散热性封装基板的制作方法 Expired - Fee Related CN101436547B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/984,263 US20080188037A1 (en) 2007-02-05 2007-11-15 Method of manufacturing semiconductor chip assembly with sacrificial metal-based core carrier
US11/984,263 2007-11-15

Publications (2)

Publication Number Publication Date
CN101436547A CN101436547A (zh) 2009-05-20
CN101436547B true CN101436547B (zh) 2011-06-22

Family

ID=39675451

Family Applications (5)

Application Number Title Priority Date Filing Date
CN2008103045916A Expired - Fee Related CN101436547B (zh) 2007-11-15 2008-09-19 高散热性封装基板的制作方法
CN2008103051404A Expired - Fee Related CN101436548B (zh) 2007-11-15 2008-10-24 无核层多层封装基板的制作方法
CN2008103051989A Expired - Fee Related CN101436549B (zh) 2007-11-15 2008-10-27 铜核层多层封装基板的制作方法
CN200810305365XA Expired - Fee Related CN101436550B (zh) 2007-11-15 2008-11-03 无核层多层封装基板的制作方法
CN2008103054154A Expired - Fee Related CN101436551B (zh) 2007-11-15 2008-11-07 铜核层多层封装基板的制作方法

Family Applications After (4)

Application Number Title Priority Date Filing Date
CN2008103051404A Expired - Fee Related CN101436548B (zh) 2007-11-15 2008-10-24 无核层多层封装基板的制作方法
CN2008103051989A Expired - Fee Related CN101436549B (zh) 2007-11-15 2008-10-27 铜核层多层封装基板的制作方法
CN200810305365XA Expired - Fee Related CN101436550B (zh) 2007-11-15 2008-11-03 无核层多层封装基板的制作方法
CN2008103054154A Expired - Fee Related CN101436551B (zh) 2007-11-15 2008-11-07 铜核层多层封装基板的制作方法

Country Status (3)

Country Link
US (1) US20080188037A1 (cg-RX-API-DMAC10.html)
CN (5) CN101436547B (cg-RX-API-DMAC10.html)
TW (9) TW200921884A (cg-RX-API-DMAC10.html)

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US8456002B2 (en) 2007-12-14 2013-06-04 Stats Chippac Ltd. Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief
US9318441B2 (en) 2007-12-14 2016-04-19 Stats Chippac, Ltd. Semiconductor device and method of forming sacrificial adhesive over contact pads of semiconductor die
US8183095B2 (en) 2010-03-12 2012-05-22 Stats Chippac, Ltd. Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation
US7767496B2 (en) 2007-12-14 2010-08-03 Stats Chippac, Ltd. Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer
US8343809B2 (en) 2010-03-15 2013-01-01 Stats Chippac, Ltd. Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor die
US20090166858A1 (en) * 2007-12-28 2009-07-02 Bchir Omar J Lga substrate and method of making same
US8415203B2 (en) * 2008-09-29 2013-04-09 Freescale Semiconductor, Inc. Method of forming a semiconductor package including two devices
TWI421992B (zh) * 2009-08-05 2014-01-01 欣興電子股份有限公司 封裝基板及其製法
US9548240B2 (en) 2010-03-15 2017-01-17 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming repassivation layer for robust low cost fan-out semiconductor package
US8298863B2 (en) * 2010-04-29 2012-10-30 Texas Instruments Incorporated TCE compensation for package substrates for reduced die warpage assembly
CN102259544A (zh) * 2010-05-27 2011-11-30 禹辉(上海)转印材料有限公司 一种镭射信息层的制造方法
TWI496258B (zh) * 2010-10-26 2015-08-11 欣興電子股份有限公司 封裝基板之製法
US8698303B2 (en) 2010-11-23 2014-04-15 Ibiden Co., Ltd. Substrate for mounting semiconductor, semiconductor device and method for manufacturing semiconductor device
US20120286416A1 (en) * 2011-05-11 2012-11-15 Tessera Research Llc Semiconductor chip package assembly and method for making same
TW201248745A (en) * 2011-05-20 2012-12-01 Subtron Technology Co Ltd Package structure and manufacturing method thereof
CN103348361B (zh) * 2011-12-12 2017-05-24 Ev 集团 E·索尔纳有限责任公司 用于制造单独编码的读结构的方法和装置
CN103681384B (zh) 2012-09-17 2016-06-01 宏启胜精密电子(秦皇岛)有限公司 芯片封装基板和结构及其制作方法
CN103717009A (zh) * 2012-10-08 2014-04-09 苏州卓融水处理科技有限公司 一种无核封装基板种子层附着力的方法
TWI500125B (zh) * 2012-12-21 2015-09-11 欣興電子股份有限公司 電子元件封裝之製法
CN103903990B (zh) * 2012-12-28 2016-12-28 欣兴电子股份有限公司 电子组件封装的制法
US9299649B2 (en) 2013-02-08 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
US8802504B1 (en) * 2013-03-14 2014-08-12 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
CN107170689B (zh) 2013-06-11 2019-12-31 唐山国芯晶源电子有限公司 芯片封装基板
CN103887184B (zh) * 2014-03-28 2016-09-07 江阴芯智联电子科技有限公司 新型高密度高性能多层基板内对称结构及制作方法
CN105931997B (zh) * 2015-02-27 2019-02-05 胡迪群 暂时性复合式载板
DE102015116807A1 (de) * 2015-10-02 2017-04-06 Infineon Technologies Austria Ag Funktionalisierte Schnittstellenstruktur
CN108257875B (zh) * 2016-12-28 2021-11-23 碁鼎科技秦皇岛有限公司 芯片封装基板、芯片封装结构及二者的制作方法
TWI643532B (zh) * 2017-05-04 2018-12-01 南亞電路板股份有限公司 電路板結構及其製造方法
JP7046639B2 (ja) * 2018-02-21 2022-04-04 新光電気工業株式会社 配線基板及びその製造方法
US10573572B2 (en) * 2018-07-19 2020-02-25 Advanced Semiconductor Engineering, Inc. Electronic device and method for manufacturing a semiconductor package structure
CN111326494A (zh) * 2020-02-28 2020-06-23 维沃移动通信有限公司 封装结构、制作方法、电路板结构及电子设备
TWI733569B (zh) * 2020-08-27 2021-07-11 矽品精密工業股份有限公司 電子封裝件及其製法
CN112185928A (zh) * 2020-10-22 2021-01-05 上海艾为电子技术股份有限公司 一种芯片封装结构及其制备方法、封装芯片
CN112490234B (zh) * 2020-12-11 2025-11-14 广东汇芯半导体有限公司 智能功率模块和智能功率模块的制造方法
TWI759120B (zh) * 2021-03-04 2022-03-21 恆勁科技股份有限公司 中介基板及其製法
CN119626992A (zh) * 2024-01-29 2025-03-14 芯爱科技(南京)有限公司 封装基板及其制法
CN120221419A (zh) * 2025-05-14 2025-06-27 芯爱科技(南京)有限公司 封装基板的制法

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Publication number Priority date Publication date Assignee Title
US6294731B1 (en) * 1999-03-16 2001-09-25 Performance Interconnect, Inc. Apparatus for multichip packaging
US6278618B1 (en) * 1999-07-23 2001-08-21 National Semiconductor Corporation Substrate strips for use in integrated circuit packaging
JP3983146B2 (ja) * 2002-09-17 2007-09-26 Ｎｅｃエレクトロニクス株式会社 多層配線基板の製造方法

Also Published As

Publication number Publication date
CN101436551B (zh) 2010-12-01
CN101436551A (zh) 2009-05-20
CN101436550A (zh) 2009-05-20
TW200921884A (en) 2009-05-16
TW200921876A (en) 2009-05-16
TW200921816A (en) 2009-05-16
TW200921875A (en) 2009-05-16
TWI380387B (cg-RX-API-DMAC10.html) 2012-12-21
TWI348743B (cg-RX-API-DMAC10.html) 2011-09-11
CN101436549A (zh) 2009-05-20
CN101436547A (zh) 2009-05-20
CN101436549B (zh) 2010-06-02
TWI361481B (cg-RX-API-DMAC10.html) 2012-04-01
TW200922433A (en) 2009-05-16
TW200921818A (en) 2009-05-16
US20080188037A1 (en) 2008-08-07
TW200921817A (en) 2009-05-16
CN101436550B (zh) 2010-09-29
TWI380428B (cg-RX-API-DMAC10.html) 2012-12-21
TW200921819A (en) 2009-05-16
TW200921881A (en) 2009-05-16
TWI380422B (cg-RX-API-DMAC10.html) 2012-12-21
CN101436548B (zh) 2011-06-22
TWI373115B (cg-RX-API-DMAC10.html) 2012-09-21
TWI364805B (cg-RX-API-DMAC10.html) 2012-05-21
CN101436548A (zh) 2009-05-20

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Granted publication date: 20110622

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