CN101432858B - 用于浮置栅极存储单元的编程和擦除结构以及制造方法 - Google Patents

用于浮置栅极存储单元的编程和擦除结构以及制造方法 Download PDF

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Publication number
CN101432858B
CN101432858B CN200580031541XA CN200580031541A CN101432858B CN 101432858 B CN101432858 B CN 101432858B CN 200580031541X A CN200580031541X A CN 200580031541XA CN 200580031541 A CN200580031541 A CN 200580031541A CN 101432858 B CN101432858 B CN 101432858B
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China
Prior art keywords
layer
floating gate
gate layer
floating
etching stopping
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Expired - Fee Related
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CN200580031541XA
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English (en)
Chinese (zh)
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CN101432858A (zh
Inventor
高里尚卡尔·L·真达洛雷
克雷格·T·斯维夫特
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NXP USA Inc
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Freescale Semiconductor Inc
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures

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  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
CN200580031541XA 2004-09-17 2005-08-15 用于浮置栅极存储单元的编程和擦除结构以及制造方法 Expired - Fee Related CN101432858B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/944,244 US7183161B2 (en) 2004-09-17 2004-09-17 Programming and erasing structure for a floating gate memory cell and method of making
US10/944,244 2004-09-17
PCT/US2005/028828 WO2006036334A2 (en) 2004-09-17 2005-08-15 Programming and erasing structure for a floating gate memory cell and method of making

Publications (2)

Publication Number Publication Date
CN101432858A CN101432858A (zh) 2009-05-13
CN101432858B true CN101432858B (zh) 2012-06-27

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Family Applications (1)

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CN200580031541XA Expired - Fee Related CN101432858B (zh) 2004-09-17 2005-08-15 用于浮置栅极存储单元的编程和擦除结构以及制造方法

Country Status (7)

Country Link
US (2) US7183161B2 (https=)
EP (1) EP1792336A2 (https=)
JP (1) JP5103182B2 (https=)
KR (1) KR20070048247A (https=)
CN (1) CN101432858B (https=)
TW (1) TWI412085B (https=)
WO (1) WO2006036334A2 (https=)

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JP4377676B2 (ja) * 2003-12-24 2009-12-02 株式会社東芝 半導体装置およびその製造方法
US7615445B2 (en) * 2006-09-21 2009-11-10 Sandisk Corporation Methods of reducing coupling between floating gates in nonvolatile memory
US8076229B2 (en) * 2008-05-30 2011-12-13 Micron Technology, Inc. Methods of forming data cells and connections to data cells
WO2010086067A1 (en) * 2009-01-29 2010-08-05 International Business Machines Corporation Memory transistor with a non-planar floating gate and manufacturing method thereof
US8415217B2 (en) * 2011-03-31 2013-04-09 Freescale Semiconductor, Inc. Patterning a gate stack of a non-volatile memory (NVM) with formation of a capacitor

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US6713834B2 (en) * 2000-10-30 2004-03-30 Kabushiki Kaisha Toshiba Semiconductor device having two-layered charge storage electrode

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Also Published As

Publication number Publication date
WO2006036334A3 (en) 2009-04-02
JP5103182B2 (ja) 2012-12-19
US7745870B2 (en) 2010-06-29
TW200623275A (en) 2006-07-01
US7183161B2 (en) 2007-02-27
TWI412085B (zh) 2013-10-11
WO2006036334A2 (en) 2006-04-06
EP1792336A2 (en) 2007-06-06
CN101432858A (zh) 2009-05-13
JP2008513999A (ja) 2008-05-01
KR20070048247A (ko) 2007-05-08
US20070117319A1 (en) 2007-05-24
US20060063328A1 (en) 2006-03-23

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Address after: Texas in the United States

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Patentee before: Fisical Semiconductor Inc.

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Granted publication date: 20120627

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CF01 Termination of patent right due to non-payment of annual fee