CN101409214B - 制造半导体器件的方法 - Google Patents
制造半导体器件的方法 Download PDFInfo
- Publication number
- CN101409214B CN101409214B CN2008101665153A CN200810166515A CN101409214B CN 101409214 B CN101409214 B CN 101409214B CN 2008101665153 A CN2008101665153 A CN 2008101665153A CN 200810166515 A CN200810166515 A CN 200810166515A CN 101409214 B CN101409214 B CN 101409214B
- Authority
- CN
- China
- Prior art keywords
- film
- substrate
- semiconductor
- insulating film
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1914—Preparing SOI wafers using bonding
- H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
Landscapes
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
- Liquid Crystal (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007-264051 | 2007-10-10 | ||
| JP2007264051 | 2007-10-10 | ||
| JP2007264051 | 2007-10-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101409214A CN101409214A (zh) | 2009-04-15 |
| CN101409214B true CN101409214B (zh) | 2012-11-14 |
Family
ID=40534650
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008101665153A Expired - Fee Related CN101409214B (zh) | 2007-10-10 | 2008-10-09 | 制造半导体器件的方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8101501B2 (https=) |
| JP (1) | JP2009111375A (https=) |
| KR (1) | KR101498576B1 (https=) |
| CN (1) | CN101409214B (https=) |
| TW (1) | TWI453803B (https=) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2143146A1 (en) * | 2007-04-13 | 2010-01-13 | Semiconductor Energy Laboratory Co, Ltd. | Photovoltaic device and method for manufacturing the same |
| SG163481A1 (en) * | 2009-01-21 | 2010-08-30 | Semiconductor Energy Lab | Method for manufacturing soi substrate and semiconductor device |
| JP2011029610A (ja) * | 2009-06-26 | 2011-02-10 | Semiconductor Energy Lab Co Ltd | 半導体装置及びその作製方法 |
| EP2599110A4 (en) | 2009-07-28 | 2014-04-23 | Gigasi Solar Inc | SYSTEMS, METHODS AND MATERIALS FOR CRYSTALLIZING SUBSTRATES THROUGH UNDERGLASHING GLASSES AND PRODUCTS MANUFACTURED BY SUCH METHODS |
| EP2282332B1 (en) * | 2009-08-04 | 2012-06-27 | S.O.I. TEC Silicon | Method for fabricating a semiconductor substrate |
| JP5713603B2 (ja) * | 2009-09-02 | 2015-05-07 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
| TWI426565B (zh) * | 2009-10-15 | 2014-02-11 | 友達光電股份有限公司 | 顯示面板及薄膜電晶體之閘極絕緣層的重工方法 |
| KR101772639B1 (ko) * | 2009-10-16 | 2017-08-29 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| WO2011066485A2 (en) * | 2009-11-25 | 2011-06-03 | Gigasi Solar, Inc. | Systems, methods and products including features of laser irradiation and/or cleaving of silicon with other substrates or layers |
| TWI451474B (zh) * | 2009-12-14 | 2014-09-01 | Tien Hsi Lee | 一種製作可轉移性晶體薄膜的方法 |
| WO2011081000A1 (en) * | 2009-12-28 | 2011-07-07 | Semiconductor Energy Laboratory Co., Ltd. | Memory device and semiconductor device |
| JP5618656B2 (ja) * | 2010-07-09 | 2014-11-05 | 株式会社半導体エネルギー研究所 | 半導体基板の作製方法 |
| US8735263B2 (en) | 2011-01-21 | 2014-05-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| JP5839804B2 (ja) * | 2011-01-25 | 2016-01-06 | 国立大学法人東北大学 | 半導体装置の製造方法、および半導体装置 |
| KR102225764B1 (ko) | 2011-01-25 | 2021-03-10 | 에베 그룹 에. 탈너 게엠베하 | 웨이퍼들의 영구적 결합을 위한 방법 |
| EP2695183A1 (de) | 2011-04-08 | 2014-02-12 | Ev Group E. Thallner GmbH | Verfahren zum permanenten bonden von wafern |
| CN103460342B (zh) | 2011-04-08 | 2016-12-07 | Ev 集团 E·索尔纳有限责任公司 | 晶片的永久粘合方法 |
| CN102593285B (zh) * | 2012-03-06 | 2014-07-09 | 华灿光电股份有限公司 | 一种回收图形化蓝宝石衬底的方法 |
| FR2995445B1 (fr) * | 2012-09-07 | 2016-01-08 | Soitec Silicon On Insulator | Procede de fabrication d'une structure en vue d'une separation ulterieure |
| JP6393574B2 (ja) | 2014-10-09 | 2018-09-19 | 東京エレクトロン株式会社 | エッチング方法 |
| US9870940B2 (en) | 2015-08-03 | 2018-01-16 | Samsung Electronics Co., Ltd. | Methods of forming nanosheets on lattice mismatched substrates |
| JP6737066B2 (ja) * | 2016-08-22 | 2020-08-05 | 株式会社Sumco | エピタキシャルシリコンウェーハの製造方法、エピタキシャルシリコンウェーハ、及び固体撮像素子の製造方法 |
| CN106449689A (zh) * | 2016-11-11 | 2017-02-22 | 中国电子科技集团公司第四十四研究所 | 带聚酰亚胺垫层的帧转移可见光ccd |
| JP6810578B2 (ja) * | 2016-11-18 | 2021-01-06 | 株式会社Screenホールディングス | ドーパント導入方法および熱処理方法 |
| JP7118973B2 (ja) | 2017-08-04 | 2022-08-16 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| FR3077923B1 (fr) * | 2018-02-12 | 2021-07-16 | Soitec Silicon On Insulator | Procede de fabrication d'une structure de type semi-conducteur sur isolant par transfert de couche |
| EP4210092A1 (en) * | 2018-06-08 | 2023-07-12 | GlobalWafers Co., Ltd. | Method for transfer of a thin layer of silicon |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6534380B1 (en) * | 1997-07-18 | 2003-03-18 | Denso Corporation | Semiconductor substrate and method of manufacturing the same |
| WO2005124865A1 (ja) * | 2004-06-17 | 2005-12-29 | Shin-Etsu Handotai Co., Ltd. | 貼り合わせウェーハの製造方法 |
| CN1716577A (zh) * | 2004-06-24 | 2006-01-04 | 硅电子股份公司 | 半导体衬底及其制造工艺 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2874259B2 (ja) * | 1990-03-15 | 1999-03-24 | 富士通株式会社 | 半導体基板のドライ洗浄方法 |
| FR2681472B1 (fr) * | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| EP0553852B1 (en) * | 1992-01-30 | 2003-08-20 | Canon Kabushiki Kaisha | Process for producing semiconductor substrate |
| JPH07263721A (ja) * | 1994-03-25 | 1995-10-13 | Nippondenso Co Ltd | 半導体装置及びその製造方法 |
| JP4103968B2 (ja) * | 1996-09-18 | 2008-06-18 | 株式会社半導体エネルギー研究所 | 絶縁ゲイト型半導体装置 |
| US6191007B1 (en) * | 1997-04-28 | 2001-02-20 | Denso Corporation | Method for manufacturing a semiconductor substrate |
| JPH1197379A (ja) * | 1997-07-25 | 1999-04-09 | Denso Corp | 半導体基板及び半導体基板の製造方法 |
| US6388652B1 (en) * | 1997-08-20 | 2002-05-14 | Semiconductor Energy Laboratory Co., Ltd. | Electrooptical device |
| US6686623B2 (en) * | 1997-11-18 | 2004-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile memory and electronic apparatus |
| JPH11163363A (ja) | 1997-11-22 | 1999-06-18 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| FR2773261B1 (fr) * | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
| JPH11233449A (ja) * | 1998-02-13 | 1999-08-27 | Denso Corp | 半導体基板の製造方法 |
| JP2000012864A (ja) * | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| JP2920188B1 (ja) * | 1998-06-26 | 1999-07-19 | 日新電機株式会社 | パルスバイアス水素負イオン注入方法及び注入装置 |
| US6271101B1 (en) * | 1998-07-29 | 2001-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Process for production of SOI substrate and process for production of semiconductor device |
| JP2000077287A (ja) * | 1998-08-26 | 2000-03-14 | Nissin Electric Co Ltd | 結晶薄膜基板の製造方法 |
| JP4476390B2 (ja) * | 1998-09-04 | 2010-06-09 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP2000124092A (ja) | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
| US6255195B1 (en) * | 1999-02-22 | 2001-07-03 | Intersil Corporation | Method for forming a bonded substrate containing a planar intrinsic gettering zone and substrate formed by said method |
| US6468923B1 (en) * | 1999-03-26 | 2002-10-22 | Canon Kabushiki Kaisha | Method of producing semiconductor member |
| JP3900741B2 (ja) * | 1999-05-21 | 2007-04-04 | 信越半導体株式会社 | Soiウェーハの製造方法 |
| US6653209B1 (en) * | 1999-09-30 | 2003-11-25 | Canon Kabushiki Kaisha | Method of producing silicon thin film, method of constructing SOI substrate and semiconductor device |
| JP2001168308A (ja) | 1999-09-30 | 2001-06-22 | Canon Inc | シリコン薄膜の製造方法、soi基板の作製方法及び半導体装置 |
| JP3943782B2 (ja) * | 1999-11-29 | 2007-07-11 | 信越半導体株式会社 | 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ |
| WO2001048825A1 (en) * | 1999-12-24 | 2001-07-05 | Shin-Etsu Handotai Co., Ltd. | Method for manufacturing bonded wafer |
| JP2001196566A (ja) * | 2000-01-07 | 2001-07-19 | Sony Corp | 半導体基板およびその製造方法 |
| JP4450126B2 (ja) * | 2000-01-21 | 2010-04-14 | 日新電機株式会社 | シリコン系結晶薄膜の形成方法 |
| KR100741541B1 (ko) * | 2000-05-30 | 2007-07-20 | 신에쯔 한도타이 가부시키가이샤 | 접합웨이퍼의 제조방법 및 접합웨이퍼 |
| CN100454552C (zh) * | 2001-07-17 | 2009-01-21 | 信越半导体株式会社 | 贴合晶片的制造方法及贴合晶片、以及贴合soi晶片 |
| US7119365B2 (en) * | 2002-03-26 | 2006-10-10 | Sharp Kabushiki Kaisha | Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate |
| JP4772258B2 (ja) | 2002-08-23 | 2011-09-14 | シャープ株式会社 | Soi基板の製造方法 |
| JP2004063730A (ja) * | 2002-07-29 | 2004-02-26 | Shin Etsu Handotai Co Ltd | Soiウェーハの製造方法 |
| US6995427B2 (en) * | 2003-01-29 | 2006-02-07 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same |
| WO2005027214A1 (ja) * | 2003-09-10 | 2005-03-24 | Shin-Etsu Handotai Co., Ltd. | 積層基板の洗浄方法及び基板の貼り合わせ方法並びに貼り合せウェーハの製造方法 |
| US7071122B2 (en) * | 2003-12-10 | 2006-07-04 | International Business Machines Corporation | Field effect transistor with etched-back gate dielectric |
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| JP4626175B2 (ja) * | 2004-04-09 | 2011-02-02 | 株式会社Sumco | Soi基板の製造方法 |
| US6893936B1 (en) * | 2004-06-29 | 2005-05-17 | International Business Machines Corporation | Method of Forming strained SI/SIGE on insulator with silicon germanium buffer |
| US7279400B2 (en) * | 2004-08-05 | 2007-10-09 | Sharp Laboratories Of America, Inc. | Method of fabricating single-layer and multi-layer single crystalline silicon and silicon devices on plastic using sacrificial glass |
| US7276430B2 (en) * | 2004-12-14 | 2007-10-02 | Electronics And Telecommunications Research Institute | Manufacturing method of silicon on insulator wafer |
| JP2006303089A (ja) * | 2005-04-19 | 2006-11-02 | Sumco Corp | シリコン基板の洗浄方法 |
| KR20080042095A (ko) * | 2005-07-27 | 2008-05-14 | 실리콘 제너시스 코포레이션 | 제어된 클리빙 처리를 이용하여 플레이트 상에 다수의 타일영역을 제작하는 방법 및 구조 |
| FR2896619B1 (fr) * | 2006-01-23 | 2008-05-23 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat composite a proprietes electriques ameliorees |
| FR2911430B1 (fr) * | 2007-01-15 | 2009-04-17 | Soitec Silicon On Insulator | "procede de fabrication d'un substrat hybride" |
| KR101443580B1 (ko) * | 2007-05-11 | 2014-10-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Soi구조를 갖는 기판 |
-
2008
- 2008-09-29 US US12/240,186 patent/US8101501B2/en not_active Expired - Fee Related
- 2008-10-06 TW TW097138415A patent/TWI453803B/zh not_active IP Right Cessation
- 2008-10-07 KR KR1020080098043A patent/KR101498576B1/ko not_active Expired - Fee Related
- 2008-10-09 CN CN2008101665153A patent/CN101409214B/zh not_active Expired - Fee Related
- 2008-10-09 JP JP2008262641A patent/JP2009111375A/ja not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6534380B1 (en) * | 1997-07-18 | 2003-03-18 | Denso Corporation | Semiconductor substrate and method of manufacturing the same |
| WO2005124865A1 (ja) * | 2004-06-17 | 2005-12-29 | Shin-Etsu Handotai Co., Ltd. | 貼り合わせウェーハの製造方法 |
| CN1716577A (zh) * | 2004-06-24 | 2006-01-04 | 硅电子股份公司 | 半导体衬底及其制造工艺 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20090037312A (ko) | 2009-04-15 |
| JP2009111375A (ja) | 2009-05-21 |
| CN101409214A (zh) | 2009-04-15 |
| TWI453803B (zh) | 2014-09-21 |
| TW200931503A (en) | 2009-07-16 |
| KR101498576B1 (ko) | 2015-03-04 |
| US20090098709A1 (en) | 2009-04-16 |
| US8101501B2 (en) | 2012-01-24 |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20121114 Termination date: 20201009 |
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| CF01 | Termination of patent right due to non-payment of annual fee |