CN101404267A - 半导体装置与半导体装置的制造方法 - Google Patents

半导体装置与半导体装置的制造方法 Download PDF

Info

Publication number
CN101404267A
CN101404267A CN 200810211001 CN200810211001A CN101404267A CN 101404267 A CN101404267 A CN 101404267A CN 200810211001 CN200810211001 CN 200810211001 CN 200810211001 A CN200810211001 A CN 200810211001A CN 101404267 A CN101404267 A CN 101404267A
Authority
CN
China
Prior art keywords
semiconductor chip
metal layer
carrier tape
semiconductor device
resin layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN 200810211001
Other languages
English (en)
Chinese (zh)
Inventor
中村嘉文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of CN101404267A publication Critical patent/CN101404267A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
CN 200810211001 2007-10-03 2008-08-13 半导体装置与半导体装置的制造方法 Pending CN101404267A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007259296 2007-10-03
JP2007259296 2007-10-03
JP2008097648 2008-04-04

Publications (1)

Publication Number Publication Date
CN101404267A true CN101404267A (zh) 2009-04-08

Family

ID=40538210

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200810211001 Pending CN101404267A (zh) 2007-10-03 2008-08-13 半导体装置与半导体装置的制造方法

Country Status (2)

Country Link
JP (1) JP2009105366A (enrdf_load_stackoverflow)
CN (1) CN101404267A (enrdf_load_stackoverflow)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101924082A (zh) * 2009-06-16 2010-12-22 东部高科股份有限公司 热释放半导体封装
CN101986429A (zh) * 2009-07-28 2011-03-16 精材科技股份有限公司 芯片封装体及其形成方法
CN103594434A (zh) * 2013-10-23 2014-02-19 孔星 功率部件复合散热层及其工艺和带复合散热层的功率部件
CN103635996A (zh) * 2011-06-30 2014-03-12 英特尔公司 无焊内建层封装的翘曲减小
US9613920B2 (en) 2012-05-14 2017-04-04 Intel Corporation Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias
US9646851B2 (en) 2010-04-02 2017-05-09 Intel Corporation Embedded semiconductive chips in reconstituted wafers, and systems containing same
TWI697079B (zh) * 2019-03-06 2020-06-21 南茂科技股份有限公司 薄膜覆晶封裝結構
CN112420632A (zh) * 2019-08-23 2021-02-26 三星电子株式会社 半导体封装件
CN114424335A (zh) * 2019-09-27 2022-04-29 株式会社电装 电子装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5799541B2 (ja) 2011-03-25 2015-10-28 株式会社ソシオネクスト 半導体装置及びその製造方法
KR101630769B1 (ko) 2014-06-24 2016-06-16 매그나칩 반도체 유한회사 방열 반도체 칩 패키지 및 그 제조 방법
CN113327899A (zh) * 2021-04-22 2021-08-31 成都芯源系统有限公司 倒装芯片封装单元及封装方法

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101924082A (zh) * 2009-06-16 2010-12-22 东部高科股份有限公司 热释放半导体封装
CN101986429A (zh) * 2009-07-28 2011-03-16 精材科技股份有限公司 芯片封装体及其形成方法
US9646851B2 (en) 2010-04-02 2017-05-09 Intel Corporation Embedded semiconductive chips in reconstituted wafers, and systems containing same
US11257688B2 (en) 2010-04-02 2022-02-22 Intel Corporation Embedded semiconductive chips in reconstituted wafers, and systems containing same
US10651051B2 (en) 2010-04-02 2020-05-12 Intel Corporation Embedded semiconductive chips in reconstituted wafers, and systems containing same
US9847234B2 (en) 2010-04-02 2017-12-19 Intel Corporation Embedded semiconductive chips in reconstituted wafers, and systems containing same
CN103635996B (zh) * 2011-06-30 2016-08-17 英特尔公司 无焊内建层封装的翘曲减小
US9627227B2 (en) 2011-06-30 2017-04-18 Intel Corporation Bumpless build-up layer package warpage reduction
CN103635996A (zh) * 2011-06-30 2014-03-12 英特尔公司 无焊内建层封装的翘曲减小
US9613920B2 (en) 2012-05-14 2017-04-04 Intel Corporation Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias
CN103594434A (zh) * 2013-10-23 2014-02-19 孔星 功率部件复合散热层及其工艺和带复合散热层的功率部件
TWI697079B (zh) * 2019-03-06 2020-06-21 南茂科技股份有限公司 薄膜覆晶封裝結構
CN111668172A (zh) * 2019-03-06 2020-09-15 南茂科技股份有限公司 薄膜覆晶封装结构
CN111668172B (zh) * 2019-03-06 2022-05-03 南茂科技股份有限公司 薄膜覆晶封装结构
CN112420632A (zh) * 2019-08-23 2021-02-26 三星电子株式会社 半导体封装件
CN114424335A (zh) * 2019-09-27 2022-04-29 株式会社电装 电子装置

Also Published As

Publication number Publication date
JP2009105366A (ja) 2009-05-14

Similar Documents

Publication Publication Date Title
CN101404267A (zh) 半导体装置与半导体装置的制造方法
US6330158B1 (en) Semiconductor package having heat sinks and method of fabrication
JP5008767B2 (ja) 基板モジュールおよびその製造方法
KR19990045606A (ko) 전자 부품을 실장하는 유연성 인쇄 회로 기판 유닛
CN101388368A (zh) 半导体模块装置及其制造方法以及显示装置、显示面板
US20090091021A1 (en) Semiconductor device and method of manufacturing the same
CN100385648C (zh) 半导体器件以及电子设备
JP2011176112A (ja) 半導体集積回路及びその製造方法
JP4075204B2 (ja) 積層型半導体装置
JP2012191002A (ja) 半導体装置
US7561436B2 (en) Circuit assembly with surface-mount IC package and heat sink
CN101814459A (zh) 半导体封装的安装结构及等离子体显示器件
US7176563B2 (en) Electronically grounded heat spreader
KR100658442B1 (ko) 열분산형 테이프 패키지 및 그를 이용한 평판 표시 장치
US7466030B2 (en) Semiconductor device and fabrication process thereof
JP3152209B2 (ja) 半導体装置及びその製造方法
JP4085572B2 (ja) 半導体装置及びその製造方法
CN101350339A (zh) 带载基板和半导体器件
US20080136017A1 (en) Semiconductor device, method for manufacturing the same, and semiconductor device mounting structure
JP3743716B2 (ja) フレキシブル配線基板及び半導体素子の実装方法
JP2590521B2 (ja) チップキャリア
JP3425924B2 (ja) 半導体装置
JP2008166711A (ja) 半導体装置およびその製造方法並びに半導体装置の実装構造
JPH10256304A (ja) 半導体装置の製造方法
JPH0342860A (ja) フレキシブルプリント配線板

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Open date: 20090408