CN101924082A - 热释放半导体封装 - Google Patents
热释放半导体封装 Download PDFInfo
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- CN101924082A CN101924082A CN2010102074459A CN201010207445A CN101924082A CN 101924082 A CN101924082 A CN 101924082A CN 2010102074459 A CN2010102074459 A CN 2010102074459A CN 201010207445 A CN201010207445 A CN 201010207445A CN 101924082 A CN101924082 A CN 101924082A
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Abstract
一种热释放半导体封装及其制造方法,以及包括该热释放半导体封装的显示装置。该热释放半导体封装包括膜、形成在膜上方的电极图案、安装在电极图案上方的半导体器件、以及形成在包括电极图案的半导体器件上方的第一热释放层,第一热释放层包括第一粘合剂和第一热释放材料。
Description
技术领域
本发明实施例涉及一种热释放半导体封装及其制造方法,以及包括该热释放半导体封装的显示装置。
背景技术
通常,从用于显示装置的驱动集成电路(IC)生成的热量需要被传送到外部,以防止设置有驱动IC的产品的热损耗。这种显示装置可包括,例如,液晶显示器(LCD)、等离子体显示面板(PDP)、有机发光二极管(OLED)等等。
LCD可通过使用电场控制液晶的透光率来显示图像。为了显示图像,LCD可设置有包括以矩阵结构排列的多个液晶单元的液晶面板,以及用于驱动液晶面板的驱动电路。与阴极射线管(CRT)相比,LCD可以小型化,因此能被商业化为显示装置,例如便携式电视、膝上型个人计算机等。
数据驱动器和栅极驱动器集成在多个集成电路中。每个集成的数据驱动器IC和栅极驱动器IC都被安装在带载封装(在下文中称为“TCP”)上。在卷带自动结合(TAB)方法中,集成的数据驱动器IC和栅极驱动器IC连接到液晶面板。可选地,使用玻璃上芯片(COG)方法在液晶面板上安装集成的数据驱动器IC和栅极驱动器IC。驱动器IC和数据驱动器IC总起来称为驱动器IC。
特别地,由于为了降低成本而出现了高分辨率显示器并出现了高集成度IC,因此IC的热生成引起了严重的问题。热生成会影响电路的稳定性,并可能威胁到柔性基膜的耐热温度。
附着卷带以降低驱动IC的热生成的方法需要附加工艺以及辅料。而且,诸如铝(Al)等的薄金属热释放片被附着,但是不能应用到具有不规则表面的主体。而且,薄金属热释放片在减少其厚度方面具有局限性,并且难于制造。
此外,在附着薄金属热释放片的情况下,可能需要使用单独的层压设备。还可能需要制造并提供薄金属热释放片以与主体的需求相匹配。这意味着,可能需要根据产品IC等的规格来单独制造薄金属热释放片。
因为热释放片一般具有多层结构,所以其制造成本增加,这依次增加了最终产品的制造成本。
发明内容
实施例涉及一种热释放半导体封装及其制造方法,以及包括该热释放半导体封装的显示装置,能保护半导体封装不受有关由于热导致的电路稳定性的影响。
实施例涉及一种热释放半导体封装及其制造方法,以及包括该热释放半导体封装的显示装置,能降低产品价格且便于应用,而不论驱动IC的布局。
实施例涉及一种热释放半导体封装及其制造方法,以及包括该热释放半导体封装的显示装置,甚至能容易地应用到具有不规则表面的产品。
根据实施例,一种热释放半导体封装可包括以下中的至少一个:形成在膜上和/或上方的电极图案;安装在电极图案上和/或上方的半导体器件;以及形成在半导体器件上和/或上方的第一热释放层,使得第一热释放层包括粘合剂和热释放涂料,第一热释放层被涂覆在电极图案上方。
根据实施例,一种热释放半导体封装可包括以下中的至少一个:形成在膜上和/或上方的电极图案;安装在电极图案上和/或上方的半导体器件;以及形成在膜下方的第二热释放层,使得第二热释放层包括粘合剂和热释放涂料,第二热释放层被涂覆在电极图案上和/或上方。
根据实施例,一种热释放半导体封装的制造方法可包括以下中的至少一个步骤:在膜上和/或上方形成电极图案;在电极图案上和/或上方安装半导体器件;以及然后通过在半导体器件上和/或上方涂覆第一热释放层来在半导体器件上和/或上方形成第一热释放层。
根据实施例,一种热释放半导体封装的制造方法可包括以下中的至少一个步骤:在膜上和/或上方形成电极图案;在电极图案上和/或上方安装半导体器件;以及然后通过混合粘合剂和热释放涂料并随后涂覆混合后的粘合剂和热释放涂料来在膜下方形成第二热释放层。
根据实施例,一种包括热释放半导体封装的显示装置可包括以下中的至少一个:显示面板;以及电性连接到显示面板的热释放半导体封装。
附图说明
实例图1至图7示出根据实施例的热释放半导体封装、热释放半导体封装的制造方法、以及用于在热释放半导体封装的制造方法中喷射热释放涂料的喷嘴。
具体实施方式
在下文中,将参照附图描述根据实施例的热释放半导体封装及其制造方法,以及包括该热释放半导体封装的显示装置。
如实例图1A所示,根据实施例的热释放半导体封装100可包括:形成在膜10上和/或上方的电极图案20,安装在电极图案20上和/或上方的半导体器件50,以及形成在半导体器件50上和/或上方的第一热释放层90。根据实施例的热释放半导体封装100可用于释放从安装在带载封装(TCP)上和/或上方的驱动IC发出的热量,或从装配在利用半导体器件的显示面板主体(例如液晶显示器(LCD)、等离子体显示面板(PDP)、有机发光二极管(OLED)、发光二极管(LED)、射频识别(RFID)等)的边缘中的膜上芯片(COF)发出的热量。
根据实施例,第一热释放层90可通过在用于TCP或COF(例如柔性印刷电路板(FPCB))中的膜10的整个表面或一部分表面上和/或上方涂覆液体热释放涂料、并固化涂覆的液体热释放涂料而形成。第一热释放层90可以是不导电(nonconductive)热释放层。例如,可在粘合剂和热释放涂料被混合后,涂覆并随后固化第一热释放层90。在这种情况下,因为粘合剂不导电,所以第一热释放层90可以是不导电热释放层,而无论热释放涂料是否导电。
热释放涂料可以指装配半导体封装时使用的热释放涂层溶液。热释放涂料可以是包括有机或无机涂层材料的绝缘材料,例如陶瓷、硅等等,或诸如各种金属印膏(metal paste)、碳纳米管(CNT)、石墨等等的导电材料,或可包括其他复合涂层涂料。
如实例图1B所示,根据实施例的热释放半导体封装200还可包括第一粘合剂层30,形成在半导体器件50上和/或上方以增强粘合功能和绝缘功能。实例图1A和图1B中没有描述的附图标记将在制造方法中描述。可通过附加地涂覆绝缘涂料来在第一热释放层90上和/或上方形成第一绝缘层71,以增强绝缘功能。绝缘涂料可被应用到具有良好的辐射和放射性能的产品。还可在第一热释放层90上和/或上方形成第一绝缘层71。
包括该热释放半导体封装的显示装置可以是利用半导体器件的显示装置、LCD、PDP、OLED、LED、RFID等,并且可包括具有类似形状的未来开发出的显示装置。
通过根据实施例的热释放半导体封装,由于甚至在一般热释放片或卷带不能被附着的一部分上和/或上方能够添加热释放器件,因此能增强热释放效果。该工艺可被简化从而减低制造成本。能通过控制热释放涂料的喷射量和喷射时间来任意调整热释放层的厚度,因此能够消除不必要的材料浪费。此外,由于可通过向一般封装设备添加喷嘴喷射装置来构成制造设施,所以由喷嘴喷射装置的增加导致的成本增长并不大。因为热释放层形成在发热器件上和/或上方,所以能进一步增强热生成降低的效果。
在下文中,将参照实例图2A-图2C描述根据实施例的热释放半导体封装的制造方法。
尽管实施例下面示出并描述了为单元半导体器件50形成热释放层,然而本发明并不限于此。例如,可通过使用多个喷嘴在以预定间隔相互分开排列的多个半导体器件上和/或上方涂覆热释放层。
如实例图2A所示,在膜10上和/或上方形成电极图案20。膜10可以是柔性印刷电路板(FPCB),但实施例并不限于此。在膜10下方还可设置支撑膜。可形成多个电极图案20以面对一个侧面和另一个侧面。互相间隔设置的电极图案20可分别作为输入焊盘(pad)和输出焊盘。输入焊盘可电性连接到PCB基板,输出焊盘可电性连接到显示面板。之后,可在电极图案20上和/或上方形成保护层40。例如,可形成绝缘层作为保护层40,但实施例并不限于此。
之后,在电极图案20上和/或上方安装半导体器件50。例如,可使半导体器件50的端子52分别直接接触电极图案20的表面来安装半导体器件50。在当半导体器件50和膜10之间的间隙大的情况下,可在涂覆热释放涂料之前执行填充工艺以形成填充物13。在第一粘合剂层30工艺被执行以作为后续工艺的情况下,第一粘合剂层30可执行填充物的功能,或者可在形成第一粘合剂层30的工艺之前或之后执行单独的填充工艺。
如实例图2B所示,可在用于TCP或COF中的膜10的整个表面或一部分表面上和/或上方涂覆不导电液体粘合剂,从而形成第一粘合剂层30。粘合剂可以是有机或无机复合物,但实施例并不限于此。根据实施例,通过形成第一粘合剂层30,能够增强粘合功能和绝缘功能。第一粘合剂层30可被涂覆在能够完全覆盖半导体器件50的区域中。形成的第一粘合剂层30可具有1μm到100μm之间的范围内的厚度,但实施例并不限于此。可通过使用第一喷嘴210来均匀涂覆液体粘合剂。可不执行形成第一粘合剂层30的工艺。例如,在第一热释放层90能组合不导电热释放功能和粘合功能的情况下,可省略形成第一粘合剂层30的工艺。
第一粘合剂层30是用于牢固地(rigidly)将第一热释放层90附着到膜10的表面上和/或上方的辅助结构。例如,如果第一热释放层90具有导电功能并且不具有粘合功能,则可形成第一粘合剂层30以提供粘合功能。存在如下需求,第一粘合剂层30应该被完全涂覆在作为热释放层90的目标的元件的表面上和/或上方。在完全执行涂覆第一粘合剂层30的状态下,当应用热释放层90或第一粘合剂层30的涂覆区域不对应热释放层90的涂覆区域时,热释放层90可直接涂覆于驱动IC或输入/输出端子上和/或上方。如果第一热释放层90具有导电性,会产生短路(short)的危险。
根据实施例,可向粘合剂添加色素或荧光材料以使工人能从视觉上确认第一粘合剂层30是否被涂覆。可选择能明显与FPCB和热释放涂料区别的颜色。
如实例图2C所示,在第一粘合剂层30或半导体器件50上和/或上方形成第一热释放层90。可通过在第一粘合剂层30或半导体器件50上和/或上方共同涂覆粘合剂和热释放涂料来执行形成第一热释放层90的步骤。例如,可如此形成第一热释放层90:混合液体粘合剂和热释放涂料、在第一粘合剂层30的最上层表面的整个表面或一部分上和/或上方涂覆混合物、然后固化涂覆的混合物。作为固化方法,可使用热固化、UV固化、室温固化等。例如,可使用与热释放涂料的组分匹配的UV光源或热固化炉来执行固化。例如,作为UV光源,可使用灯型(lamp-type)或LED型,但实施例并不限于此。粘合剂可以是树脂,例如聚丙烯酸脂等,但实施例并不限于此。
根据实施例,热释放涂料可包括不导电材料、导电材料、以及不导电材料和导电材料的混合物中的至少一种。例如,热释放涂料可指装配半导体封装时使用的热释放涂层溶液。热释放涂料可以是包括诸如铝氧化物/锌氧化物等的陶瓷填充物和诸如硅等的有机/无机涂层剂的绝缘材料,诸如各种金属印膏、碳纳米管(CNT)、石墨等的导电材料,其它复合涂层涂料,或绝缘材料和导电材料的混合物。第一热释放层90可包括约5wt%(重量百分比)-20wt%的粘合剂,以及约80wt%-95wt%的热释放涂料,但实施例并不限于此。除粘合剂和热释放涂料之外,第一热释放层90还可包括添加剂。例如,第一热释放层90可包括约5wt%-约15wt%的粘合剂,约80wt%-约90wt%的热释放涂料,以及约5wt%-约15wt%的添加剂,但实施例并不限于此。
可由第二喷嘴220均匀注射和涂覆热释放涂料。如有需要,可在1μm-100μm的范围内调整热释放层90的厚度,但实施例并不限于此。如果需要,可增加热释放层90的厚度。第一热释放层90可以是导电或不导电的热释放层。例如,可通过混合粘合剂和热释放涂料、涂覆混合物并固化涂覆的混合物来形成第一热释放层90。由于粘合剂不导电,所以第一热释放层90可以是不导电的热释放层,而无论热释放涂料是否导电。因此,可省略第一粘合剂层30的形成。作为用于形成第一热释放层90的粘合剂(粘合物),可使用类似第一粘合剂层30的有机或无机复合树脂,但实施例并不限于此。
实例图4示出透视图,示意性示出用于在根据实施例的热释放半导体封装的制造方法中喷射热释放涂料的喷嘴。
如实例图4所示,在第一喷嘴210和第二喷嘴220安装在膜10上和/或上方或膜10下方的状态中,当使用移动/平移装置在横向和/或纵向上移动第一喷嘴210和第二喷嘴220时,第一喷嘴210和第二喷嘴220可分别注射粘合剂和热释放涂料。可提前输入有关在目标对象上涂覆热释放涂料的区域和位置的信息,从而能够允许移动/平移装置控制第一和第二喷嘴210、220的移动。第一和第二喷嘴210、220可基本沿着由X-轴和Y-轴定义的二维平面移动,并且如果需要,第一和第二喷嘴210、220可绕θ-轴旋转。
第一和第二喷嘴210、220还可沿着Z-轴方向向上或向下移动。从第一和第二喷嘴210、220喷射出的粘合剂或热释放涂料被喷射时可同时以扇形扩散。可利用用于识别膜10的位置的图像传感器(例如CCD相机)来提高位置精度。
根据实施例,TCP/COF制造设备可以是自动化的。利用在TCP/COF工艺线的中途插入的喷射粘合剂和热释放涂料的装置,可简单地解决驱动器IC的热释放问题。可使用喷射装置通过丝网法(screen method)、喷墨方法等以预期厚度、宽度和形状在需要位置检测的位置处执行涂覆。此外,使用喷嘴使得能够执行精细喷射,因此一次能涂覆较广的区域。由于以在选定高度喷射热释放涂料而不直接接触PCB基板的表面、膜、半导体器件等的方式执行涂覆,因而降低了生成失败(fail generation)的风险并且产品损害为最小。此外,能针对具有不规则表面的产品均匀执行涂覆。
根据实施例,由于能够管理热释放涂料等的温度的热电装置系统能在恒压泵中实施,并且加热装置内建于喷嘴中,因此能将热释放涂料控制在预期温度,从而高效地管理热释放涂料的粘性。而且,由于涂覆了热释放涂料,能最大化三个热释放效果:辐射、传导和对流,以显示优于普通热释放片的热释放效果。
通过根据实施例的热释放半导体封装及其制造方法、以及包括该半导体封装的显示装置,由于甚至能将热释放手段应用到普通热释放片或卷带不能附着的地方,因此能增强热释放效果。而且,由于简化了制造工艺,能降低制造成本。因为能调整喷射量、喷射时间等,所以可以任意调整热释放层的厚度,从而除去了不必要的材料浪费。因为喷嘴喷射装置能被包含在一般封装设备中以构建整体设施,因此由于增加喷射装置导致的成本增加并不是很大。
实例图3A示出根据实施例的热释放半导体封装300的横截面图。实例图3A所示的实施例可利用那些前面描述和示出的技术特征。然而,可在膜10下方形成第二热释放层92。可通过类似形成第一热释放层90的工艺的涂覆工艺形成第二热释放层92。为了增强粘合功能,可在形成第二粘合剂层32之后形成第二热释放层92。
实例图3B示出根据实施例的热释放半导体封装400的横截面图。实例图3B示出的实施例可利用前面描述和示出的实施例的技术特征。可通过在膜10上和/或上方形成第一热释放层90来最大化热释放功能。可选择性地形成第一粘合剂层30。为了增强绝缘功能,可在第二热释放层92上和/或上方额外涂覆绝缘涂料来形成第二绝缘层72。绝缘涂料可以是具有良好辐射和放射性能的产品。为了增强绝缘功能,可在第一热释放层90上和/或上方形成第一绝缘层71。
实例图5示出根据实施例的热释放半导体封装的平面照片。
如实例图5所示,可以看到在膜10上和/或上方安装半导体器件50,并在半导体器件50上和/或上方形成第一热释放层90。
实例图6示出根据实施例的热释放半导体封装的底部照片。
如实例图6所示,可以看到在膜10下方形成第二热释放层92。
图7是根据实施例的热释放半导体封装的横截面照片。
如实例图7所示,第一热释放层90的截面照片可等同于或类似于第二热释放层92的截面图。可以看到在膜10下方形成第二热释放层92,并且在包括膜10的电极图案20上和/或上方形成半导体器件50。特别地,可以看到粘合剂和热释放涂料被混合和涂覆之后固化的热释放层的截面。
表1
参考1 1号 2号 3号 4号
RMV D RMV D RMV D RMV D RMV D
% % % % %
白 69.1 100 64.2 92.9 63.7 92.2 63.9 92.5 63.5 91.9
黑 60.7 100 56.6 93.2 55.2 90.9 55.2 90.9 54.8 90.3
白 76.5 100 70.8 92.5 70.1 91.6 69.8 91.2 69.6 91.0
1小时
老化
平均 100 92.9 91.6 91.6 91.1
(D%)
*RMV:真实测量值,D:降低率
表1显示测量根据对比实例(参考1)和实施例的热释放半导体封装的温度降低效果的数据(1号、2号、3号、4号)。表1的数据是通过将根据实施例的包含印膏型热释放层的热释放半导体封装附着到32英寸LCD TV的面板PCB上和/或上方并进行试验而得到的。作为温度降低测量装置,使用了非接触型温度计,环境温度是24±1℃,老化时间大约是1小时。半导体IC与温度降低测量装置相距大约10cm,并且保持每图案约5分钟的时间期。
在表1中,“白”表示不包括着色的实例,“黑”表示包括着色的实例。
测试结果显示,当确定具有正常标准COF真实测量数据的对比实例(参考1)中的温度降低效果是100%时,根据实施例的热释放半导体封装具有接近约20%的温度降低效果。在表1中,得到了约8.2%的温度降低效果,但实施例并不限于此。
表2
加热值 | 温度(℃) | 辐射率 | 导热率(W/mk) | 涂覆尺寸(mm) | |
参考2 | 0.25 | 147 | 无 | 无 | 无 |
5号 | 0.25 | 99 | 0.95 | 2.0 | 20x10x0.2 |
6号 | 0.25 | 103 | 0.95 | 1.2 | 25x15x0.2 |
7号 | 0.25 | 87 | 0.95 | 2.7 | 25x15x0.2 |
表2显示测量根据对比实例(参考2)和实施例的热释放半导体封装的温度降低效果的另一数据(5号、6号、7号)。
根据实施例,5号、6号和7号分别具有稍有不同组分比例的释放涂料。实施例的释放涂料具有1.0W/mk-3.0W/mk的导热率,并且释放涂料具有约0.1mm-约0.2mm的涂覆尺寸,但实施例并不限于此。当发热元件的温度约为147℃时,在实施例中,温度能有效降到约87℃。
通过根据实施例的热释放半导体封装及其制造方法,以及包括该热释放半导体封装的显示装置,因为甚至能将热释放手段应用到现有技术中的热释放片或卷带不能附着的地方,因此能增强热释放效果。而且,由于简化了制造工艺,因而能节省制造成本。因为能调整喷射量、喷射时间等,所以可以任意调整热释放层的厚度,从而除去了不必要的材料浪费。此外,因为喷嘴喷射装置能被包含在一般封装设备中以构建整体设施,因此由于增加喷射装置导致的成本增加并不是很大。而且,由于有效增加了热释放手段,因而能增强热释放效果。
本说明书中引用的任何“一个实施例”、“实施例”、“实例实施例”等指的是结合实施例描述的特定特征、结构或特性被包含在本发明的至少一个实施例中。在说明书中不同位置出现的这些词语并不必然都涉及相同的实施例。进而,当结合任意实施例描述特定特征、结构或特性时,认为其处于本领域技术人员结合其它实施例能实现这些特征、结构或特性的范围内。
尽管参照多个示意性实施例描述了实施例,应该理解,本领域技术人员能够设计许多其它修改和实施例,这都落在实施例的原理的精神和范围内。更具体地,在本公开、附图及随附的权利要求的范围内,对主体组合排列的组件部分和/或排列作出各种变动和修改是可能的。除了组件部分和/或排列的变动和修改外,可选的使用对本领域技术人员来说也将是很明显的。
Claims (15)
1.一种热释放半导体封装,包括:
膜;
电极图案,形成在所述膜上方;
半导体器件,安装在所述电极图案上方;以及
第一热释放层,形成在包括所述电极图案的所述半导体器件上方;
其中所述第一热释放层包括粘合剂和热释放材料。
2.如权利要求1所述的热释放半导体封装,其中所述第一热释放层包括不导电热释放层。
3.如权利要求1所述的热释放半导体封装,包括:
第一粘合剂层,插入形成在所述半导体器件和所述第一热释放层之间。
4.如权利要求1所述的热释放半导体封装,其中所述热释放材料包括不导电材料、导电材料、以及所述不导电材料和所述导电材料的混合物中的至少一种。
5.如权利要求4所述的热释放半导体封装,其中在所述热释放材料是所述不导电材料的情况下,所述热释放材料是有机涂层试剂、无机涂层试剂以及复合涂层材料中的至少一种。
6.如权利要求4所述的热释放半导体封装,其中在所述热释放材料是所述导电材料的情况下,所述热释放材料是金属印膏、碳纳米管即CNT以及石墨中的至少一种。
7.如权利要求1所述的热释放半导体封装,其中所述第一热释放层包括约5wt%至约15wt%的所述粘合剂,以及约80wt%至约95wt%的所述热释放材料。
8.如权利要求1所述的热释放半导体封装,其中所述第一热释放层包括添加剂。
9.如权利要求8所述的热释放半导体封装,其中所述第一热释放层包括约5wt%至约15wt%的所述粘合剂,约80wt%至约90wt%的所述热释放材料,以及约5wt%至约15wt%的所述添加剂。
10.一种热释放半导体封装,包括:
膜;
电极图案,形成在所述膜上方;
半导体器件,安装在所述电极图案上方;
第一热释放层,形成在包括所述电极图案的所述半导体器件上方;以及
第二热释放层,形成在所述膜下;
其中所述第二热释放层包括粘合剂和热释放材料。
11.如权利要求10所述的热释放半导体封装,其中所述第一热释放层包括粘合剂和热释放材料。
12.如权利要求11所述的热释放半导体封装,其中所述热释放材料包括不导电材料或导电材料。
13.如权利要求10所述的热释放半导体封装,其中所述第一热释放层包括约5wt%至约20wt%的所述粘合剂,以及约80wt%至约95wt%的所述热释放材料。
14.如权利要求10所述的热释放半导体封装,其中所述第一热释放层包括添加剂。
15.如权利要求14所述的热释放半导体封装,其中所述第一热释放层包括约5wt%至约15wt%的所述粘合剂,约80wt%至约90wt%的所述热释放材料,以及约5wt%至约15wt%的所述添加剂。
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US20200235040A1 (en) | 2019-01-23 | 2020-07-23 | Qorvo Us, Inc. | Rf devices with enhanced performance and methods of forming the same |
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US20200235066A1 (en) | 2019-01-23 | 2020-07-23 | Qorvo Us, Inc. | Rf devices with enhanced performance and methods of forming the same |
KR20210129656A (ko) | 2019-01-23 | 2021-10-28 | 코르보 유에스, 인크. | Rf 반도체 디바이스 및 이를 형성하는 방법 |
US11224132B2 (en) * | 2019-09-06 | 2022-01-11 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
US11646289B2 (en) | 2019-12-02 | 2023-05-09 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
US11923238B2 (en) | 2019-12-12 | 2024-03-05 | Qorvo Us, Inc. | Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive |
KR20210112432A (ko) * | 2020-03-04 | 2021-09-15 | 삼성디스플레이 주식회사 | 표시 장치 |
KR20210132371A (ko) * | 2020-04-27 | 2021-11-04 | 주식회사 엘엑스세미콘 | 방습 칩 온 필름 패키지 및 그의 제조 방법 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5315480A (en) * | 1991-11-14 | 1994-05-24 | Digital Equipment Corporation | Conformal heat sink for electronic module |
CN1737072A (zh) * | 2004-08-18 | 2006-02-22 | 播磨化成株式会社 | 导电粘合剂及使用该导电粘合剂制造物件的方法 |
KR100802393B1 (ko) * | 2007-02-15 | 2008-02-13 | 삼성전기주식회사 | 패키지 기판 및 그 제조방법 |
CN101404267A (zh) * | 2007-10-03 | 2009-04-08 | 松下电器产业株式会社 | 半导体装置与半导体装置的制造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100806061B1 (ko) | 2002-04-11 | 2008-02-21 | 페어차일드코리아반도체 주식회사 | 칩 손상이 방지되고 열 저항 특성이 개선이 개선된 전력용반도체 모듈 |
US7205718B2 (en) * | 2004-06-24 | 2007-04-17 | Eastman Kodak Company | OLED display having thermally conductive adhesive |
KR20060126070A (ko) * | 2005-06-03 | 2006-12-07 | 삼성전자주식회사 | 구동 집적 회로칩 패키지 및 이를 구비한 표시 장치 |
KR100771890B1 (ko) | 2006-07-20 | 2007-11-01 | 삼성전자주식회사 | 씨오에프(cof)형 반도체 패키지 |
US8575746B2 (en) * | 2006-07-20 | 2013-11-05 | Samsung Electronics Co., Ltd. | Chip on flexible printed circuit type semiconductor package |
KR20080088140A (ko) | 2007-03-29 | 2008-10-02 | 서울반도체 주식회사 | 방열 기판과 이를 포함하는 발광소자 |
US7915727B2 (en) * | 2007-07-20 | 2011-03-29 | Samsung Electronics Co., Ltd. | Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same |
US20090091021A1 (en) * | 2007-10-03 | 2009-04-09 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method of manufacturing the same |
-
2010
- 2010-06-10 US US12/813,229 patent/US8508056B2/en active Active
- 2010-06-14 DE DE102010023695A patent/DE102010023695A1/de not_active Withdrawn
- 2010-06-17 CN CN2010102074459A patent/CN101924082A/zh active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5315480A (en) * | 1991-11-14 | 1994-05-24 | Digital Equipment Corporation | Conformal heat sink for electronic module |
CN1737072A (zh) * | 2004-08-18 | 2006-02-22 | 播磨化成株式会社 | 导电粘合剂及使用该导电粘合剂制造物件的方法 |
KR100802393B1 (ko) * | 2007-02-15 | 2008-02-13 | 삼성전기주식회사 | 패키지 기판 및 그 제조방법 |
CN101404267A (zh) * | 2007-10-03 | 2009-04-08 | 松下电器产业株式会社 | 半导体装置与半导体装置的制造方法 |
Cited By (14)
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CN102760704B (zh) * | 2011-04-28 | 2016-05-18 | 美格纳半导体有限公司 | 薄膜覆晶型半导体封装 |
CN102760704A (zh) * | 2011-04-28 | 2012-10-31 | 美格纳半导体有限公司 | 薄膜覆晶型半导体封装 |
CN104823276A (zh) * | 2013-11-21 | 2015-08-05 | 东部Hitek株式会社 | 覆晶薄膜型半导体封装及其制造方法 |
CN111584369A (zh) * | 2014-06-24 | 2020-08-25 | 美格纳半导体有限公司 | 散热半导体芯片封装件及其制造方法 |
TWI671862B (zh) * | 2017-03-07 | 2019-09-11 | 聯詠科技股份有限公司 | 薄膜覆晶封裝 |
US10079194B1 (en) | 2017-03-07 | 2018-09-18 | Novatek Microelectronics Corp. | Chip on film package |
US10236234B2 (en) | 2017-03-07 | 2019-03-19 | Novatek Microelectronics Corp. | Chip on film package |
CN109844943A (zh) * | 2017-08-21 | 2019-06-04 | 金学模 | 改善散热及电磁波屏蔽功能的层压石墨的膜上芯片型半导体封装 |
CN109844944A (zh) * | 2017-08-21 | 2019-06-04 | 金学模 | 改善视觉外观性及加工性的层压石墨的膜上芯片型半导体封装 |
CN109844943B (zh) * | 2017-08-21 | 2024-01-30 | 金学模 | 改善散热及电磁波屏蔽功能的层压石墨的膜上芯片型半导体封装 |
CN109844944B (zh) * | 2017-08-21 | 2024-02-02 | 金学模 | 改善视觉外观性及加工性的层压石墨的膜上芯片型半导体封装 |
CN112185949A (zh) * | 2020-12-03 | 2021-01-05 | 浙江清华柔性电子技术研究院 | Mini/Micro LED的显示面板及其制作方法、显示装置 |
CN112185949B (zh) * | 2020-12-03 | 2021-08-10 | 浙江清华柔性电子技术研究院 | Mini/Micro LED的显示面板及其制作方法、显示装置 |
CN114695585A (zh) * | 2022-03-18 | 2022-07-01 | 苏州零碳绿建新能源科技有限公司 | 一种光伏瓦组件及其制备方法 |
Also Published As
Publication number | Publication date |
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DE102010023695A1 (de) | 2011-01-27 |
US20100314637A1 (en) | 2010-12-16 |
US8508056B2 (en) | 2013-08-13 |
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