CN101393920B - 半导体装置以及其制造方法 - Google Patents

半导体装置以及其制造方法 Download PDF

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Publication number
CN101393920B
CN101393920B CN200810213176XA CN200810213176A CN101393920B CN 101393920 B CN101393920 B CN 101393920B CN 200810213176X A CN200810213176X A CN 200810213176XA CN 200810213176 A CN200810213176 A CN 200810213176A CN 101393920 B CN101393920 B CN 101393920B
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China
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single crystal
substrate
crystal semiconductor
layer
semiconductor
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Expired - Fee Related
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CN200810213176XA
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Chinese (zh)
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CN101393920A (zh
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山崎舜平
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

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  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
CN200810213176XA 2007-09-21 2008-09-18 半导体装置以及其制造方法 Expired - Fee Related CN101393920B (zh)

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JP2007245822 2007-09-21
JP2007245822 2007-09-21
JP2007-245822 2007-09-21

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CN101393920A CN101393920A (zh) 2009-03-25
CN101393920B true CN101393920B (zh) 2012-10-10

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US (2) US8110479B2 (enExample)
JP (1) JP5457002B2 (enExample)
CN (1) CN101393920B (enExample)
TW (1) TWI437696B (enExample)

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JP5250228B2 (ja) * 2007-09-21 2013-07-31 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2009094488A (ja) * 2007-09-21 2009-04-30 Semiconductor Energy Lab Co Ltd 半導体膜付き基板の作製方法
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TWI493609B (zh) * 2007-10-23 2015-07-21 Semiconductor Energy Lab 半導體基板、顯示面板及顯示裝置的製造方法
JP5548395B2 (ja) * 2008-06-25 2014-07-16 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
JP5525314B2 (ja) * 2009-05-02 2014-06-18 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5619474B2 (ja) * 2009-05-26 2014-11-05 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
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JP5203348B2 (ja) * 2009-12-25 2013-06-05 株式会社日本製鋼所 半導体基板の製造方法および半導体基板製造装置
KR102088281B1 (ko) * 2010-01-22 2020-03-13 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
JP5632616B2 (ja) * 2010-01-26 2014-11-26 ラピスセミコンダクタ株式会社 半導体装置の製造方法及び基板収容構造
JP5917036B2 (ja) 2010-08-05 2016-05-11 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
WO2012060430A1 (ja) 2010-11-05 2012-05-10 シャープ株式会社 半導体基板、半導体基板の製造方法、薄膜トランジスタ、半導体回路、液晶表示装置、エレクトロルミネセンス装置、無線通信装置、及び発光装置
WO2013002227A1 (ja) 2011-06-30 2013-01-03 シャープ株式会社 半導体基板の製造方法、半導体基板作成用基板、積層基板、半導体基板、及び電子デバイス
US9041147B2 (en) * 2012-01-10 2015-05-26 Sharp Kabushiki Kaisha Semiconductor substrate, thin film transistor, semiconductor circuit, liquid crystal display apparatus, electroluminescent apparatus, semiconductor substrate manufacturing method, and semiconductor substrate manufacturing apparatus
JP6245791B2 (ja) * 2012-03-27 2017-12-13 日亜化学工業株式会社 縦型窒化物半導体素子およびその製造方法
CN108593186B (zh) * 2018-06-20 2023-05-26 南京信息工程大学 一种基于双巨压阻传感器的井下压力探测装置及测量方法
CN113798679B (zh) * 2021-10-27 2024-01-05 佛山市南海区广工大数控装备协同创新研究院 一种基于激光微织构的非晶合金功能化表面制备方法
CN114551494B (zh) * 2022-02-28 2025-02-11 华引芯（武汉）科技有限公司 微型光电子器件及其制备方法
CN118380332B (zh) * 2024-06-21 2024-09-06 日月新半导体(威海)有限公司 一种集成电路封装体及其制备方法

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US20090079024A1 (en) 2009-03-26
US8633590B2 (en) 2014-01-21
TW200935593A (en) 2009-08-16
JP5457002B2 (ja) 2014-04-02
JP2009094496A (ja) 2009-04-30
CN101393920A (zh) 2009-03-25
US20120104568A1 (en) 2012-05-03
TWI437696B (zh) 2014-05-11
US8110479B2 (en) 2012-02-07

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