CN101162737A - 薄膜晶体管 - Google Patents

薄膜晶体管 Download PDF

Info

Publication number
CN101162737A
CN101162737A CNA2007101802033A CN200710180203A CN101162737A CN 101162737 A CN101162737 A CN 101162737A CN A2007101802033 A CNA2007101802033 A CN A2007101802033A CN 200710180203 A CN200710180203 A CN 200710180203A CN 101162737 A CN101162737 A CN 101162737A
Authority
CN
China
Prior art keywords
film transistor
semiconductor layer
thin film
dielectric layer
zinc oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2007101802033A
Other languages
English (en)
Other versions
CN101162737B (zh
Inventor
Y·李
B·S·翁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xerox Corp
Original Assignee
Xerox Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xerox Corp filed Critical Xerox Corp
Publication of CN101162737A publication Critical patent/CN101162737A/zh
Application granted granted Critical
Publication of CN101162737B publication Critical patent/CN101162737B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669Nanowires or nanotubes
    • H01L29/0673Nanowires or nanotubes oriented parallel to a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Nanotechnology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Materials Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)

Abstract

本发明公开了一种薄膜晶体管,其包括基材、介电层和半导体层。半导体层为c轴垂直于介电层或基材平面优选取向的结晶氧化锌,其通过液体沉积氧化锌纳米盘组合物制备。该薄膜晶体管具有良好的迁移率和通/断比。

Description

薄膜晶体管
技术领域
[0001]本公开内容涉及一种薄膜晶体管。具体地,该薄膜晶体管包括基材和取向的氧化锌半导体层。
背景技术
[0002]氧化锌(ZnO)被称为薄膜晶体管(“TFTs”)中的通路半导体。其在环境温度下是易得的且可以加工。其还具有很高的电子迁移率(本体迁移率高达155cm2/V·s并且场效应迁移率为70cm2/V·s),是环境稳定的,具有大的带隙,无毒且廉价。
[0003]但是,制造半导体的方法将影响ZnO半导体层的迁移率。具有高迁移率(5-20cm2/V·s)的ZnO半导体通常仅通过射频磁控溅射制造。这种设备昂贵并且导致高成本。在另一种方法中,使用ZnO前体,然后加工形成ZnO半导体层。但是,该方法需要在400-550℃的退火步骤。这种温度不适合于在较低温度变形的基材,类似聚合物基材,例如聚酯、聚碳酸酯、聚酰亚胺薄膜或片材。ZnO半导体也在低(环境)温度下,使用溶液中的ZnO纳米颗粒或纳米棒加以制备。但是,这种半导体具有低迁移率(~0.6cm2/V·s)。
[0004]氧化锌薄膜晶体通常具有纤锌矿结构(六边形对称),晶格参数a=3.2960和c=5.2065。氧化锌的取向可以使用例如X射线衍射(XRD)技术进行分析。对于随机取向的氧化锌晶体,分别对于(100)、(002)和(101)平面,通过使用Cu Kα辐射(λ1.5418)可以观察到d间距为d=2.81、2.60、2.48的三个峰。随机取向的氧化锌粉末试样中这些峰的强度比分别为约I(100)/I(002)/I(101)=57/44/100(由The International Centre forDiffraction Data提供的ICDD/JCPDS卡号36-1451得到的强度)。对于随机取向的氧化锌晶体,(002)峰的强度相对于(100)、(002)和(101)峰的强度之和I(100)+I(002)+I(101)的百分比,I(002)/[I(100)+I(002)+I(101)]×100%为约22%±2%。
[0005]TFTs通常由基材上的导电性栅极、源极和漏极、电绝缘栅介电层和半导电层组成,所述电绝缘栅介电层将栅极与源极和漏极分隔,并且半导电层与栅介电层接触并接通源极和漏极。
发明内容
[0006]在各个实施方案中,本公开内容涉及一种薄膜晶体管,包括基材、介电层和半导体层,其中半导体层包括以纳米盘的c轴垂直于介电层或基材的方式取向的氧化锌纳米盘。
[0007]在其它实施方案中,介电层或基材具有包括或者已被改性以包括至少一种极化官能团的表面。极化官能团进一步与纳米盘互相作用,帮助它们自组装进适当取向的氧化锌半导体层中。
[0008]在另外的实施方案中,基材可以具有低于300℃的变形温度。基材可以为聚合物基材,例如聚酯、聚碳酸酯、聚酰亚胺薄膜或片材。
[0009]在更进一步的实施方案中,本公开内容的TFT的半导体具有至少1cm2/V·s的迁移率。在更特殊的实施方案中,TFT具有至少5cm2/V·s的迁移率。
[0010]还公开了制备这种TFTs的方法。
[0011]本公开内容的这些和其它非限制性特征在以下更具体地公开。
附图说明
[0012]图1为本公开内容的TFT第一种示例性实施方案。
[0013]图2为本公开内容的TFT的第二种示例性实施方案。
[0014]图3为本公开内容的TFT的第三种示例性实施方案。
[0015]图4为本公开内容的TFT的第四种示例性实施方案。
具体实施方式
[0016]在此公开如下实施方案。
[0017]方案1.一种薄膜晶体管,包括:
基材;
栅极、源极和漏极;
介电层;和
半导体层;
其中半导体层包括以纳米盘的c轴垂直于介电层或基材的方式取向的氧化锌纳米盘。
[0018]方案2.方案1的薄膜晶体管,其中半导体层沉积在基材表面之上,并且基材在表面上具有至少一种极化官能团。
[0019]方案3.方案2的薄膜晶体管,其中极化的官能团选自-OH、-NH2、-COOH、-SO3H和-P(=O)(OH)2
[0020]方案4.方案1的薄膜晶体管,其中半导体层沉积在介电层表面之上,并且介电层在表面上具有至少一种极化官能团。
[0021]方案5.方案4的薄膜晶体管,其中极化的官能团选自-OH、-NH2、-COOH、-SO3H和-P(=O)(OH)2
[0022]方案6.方案1的薄膜晶体管,其中介电层包括选自氧化铝-钛、氧化铝、氧化硅、氮化硅、钛酸钡、钛酸钡锆、聚酯、聚碳酸酯、聚(乙烯基苯酚)、聚酰亚胺、聚苯乙烯、聚(甲基丙烯酸酯)、聚(丙烯酸酯)和环氧树脂的材料。
[0023]方案7.方案1的薄膜晶体管,其中半导体层具有至少1cm2/V·s的场效应迁移率。
[0024]方案8.方案1的薄膜晶体管,其中半导体层具有大于约103的电流通/断比。
[0025]方案9.方案1的薄膜晶体管,其中半导体层具有约10纳米到约1微米的厚度。
[0026]方案10.方案1的薄膜晶体管,其中基材为包括聚酯、聚碳酸酯或聚酰亚胺的聚合物薄膜或片材。
[0027]方案11.方案1的薄膜晶体管,其中基材具有约10微米到约10毫米的厚度。
[0028]方案12.方案1的薄膜晶体管,其中半导体层进一步包括金属纳米颗粒或金属氧化物纳米颗粒。
[0029]方案13.方案1的薄膜晶体管,其中半导体层通过液相沉积包括氧化锌纳米盘的组合物进行沉积。
[0030]方案14.方案13的薄膜晶体管,其中液相沉积法选自旋涂、刮涂、棒涂、浸涂、丝网印刷、微接触印刷、墨喷印刷和印模。
[0031]方案15.方案13的薄膜晶体管,其中所述组合物进一步包括有机胺络合剂。
[0032]方案16.一种薄膜晶体管,包括:
聚合物基材;
栅极、源极和漏极;
介电层;和
半导体层,其中半导体层包括以纳米盘的c轴垂直于基材的方式取向的氧化锌纳米盘。
[0033]方案17.一种薄膜晶体管,包括:
聚合物基材;
栅极、源极和漏极;
介电层;和
半导体层,其中半导体层包括以纳米盘的c轴垂直于介电层的方式取向的氧化锌纳米盘。
[0034]虽然为了清楚在以下说明中使用特定术语,但是这些术语是用来仅仅表示按照附图中的说明选择的实施方案的特殊结构,并不拟限定或限制公开内容的范围。在以下附图和随后的说明中,应理解相同的数值标记表示相同作用的组件。
[0035]图1中,示意性说明TFT构造10,其由基材16、与其接触的金属接触件18(栅极)和在其上沉积有两个金属接触件源极20和漏极22的栅介电层14组成。金属接触件20和22之上和之间为在此说明的氧化锌半导体层12。
[0036]图2示意性说明由基材36、栅极38、源极40和漏极42、栅介电层34和氧化锌半导体层32组成的另一个TFT构造30。
[0037]图3示意性说明另一个TFT构造50,其由基材(未示出)/氧化铟锡(ITO)/氧化铝-钛(ATO)和其上沉积源极60和漏极62的氧化锌半导体层52组成,其中ITO 56为栅极,ATO 54为介电层。
[0038]图4示意性说明由基材76、栅极78、源极80、漏极82、氧化锌半导体层72和栅介电层74组成的另一个TFT构造70。
[0039]本公开内容的TFT具有半导体层,该半导体层包括以纳米盘的c轴垂直于介电层或基材平面的方式取向的氧化锌纳米盘。半导体层中的结晶氧化锌优选以c轴垂直于基材平面的方式取向。在实施方案中,这种优选取向表示半导体层中的结晶氧化锌具有大于约40%,大于约60%,大于约80%(或约40%到约100%,约60%到约100%,约80%到约100%)的(002)峰的X射线衍射强度相对(100)、(002)和(101)峰的强度总和的百分比,I(002)/[I(100)+I(002)+I(101)]×100%。当纳米盘以这种方式取向时,现已发现电子传输最有利。
[0040]术语“纳米盘”在此表示具有三维构造的纳米尺度的物件,具有沿着c轴的高度和沿着(002)平面的底部(base);该底部可以为圆形(或接近圆形)、多边形或不规则形状;盘的高度等于或小于底部的直径。在此也包括氧化锌纳米板作为纳米盘。每个氧化锌纳米盘可以为氧化锌单晶或者可以含有许多氧化锌晶体(多晶);在后者情况下,纳米盘中的氧化锌晶体将具有其c轴垂直于纳米盘底部的最佳取向。纳米盘和纳米棒可以由其结构区分;在纳米棒中,纳米棒的高度大于底部的直径。
[0041]其上沉积半导体层的介电层或基材可以含有或被表面改性以含有表面极化官能团,例如-OH、-NH2、-COOH、-SO3H、-P(=O)(OH)2等。现已发现最极化且具有最高表面能的ZnO纳米盘的(002)平面将与表面极化官能团强烈互相作用,使得纳米盘优选以其c轴垂直于介电层或基材的方式取向。
[0042]本公开内容的TFT的半导体具有至少1cm2/V·s的迁移率。这一点超过了使用其它液相沉积技术制造的大多数TFTs的迁移率。
[0043]本公开内容的氧化锌半导体层使用液相沉积技术制备。该技术包括在TFT的介电层、基材或其它组件之上沉积包括氧化锌纳米盘的组合物,任选在低于基材变形温度的温度下加热,并且任选冷却。也可以重复这些步骤,形成由几个较小子层组成的较厚半导体层。
[0044]络合剂任选用于氧化锌纳米盘组合物中,其具有增加氧化锌纳米盘在液体中的溶解度或分散能力,增加氧化锌纳米盘组合物粘度以改进薄膜均匀性,和促进在薄膜中形成c轴垂直于所得半导体层的优选取向的氧化锌纳米盘的可能优点。络合剂可以为例如羧酸和有机胺。在实施方案中,络合剂为有机胺,例如选自乙醇胺、氨基丙醇、二乙醇胺、2-甲基氨基乙醇、N,N-二甲基氨基乙醇、甲氧基乙胺、甲氧基丙胺、二氨基乙烷、二氨基丙烷、二氨基丁烷、二氨基环己烷等及其混合物。
[0045]包括例如有机溶剂和水的任何合适的液体可用于分散或溶解氧化锌纳米盘以形成氧化锌纳米盘组合物。合适的有机溶剂包括烃溶剂,例如戊烷、己烷、环己烷、庚烷、辛烷、壬烷、癸烷、十一烷、十二烷、十三烷、十四烷、甲苯、二甲苯、均三甲苯等;醇类,例如甲醇、乙醇、丙醇、丁醇、戊醇、己醇、庚醇、乙二醇、甲氧基乙醇、乙氧基乙醇、甲氧基丙醇、乙氧基丙醇、甲氧基丁醇、二甲氧基乙二醇等;酮,例如丙酮、丁酮、戊酮、环己酮等,四氢呋喃、氯苯、二氯苯、三氯苯、硝基苯、苯甲腈、乙腈、N,N-二甲基甲酰胺及其混合物。
[0046]氧化锌纳米盘组合物的浓度为全部氧化锌纳米盘组合物的例如约1wt%到约80wt%,约2wt%到约50wt%,以及特别是约5wt%到约30wt%。任选的络合剂与氧化锌纳米盘的摩尔比为例如约0.1到约10,约0.2到约5,以及特别是约0.5到约2。
[0047]在实施方案中,其它组分可以引入到包括氧化锌纳米盘的组合物中。这种组分包括例如聚合物,例如聚苯乙烯、聚(甲基丙烯酸甲酯)、聚(乙烯基吡咯烷酮)等,例如金、银等的金属纳米颗粒,例如二氧化硅、三氧化二镓、氧化锆、氧化铝、氧化锡、氧化铟锡(ITO)等的金属氧化物纳米颗粒,及其混合物。
[0048]液体沉积氧化锌纳米盘组合物可以由任何液体沉积技术实现,例如旋涂、刮涂、棒涂、浸涂、丝网印刷、微接触印刷、墨喷印刷、印模等。
[0049]在实施方案中,任选使用的加热步骤表示在约50℃到约300℃的一个或几个温度下进行热处理。加热可以例如以使用预热的加热设备在某一温度下瞬间加热的方式完成。在实施方案中,加热可以以逐步加热的方式完成,加热设备可以达到的加热速率为例如从室温(约25℃)或者约25℃到约100℃的温度开始每分钟约0.5到约100℃。在另外的实施方案中,加热也可以以步进方式在几个温度下,例如约100℃,然后约200℃,然后约300℃完成。在实施方案中,加热也可以在几个温度下以结合逐步加热的步进方式完成。加热也可以例如在较高温度下,然后在较低温度下完成,例如首先在约300℃,然后在约200℃。
[0050]在实施方案中,任选使用的“冷却”表示使沉积的组合物的温度达到低于约100℃的温度,特别是室温附近(也即约25℃)。冷却可以例如通过关闭加热设备以自冷方式完成,或者可以以例如约0.1℃/min到约100℃/min的一定冷却速率以受控方式完成。在实施方案中,可以使用例如约0.1℃/min到约10℃/min的冷却速率,特别是从高于约300℃的温度缓慢冷却,以降低半导体层和基材中的机械应变。
[0051]实施方案中使用的氧化锌纳米盘的尺寸可以具有约1nm到约1000nm的底部直径。在特殊实施方案中,底部直径为约1nm到约500nm。在其它实施方案中,底部直径为约2nm到约100nm。氧化锌纳米盘可以具有约0.5nm到约1000nm的高度。在特殊实施方案中,高度为约0.5nm到约500nm。在其它实施方案中,高度为约1nm到约100nm。制备氧化锌纳米盘的说明性实例可见于若干文献中。M.Monge,M.L.Kahn,A.Maisonnat和B.Chaudret的“Room-TemperatureOrganometallic Synthesis of Soluble and Crystalline ZnO Nanoparticles ofControlled Size and Shape”,Angew.Chem.,115卷,5479-5482页(2003年)描述了一种方法,在室温下使用四氢呋喃中的二环己基锌和有机胺合成直径为3-5nm的氧化锌纳米盘。Y.Peng,A.Xu,B.Deng,M.Antonietti和H.Colfen的“Polymer-Controlled Crystallization of Zinc OxideHexagonal Nanorings and Disks”,J.Phys.Chem.B,110卷,2988-2993页(2006年)公开了一种方法,通过加热含有羧基改性聚丙烯酰胺的水性Zn(NO3)2溶液制备直径为400nm到1000nm的氧化锌纳米盘。
[0052]本公开内容的氧化锌半导体层可以在例如大面积显示器、射频识别(RFID)标签等电子器件中使用,所述电子器件使用具有例如大于1cm2/V·s的高场效应迁移率的薄膜晶体管。
[0053]氧化锌半导体层具有例如约10纳米到约1微米,特别是约20纳米到约200纳米的厚度。TFT设备含有宽度W和长度L的半导体通道。半导体通道宽度可以为例如约0.1微米到约5毫米,以及特定的通道宽度为约5微米到约1毫米。半导体通道长度可以为例如约0.1微米到约1毫米,以及更特殊的通道长度为约5微米到约100微米。
[0054]基材可以由例如硅、玻璃、铝或塑料的任何合适材料组成。基材的厚度可以为约10微米到超过10毫米,对于例如玻璃板或硅晶片的硬质基材,代表性厚度为约1毫米到约10毫米。
[0055]栅极可以为薄金属膜、导电聚合物薄膜、由导电油墨或糊或基材本身,例如重掺杂的硅制造的导电薄膜。栅极材料的实例包括但不局限于铝、镍、金、银、铜、锌、铟、氧化锌镓、氧化铟锡、氧化铟锑,导电聚合物,例如聚苯乙烯磺酸酯掺杂的聚(3,4-亚乙基二氧基噻吩)(PSS-PEDOT),由聚合物基料中的炭黑/石墨或胶态银分散体组成的导电油墨/糊,例如购自Acheson Colloids Company的ELECTRODAGTM。栅极可以通过真空蒸发,金属或导电性金属氧化物溅射,由旋涂、流延或印刷从导电聚合物溶液或导电油墨涂布制备。栅极的厚度例如对于金属膜而言为约10到约200纳米,对于聚合物导体而言为约1到约10微米。适合用作源极和漏极的典型材料包括栅极材料,例如铝、锌、铟,导电性金属氧化物,例如氧化锌镓、氧化铟锡、氧化铟锑,导电聚合物和导电油墨。源极和漏极的典型厚度为例如约40纳米到约1微米,更特殊的厚度为约100到约400纳米。
[0056]栅介电层通常可以为无机材料薄膜或有机聚合物薄膜。适合作为栅介电层的无机材料的说明性实例包括氧化铝-钛、氧化铝、二氧化硅、氮化硅、钛酸钡、钛酸钡锆等;用于栅介电层的有机聚合物的说明性实例包括聚酯、聚碳酸酯、聚(乙烯基苯酚)、聚酰亚胺、聚苯乙烯、聚(甲基丙烯酸酯)、聚(丙烯酸酯)、环氧树脂等。栅介电层的厚度例如为约10纳米到约2000纳米,取决于使用的介电材料的介电常数。栅介电层的代表性厚度为约100纳米到约500纳米。栅介电层可以具有例如小于约10-12S/cm的电导率。
[0057]在实施方案中,栅介电层、栅极、半导体层、源极和漏极以任何顺序形成,栅极和半导体层均接触栅介电层,并且源极和漏极均接触半导体层。短语“以任何顺序”包括顺序形成和同时形成。例如,源极和漏极可以同时形成或顺序形成。
[0058]当向栅极施加通常为约-20伏到约+80伏的电压时,对于n-通道TFT,源极接地并且向漏极施加通常例如为约0伏到约80伏的偏压,以收集迁移通过半导体通道的载荷子。
[0059]在实施方案中,TFT器件中的氧化锌半导体层通常显示大于例如约1cm2/V·s(平方厘米每伏每秒)的场效应迁移率,和大于例如约103的通/断比。通/断比表示晶体管接通时的源-漏电流与晶体管断开时的源-漏电流的比。

Claims (3)

1.一种薄膜晶体管,包括:
基材;
栅极、源极和漏极;
介电层;和
半导体层;
其中半导体层包括以纳米盘的c轴垂直于介电层或基材的方式取向的氧化锌纳米盘。
2.一种薄膜晶体管,包括:
聚合物基材;
栅极、源极和漏极;
介电层;和
半导体层,其中半导体层包括以纳米盘的c轴垂直于基材的方式取向的氧化锌纳米盘。
3.一种薄膜晶体管,包括:
聚合物基材;
栅极、源极和漏极;
介电层;和
半导体层,其中半导体层包括以纳米盘的c轴垂直于介电层的方式取向的氧化锌纳米盘。
CN2007101802033A 2006-10-12 2007-10-11 薄膜晶体管 Expired - Fee Related CN101162737B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/546,857 US7511343B2 (en) 2006-10-12 2006-10-12 Thin film transistor
US11/546857 2006-10-12

Publications (2)

Publication Number Publication Date
CN101162737A true CN101162737A (zh) 2008-04-16
CN101162737B CN101162737B (zh) 2012-06-27

Family

ID=38941863

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007101802033A Expired - Fee Related CN101162737B (zh) 2006-10-12 2007-10-11 薄膜晶体管

Country Status (7)

Country Link
US (2) US7511343B2 (zh)
EP (1) EP1921681B1 (zh)
JP (1) JP5410013B2 (zh)
KR (1) KR101452200B1 (zh)
CN (1) CN101162737B (zh)
CA (1) CA2605827C (zh)
TW (1) TWI442571B (zh)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101388342B (zh) * 2008-10-30 2010-08-11 上海大学 全溶液加工法制备无机薄膜三极管的方法
CN102687400A (zh) * 2009-10-30 2012-09-19 株式会社半导体能源研究所 逻辑电路和半导体装置
CN102694006A (zh) * 2011-03-25 2012-09-26 株式会社半导体能源研究所 半导体装置及制造半导体装置的方法
CN102738206A (zh) * 2011-04-13 2012-10-17 株式会社半导体能源研究所 氧化物半导体膜及半导体装置
CN105206514A (zh) * 2009-11-28 2015-12-30 株式会社半导体能源研究所 层叠的氧化物材料、半导体器件、以及用于制造该半导体器件的方法
CN105679766A (zh) * 2009-09-16 2016-06-15 株式会社半导体能源研究所 晶体管及显示设备
CN107004717A (zh) * 2014-11-21 2017-08-01 株式会社半导体能源研究所 半导体装置及存储装置
US9761588B2 (en) 2011-01-26 2017-09-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a wide-gap semiconductor layer in an insulating trench
CN107947763A (zh) * 2010-08-06 2018-04-20 株式会社半导体能源研究所 半导体集成电路
JP2019054287A (ja) * 2010-12-17 2019-04-04 株式会社半導体エネルギー研究所 トランジスタの作製方法
TWI692109B (zh) * 2010-12-03 2020-04-21 日商半導體能源研究所股份有限公司 氧化物半導體膜及半導體裝置
CN113013250A (zh) * 2021-02-24 2021-06-22 北京大学 一种场效应晶体管及其制备方法

Families Citing this family (86)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7511343B2 (en) * 2006-10-12 2009-03-31 Xerox Corporation Thin film transistor
KR100768632B1 (ko) * 2006-10-30 2007-10-18 삼성전자주식회사 나노입자의 분산방법 및 이를 이용한 나노입자 박막의제조방법
KR100982395B1 (ko) * 2007-04-25 2010-09-14 주식회사 엘지화학 박막 트랜지스터 및 이의 제조방법
US20080303037A1 (en) * 2007-06-04 2008-12-11 Irving Lyn M Methods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby
JP5264197B2 (ja) * 2008-01-23 2013-08-14 キヤノン株式会社 薄膜トランジスタ
GB0803702D0 (en) 2008-02-28 2008-04-09 Isis Innovation Transparent conducting oxides
JP2009302352A (ja) * 2008-06-13 2009-12-24 Brother Ind Ltd 酸化物薄膜トランジスタ、及びその製造方法
JP2010010175A (ja) * 2008-06-24 2010-01-14 Konica Minolta Holdings Inc 薄膜トランジスタおよび薄膜トランジスタの製造方法
JP2010016037A (ja) * 2008-07-01 2010-01-21 Konica Minolta Holdings Inc 薄膜トランジスタの製造方法
JP4838827B2 (ja) * 2008-07-02 2011-12-14 シャープ株式会社 太陽電池モジュールおよびその製造方法
JP2010062276A (ja) * 2008-09-03 2010-03-18 Brother Ind Ltd 酸化物薄膜トランジスタ、及びその製造方法
KR20100054448A (ko) * 2008-11-14 2010-05-25 삼성전자주식회사 반도체 소자 및 그 형성 방법
KR20120039638A (ko) * 2009-06-16 2012-04-25 바스프 에스이 반도체 금속 산화물 입자 층에서 미립자간 접촉 부위를 개선하고 간극을 충전하기 위한 열 불안정성 전구체 화합물
KR101476817B1 (ko) 2009-07-03 2014-12-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 트랜지스터를 갖는 표시 장치 및 그 제작 방법
GB0915376D0 (en) 2009-09-03 2009-10-07 Isis Innovation Transparent conducting oxides
WO2011036999A1 (en) 2009-09-24 2011-03-31 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor film and semiconductor device
TWI512997B (zh) 2009-09-24 2015-12-11 Semiconductor Energy Lab 半導體裝置,電源電路,和半導體裝置的製造方法
SG178056A1 (en) 2009-10-08 2012-03-29 Semiconductor Energy Lab Oxide semiconductor layer and semiconductor device
KR101779349B1 (ko) * 2009-10-14 2017-09-18 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
WO2011049230A1 (en) 2009-10-21 2011-04-28 Semiconductor Energy Laboratory Co., Ltd. Voltage regulator circuit
TWI426566B (zh) * 2009-11-05 2014-02-11 Univ Nat Taiwan 薄膜電晶體與其製法
KR101932407B1 (ko) 2009-11-06 2018-12-27 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
WO2011058913A1 (en) * 2009-11-13 2011-05-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
KR101761097B1 (ko) 2009-11-13 2017-07-25 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
CN102598285B (zh) * 2009-11-20 2016-08-03 株式会社半导体能源研究所 用于制造半导体器件的方法
KR101396015B1 (ko) 2009-11-28 2014-05-16 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR20220149630A (ko) 2009-12-04 2022-11-08 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR20120099475A (ko) 2009-12-04 2012-09-10 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
KR101470303B1 (ko) * 2009-12-08 2014-12-09 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2011070929A1 (en) 2009-12-11 2011-06-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device
KR101770976B1 (ko) * 2009-12-11 2017-08-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2011074407A1 (en) 2009-12-18 2011-06-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
WO2011074408A1 (en) 2009-12-18 2011-06-23 Semiconductor Energy Laboratory Co., Ltd. Non-volatile latch circuit and logic circuit, and semiconductor device using the same
KR101749944B1 (ko) 2009-12-28 2017-06-22 가부시키가이샤 한도오따이 에네루기 켄큐쇼 액정 표시 장치 및 전자 기기
US8288767B2 (en) * 2010-01-04 2012-10-16 National Taiwan University Thin-film transistor and forming method thereof
KR102257147B1 (ko) * 2010-01-20 2021-05-27 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치 및 휴대 전화기
TWI525377B (zh) * 2010-01-24 2016-03-11 半導體能源研究所股份有限公司 顯示裝置
KR101815838B1 (ko) * 2010-01-24 2018-01-08 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치
KR20120120330A (ko) 2010-01-29 2012-11-01 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR20240016443A (ko) * 2010-02-05 2024-02-06 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제조 방법
US9190522B2 (en) 2010-04-02 2015-11-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having an oxide semiconductor
CN106098788B (zh) 2010-04-02 2020-10-16 株式会社半导体能源研究所 半导体装置
US9147768B2 (en) * 2010-04-02 2015-09-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having an oxide semiconductor and a metal oxide film
US9196739B2 (en) * 2010-04-02 2015-11-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including oxide semiconductor film and metal oxide film
US8854583B2 (en) * 2010-04-12 2014-10-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and liquid crystal display device
WO2011135988A1 (en) 2010-04-28 2011-11-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor display device and driving method the same
US8416622B2 (en) * 2010-05-20 2013-04-09 Semiconductor Energy Laboratory Co., Ltd. Driving method of a semiconductor device with an inverted period having a negative potential applied to a gate of an oxide semiconductor transistor
US8883555B2 (en) 2010-08-25 2014-11-11 Semiconductor Energy Laboratory Co., Ltd. Electronic device, manufacturing method of electronic device, and sputtering target
US8685787B2 (en) * 2010-08-25 2014-04-01 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
WO2012029638A1 (en) * 2010-09-03 2012-03-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US8816425B2 (en) * 2010-11-30 2014-08-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US8629496B2 (en) 2010-11-30 2014-01-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US8823092B2 (en) 2010-11-30 2014-09-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8809852B2 (en) 2010-11-30 2014-08-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor film, semiconductor element, semiconductor device, and method for manufacturing the same
TWI525818B (zh) 2010-11-30 2016-03-11 半導體能源研究所股份有限公司 半導體裝置及半導體裝置之製造方法
KR101981808B1 (ko) 2010-12-28 2019-08-28 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제조 방법
US8829512B2 (en) * 2010-12-28 2014-09-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
WO2012090799A1 (en) * 2010-12-28 2012-07-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
JP5852874B2 (ja) * 2010-12-28 2016-02-03 株式会社半導体エネルギー研究所 半導体装置
TWI535032B (zh) 2011-01-12 2016-05-21 半導體能源研究所股份有限公司 半導體裝置的製造方法
TWI570920B (zh) * 2011-01-26 2017-02-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
TWI539597B (zh) 2011-01-26 2016-06-21 半導體能源研究所股份有限公司 半導體裝置及其製造方法
US8634230B2 (en) * 2011-01-28 2014-01-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for driving the same
WO2012121265A1 (en) 2011-03-10 2012-09-13 Semiconductor Energy Laboratory Co., Ltd. Memory device and method for manufacturing the same
KR101165717B1 (ko) * 2011-04-15 2012-07-18 한국화학연구원 무기 반도체 잉크 조성물 및 이를 통해 제조되는 무기 반도체 박막
US8809854B2 (en) 2011-04-22 2014-08-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US8932913B2 (en) 2011-04-22 2015-01-13 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
US8916868B2 (en) 2011-04-22 2014-12-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
US9006803B2 (en) * 2011-04-22 2015-04-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing thereof
US8878288B2 (en) 2011-04-22 2014-11-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN105931967B (zh) 2011-04-27 2019-05-03 株式会社半导体能源研究所 半导体装置的制造方法
US8847233B2 (en) 2011-05-12 2014-09-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a trenched insulating layer coated with an oxide semiconductor film
KR101940570B1 (ko) 2011-05-13 2019-01-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 El 표시 장치 및 그 전자 기기
KR102081792B1 (ko) 2011-05-19 2020-02-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 연산회로 및 연산회로의 구동방법
JP6104522B2 (ja) * 2011-06-10 2017-03-29 株式会社半導体エネルギー研究所 半導体装置
US8901554B2 (en) * 2011-06-17 2014-12-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including channel formation region including oxide semiconductor
US8802493B2 (en) * 2011-09-13 2014-08-12 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of oxide semiconductor device
CN102543723A (zh) * 2012-01-05 2012-07-04 复旦大学 一种栅控二极管半导体器件的制造方法
US20130265010A1 (en) * 2012-04-06 2013-10-10 Semiconductor Energy Laboratory Co., Ltd. Protective circuit module and battery pack
TWI821777B (zh) 2012-09-24 2023-11-11 日商半導體能源研究所股份有限公司 半導體裝置
US9153650B2 (en) 2013-03-19 2015-10-06 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor
TWI652822B (zh) 2013-06-19 2019-03-01 日商半導體能源研究所股份有限公司 氧化物半導體膜及其形成方法
TWI608523B (zh) 2013-07-19 2017-12-11 半導體能源研究所股份有限公司 Oxide semiconductor film, method of manufacturing oxide semiconductor film, and semiconductor device
TWI677989B (zh) 2013-09-19 2019-11-21 日商半導體能源研究所股份有限公司 半導體裝置及其製造方法
KR102317297B1 (ko) 2014-02-19 2021-10-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 산화물, 반도체 장치, 모듈, 및 전자 장치
US11257959B2 (en) 2017-12-06 2022-02-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the semiconductor device

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05294623A (ja) * 1992-04-23 1993-11-09 Idemitsu Kosan Co Ltd 酸化亜鉛薄膜の製造方法
JP3398640B2 (ja) * 2000-02-09 2003-04-21 科学技術振興事業団 配向性フレーク状酸化亜鉛の製法
JP4672839B2 (ja) * 2000-09-06 2011-04-20 キヤノン株式会社 発光体、構造体及びその製造方法
JPWO2004057064A1 (ja) * 2002-12-21 2006-04-20 財団法人大阪産業振興機構 酸化物ナノ構造体及びそれらの製造方法並びに用途
JP4328850B2 (ja) * 2003-07-29 2009-09-09 奥野製薬工業株式会社 酸化亜鉛膜の皮膜構造の制御方法
TWI221341B (en) * 2003-09-18 2004-09-21 Ind Tech Res Inst Method and material for forming active layer of thin film transistor
US7062848B2 (en) * 2003-09-18 2006-06-20 Hewlett-Packard Development Company, L.P. Printable compositions having anisometric nanostructures for use in printed electronics
KR100708644B1 (ko) * 2004-02-26 2007-04-17 삼성에스디아이 주식회사 박막 트랜지스터, 이를 구비한 평판 표시장치, 박막트랜지스터의 제조방법, 평판 표시장치의 제조방법, 및도너 시트의 제조방법
JP2006005116A (ja) * 2004-06-17 2006-01-05 Casio Comput Co Ltd 膜形成方法、半導体膜、及び積層絶縁膜
US7405129B2 (en) * 2004-11-18 2008-07-29 International Business Machines Corporation Device comprising doped nano-component and method of forming the device
US7638252B2 (en) 2005-01-28 2009-12-29 Hewlett-Packard Development Company, L.P. Electrophotographic printing of electronic devices
US7341680B2 (en) 2005-03-02 2008-03-11 Hewlett-Packard Development Company, L.P. Printable composition with nanostructures of first and second types
US8089062B2 (en) 2005-03-23 2012-01-03 Xerox Corporation Wax encapsulated electronic devices
KR100643083B1 (ko) * 2005-07-20 2006-11-10 학교법인 포항공과대학교 산화아연 나노구조체 제조방법 및 이를 이용한 소자
US20070287221A1 (en) * 2006-06-12 2007-12-13 Xerox Corporation Fabrication process for crystalline zinc oxide semiconductor layer
US7511343B2 (en) * 2006-10-12 2009-03-31 Xerox Corporation Thin film transistor

Cited By (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101388342B (zh) * 2008-10-30 2010-08-11 上海大学 全溶液加工法制备无机薄膜三极管的方法
CN105679766A (zh) * 2009-09-16 2016-06-15 株式会社半导体能源研究所 晶体管及显示设备
US9935202B2 (en) 2009-09-16 2018-04-03 Semiconductor Energy Laboratory Co., Ltd. Transistor and display device comprising oxide semiconductor layer
JP2019220716A (ja) * 2009-10-30 2019-12-26 株式会社半導体エネルギー研究所 半導体装置
CN102687400B (zh) * 2009-10-30 2016-08-24 株式会社半导体能源研究所 逻辑电路和半导体装置
CN102687400A (zh) * 2009-10-30 2012-09-19 株式会社半导体能源研究所 逻辑电路和半导体装置
US9722086B2 (en) 2009-10-30 2017-08-01 Semiconductor Energy Laboratory Co., Ltd. Logic circuit and semiconductor device
CN105206514A (zh) * 2009-11-28 2015-12-30 株式会社半导体能源研究所 层叠的氧化物材料、半导体器件、以及用于制造该半导体器件的方法
US10347771B2 (en) 2009-11-28 2019-07-09 Semiconductor Energy Laboratory Co., Ltd. Stacked oxide material, semiconductor device, and method for manufacturing the semiconductor device
US10079310B2 (en) 2009-11-28 2018-09-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including stacked oxide semiconductor material
CN105206514B (zh) * 2009-11-28 2018-04-10 株式会社半导体能源研究所 层叠的氧化物材料、半导体器件、以及用于制造该半导体器件的方法
CN107947763B (zh) * 2010-08-06 2021-12-28 株式会社半导体能源研究所 半导体集成电路
US11177792B2 (en) 2010-08-06 2021-11-16 Semiconductor Energy Laboratory Co., Ltd. Power supply semiconductor integrated memory control circuit
US11677384B2 (en) 2010-08-06 2023-06-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor integrated circuit with semiconductor layer having indium, zinc, and oxygen
CN107947763A (zh) * 2010-08-06 2018-04-20 株式会社半导体能源研究所 半导体集成电路
US10916663B2 (en) 2010-12-03 2021-02-09 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor film and semiconductor device
TWI713225B (zh) * 2010-12-03 2020-12-11 日商半導體能源研究所股份有限公司 半導體裝置
TWI692109B (zh) * 2010-12-03 2020-04-21 日商半導體能源研究所股份有限公司 氧化物半導體膜及半導體裝置
US11688810B2 (en) 2010-12-17 2023-06-27 Semiconductor Energy Laboratory Co., Ltd. Oxide material and semiconductor device
JP2019054287A (ja) * 2010-12-17 2019-04-04 株式会社半導体エネルギー研究所 トランジスタの作製方法
US11217702B2 (en) 2010-12-17 2022-01-04 Semiconductor Energy Laboratory Co., Ltd. Oxide material and semiconductor device
US11049977B2 (en) 2010-12-17 2021-06-29 Semiconductor Energy Laboratory Co., Ltd. Oxide material and semiconductor device
TWI602303B (zh) * 2011-01-26 2017-10-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
US9761588B2 (en) 2011-01-26 2017-09-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a wide-gap semiconductor layer in an insulating trench
CN107302018B (zh) * 2011-03-25 2021-01-15 株式会社半导体能源研究所 半导体装置及制造半导体装置的方法
CN102694006B (zh) * 2011-03-25 2017-08-15 株式会社半导体能源研究所 半导体装置及制造半导体装置的方法
CN107302018A (zh) * 2011-03-25 2017-10-27 株式会社半导体能源研究所 半导体装置及制造半导体装置的方法
US9490351B2 (en) 2011-03-25 2016-11-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing semiconductor device
CN102694006A (zh) * 2011-03-25 2012-09-26 株式会社半导体能源研究所 半导体装置及制造半导体装置的方法
US9478668B2 (en) 2011-04-13 2016-10-25 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor film and semiconductor device
US10644164B2 (en) 2011-04-13 2020-05-05 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor film and semiconductor device
CN102738206A (zh) * 2011-04-13 2012-10-17 株式会社半导体能源研究所 氧化物半导体膜及半导体装置
US10998449B2 (en) 2011-04-13 2021-05-04 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor film and semiconductor device
US9893201B2 (en) 2011-04-13 2018-02-13 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor film and semiconductor device
US11799033B2 (en) 2011-04-13 2023-10-24 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor film and semiconductor device
CN107004717A (zh) * 2014-11-21 2017-08-01 株式会社半导体能源研究所 半导体装置及存储装置
CN113013250A (zh) * 2021-02-24 2021-06-22 北京大学 一种场效应晶体管及其制备方法
CN113013250B (zh) * 2021-02-24 2022-08-26 北京大学 一种场效应晶体管及其制备方法

Also Published As

Publication number Publication date
KR101452200B1 (ko) 2014-10-21
TWI442571B (zh) 2014-06-21
US7511343B2 (en) 2009-03-31
CN101162737B (zh) 2012-06-27
CA2605827C (en) 2018-01-02
EP1921681B1 (en) 2018-08-01
US20080099803A1 (en) 2008-05-01
EP1921681A3 (en) 2009-04-01
US20090127552A1 (en) 2009-05-21
EP1921681A2 (en) 2008-05-14
US7893495B2 (en) 2011-02-22
JP2008098637A (ja) 2008-04-24
CA2605827A1 (en) 2008-04-12
JP5410013B2 (ja) 2014-02-05
KR20080033127A (ko) 2008-04-16
TW200830557A (en) 2008-07-16

Similar Documents

Publication Publication Date Title
CN101162737B (zh) 薄膜晶体管
US7906415B2 (en) Device having zinc oxide semiconductor and indium/zinc electrode
EP1993122A2 (en) Semiconductor Layer for Thin Film Transistors
US20070287221A1 (en) Fabrication process for crystalline zinc oxide semiconductor layer
US8222076B2 (en) Fabricating amorphous zinc oxide semiconductor layer
US7491575B2 (en) Fabricating zinc oxide semiconductor using hydrolysis
Kittilstved et al. Activation of high-Tc ferromagnetism in Mn2+-doped ZnO using amines
US10319589B2 (en) High performance thin films from solution processible two-dimensional nanoplates
EP2376434B1 (de) Funktionelles material für gedruckte elektronische bauteile
JP2008028390A (ja) 電導性構成の製造プロセス
Zou et al. Ferromagnetism and ferroelectric properties of (Mn, Li) co-doped ZnO nanorods arrays deposited by electrodeposition
WO2016045164A1 (zh) 钙钛矿结构的无机金属氧化物半导体薄膜及其金属氧化物薄膜晶体管
You Transistor characteristics of zinc oxide active layers at various zinc acetate dihydrate solution concentrations of zinc oxide thin-film
Kayani et al. Dip-coated V doped ZnO thin films: dielectric and magnetic properties
Ganesan et al. Tuning the magnetic properties of electrochemically deposited Cu 2 O thin films by Fe incorporation
Goh et al. Direct formation of gold nanoparticles on substrates using a novel ZnO sacrificial templated-growth hydrothermal approach and their properties in organic memory device
Kumar et al. Nonvolatile memory devices based on undoped and Hf-and NaF-doped ZnO thin film transistors with Ag nanowires inserted between ZnO and gate insulator interface
Dominguez et al. Incorporation of ZnO nanoparticles on solution processed zinc oxide thin-film transistors
TW201035341A (en) Thin film antenna and the method of forming the same
JP6585148B2 (ja) 半導体膜の製造方法
WO2023288030A1 (en) Liquid metal printed 2d ultrahigh mobility conducting oxide transistors
Karimi et al. Eco Friendly Synthesis of Zinc Oxide Nanoparticles and Printing onto Electrically Conductive Substrate Using Electrostatic Spray Deposition
TW201939756A (zh) 半導體膜,及使用該半導體膜之半導體元件,以及分散液
Wu et al. P2–16: Field emission properties of α-Fe 2 O 3 nanostructures prepared from iron thin film with different thickness

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120627

Termination date: 20211011

CF01 Termination of patent right due to non-payment of annual fee