CN101090605B - 用于电源的印刷电路板和电路结构 - Google Patents

用于电源的印刷电路板和电路结构 Download PDF

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Publication number
CN101090605B
CN101090605B CN2007101101033A CN200710110103A CN101090605B CN 101090605 B CN101090605 B CN 101090605B CN 2007101101033 A CN2007101101033 A CN 2007101101033A CN 200710110103 A CN200710110103 A CN 200710110103A CN 101090605 B CN101090605 B CN 101090605B
Authority
CN
China
Prior art keywords
power supply
bypass capacitor
chip
ground
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2007101101033A
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English (en)
Chinese (zh)
Other versions
CN101090605A (zh
Inventor
菊池正则
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of CN101090605A publication Critical patent/CN101090605A/zh
Application granted granted Critical
Publication of CN101090605B publication Critical patent/CN101090605B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10545—Related components mounted on both sides of the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN2007101101033A 2006-06-16 2007-06-15 用于电源的印刷电路板和电路结构 Expired - Fee Related CN101090605B (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP2006166820 2006-06-16
JP2006-166820 2006-06-16
JP2006166820 2006-06-16
JP2007-129306 2007-05-15
JP2007129306A JP5196868B2 (ja) 2006-06-16 2007-05-15 プリント回路板
JP2007129306 2007-05-15

Publications (2)

Publication Number Publication Date
CN101090605A CN101090605A (zh) 2007-12-19
CN101090605B true CN101090605B (zh) 2010-06-23

Family

ID=38860728

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007101101033A Expired - Fee Related CN101090605B (zh) 2006-06-16 2007-06-15 用于电源的印刷电路板和电路结构

Country Status (3)

Country Link
US (1) US7692300B2 (enExample)
JP (1) JP5196868B2 (enExample)
CN (1) CN101090605B (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4736988B2 (ja) * 2006-07-24 2011-07-27 株式会社村田製作所 多層プリント基板
JP5396746B2 (ja) * 2008-05-23 2014-01-22 ミツミ電機株式会社 半導体装置及び半導体集積回路装置
US7956493B2 (en) 2008-08-11 2011-06-07 Infineon Technologies Ag Integrated circuit and method for manufacturing an integrated circuit
JP2011187809A (ja) * 2010-03-10 2011-09-22 Renesas Electronics Corp 半導体装置および多層配線基板
CN103996628A (zh) * 2010-04-16 2014-08-20 万国半导体有限公司 双引线框架多芯片共同封装体的制造方法
TW201316895A (zh) * 2011-10-14 2013-04-16 Hon Hai Prec Ind Co Ltd 可抑制電磁干擾的電路板
JP5922918B2 (ja) * 2011-12-05 2016-05-24 キヤノン株式会社 液体吐出ヘッド用半導体装置、液体吐出ヘッド及び液体吐出装置
JP6176917B2 (ja) 2012-11-20 2017-08-09 キヤノン株式会社 プリント配線板、プリント回路板及び電子機器
JP6091239B2 (ja) 2013-02-13 2017-03-08 キヤノン株式会社 プリント回路板、プリント配線板および電子機器
JP6108887B2 (ja) * 2013-03-13 2017-04-05 キヤノン株式会社 半導体パッケージ及びプリント回路板
CN104469617B (zh) * 2014-12-22 2018-05-22 青岛歌尔声学科技有限公司 一种降低有源耳机环路噪音的电路和方法
CN108463048B (zh) * 2017-02-21 2022-04-15 拉碧斯半导体株式会社 基板电路装置
US10477686B2 (en) 2017-07-26 2019-11-12 Canon Kabushiki Kaisha Printed circuit board
CN110620101B (zh) * 2018-06-20 2022-11-04 瑞昱半导体股份有限公司 主控元件及电路基板
US11013105B2 (en) * 2018-09-12 2021-05-18 Canon Kabushiki Kaisha Image pickup unit and image pickup apparatus
JP7654376B2 (ja) * 2020-10-14 2025-04-01 キヤノン株式会社 撮像モジュール及び電子機器
JP7621099B2 (ja) * 2020-11-26 2025-01-24 三菱電機株式会社 プリント配線板
JP7693344B2 (ja) * 2021-03-22 2025-06-17 キヤノン株式会社 電子モジュール及び電子機器
TWI812331B (zh) * 2022-07-06 2023-08-11 凌華科技股份有限公司 提升行動ＰＣＩ Ｅｘｐｒｅｓｓ模組ＰＤＮ的電路板結構

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6384476B2 (en) * 1999-04-19 2002-05-07 Canon Kabushiki Kaisha Semiconductor integrated circuit and printed wiring substrate provided with the same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2734447B2 (ja) 1995-09-14 1998-03-30 日本電気株式会社 多層プリント基板
JPH11135634A (ja) * 1997-10-28 1999-05-21 Nec Ic Microcomput Syst Ltd 半導体装置配線の処理方法、および、半導体装置配線の処理プログラムを記録した記録媒体
JPH11330142A (ja) * 1998-05-19 1999-11-30 Nec Corp ＬＳＩ（Ｌａｒｇｅ Ｓｃａｌｅ Ｉｎｔｅｇｒａｔｉｏｎ ）及びＬＳＩへの電源供給方法
JP3781922B2 (ja) * 1999-07-12 2006-06-07 シャープ株式会社 多層プリント回路基板
JP3877132B2 (ja) * 2000-11-20 2007-02-07 富士通株式会社 多層配線基板及び半導体装置
JP2002217545A (ja) * 2001-01-18 2002-08-02 Kyocera Corp 多層配線基板
JP3914456B2 (ja) 2002-04-19 2007-05-16 株式会社ルネサステクノロジ システム
JP2005183696A (ja) * 2003-12-19 2005-07-07 Matsushita Electric Ind Co Ltd 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6384476B2 (en) * 1999-04-19 2002-05-07 Canon Kabushiki Kaisha Semiconductor integrated circuit and printed wiring substrate provided with the same

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JP特开2003-297963A 2003.10.17
JP特开2003-318352A 2003.11.07

Also Published As

Publication number Publication date
US7692300B2 (en) 2010-04-06
JP2008021969A (ja) 2008-01-31
CN101090605A (zh) 2007-12-19
JP5196868B2 (ja) 2013-05-15
US20070290324A1 (en) 2007-12-20

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Granted publication date: 20100623

CF01 Termination of patent right due to non-payment of annual fee