CN101047380A - 共用输入/输出端子控制电路 - Google Patents
共用输入/输出端子控制电路 Download PDFInfo
- Publication number
- CN101047380A CN101047380A CNA200610104269XA CN200610104269A CN101047380A CN 101047380 A CN101047380 A CN 101047380A CN A200610104269X A CNA200610104269X A CN A200610104269XA CN 200610104269 A CN200610104269 A CN 200610104269A CN 101047380 A CN101047380 A CN 101047380A
- Authority
- CN
- China
- Prior art keywords
- circuit
- signal
- data
- output
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000002093 peripheral effect Effects 0.000 description 7
- 230000000630 rising effect Effects 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 4
- 238000001514 detection method Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000007689 inspection Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1731—Optimisation thereof
- H03K19/1732—Optimisation thereof by limitation or reduction of the pin/gate ratio
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/002—Switching arrangements with several input- or output terminals
- H03K17/005—Switching arrangements with several input- or output terminals with several inputs only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
Abstract
Description
Claims (11)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006086708 | 2006-03-27 | ||
JP2006086708A JP4699927B2 (ja) | 2006-03-27 | 2006-03-27 | 入出力共用端子制御回路 |
JP2006-086708 | 2006-03-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101047380A true CN101047380A (zh) | 2007-10-03 |
CN101047380B CN101047380B (zh) | 2010-09-29 |
Family
ID=38637805
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200610104269XA Active CN101047380B (zh) | 2006-03-27 | 2006-08-07 | 共用输入/输出端子控制电路 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7456657B2 (zh) |
JP (1) | JP4699927B2 (zh) |
KR (1) | KR100776937B1 (zh) |
CN (1) | CN101047380B (zh) |
TW (1) | TWI327420B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103078624A (zh) * | 2011-10-26 | 2013-05-01 | 迈实电子(上海)有限公司 | 信号输入电路和方法以及具有信号输入电路的芯片 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101205323B1 (ko) * | 2006-09-28 | 2012-11-27 | 삼성전자주식회사 | 리텐션 입/출력 장치를 이용하여 슬립모드를 구현하는시스템 온 칩 |
WO2012038058A1 (en) | 2010-09-21 | 2012-03-29 | Telormedix Sa | Treatment of conditions by toll-like receptor modulators |
US8748798B2 (en) * | 2012-09-05 | 2014-06-10 | Omnivision Technologies, Inc. | Comparator circuit for reduced output variation |
KR101468571B1 (ko) * | 2013-04-25 | 2014-12-04 | 주식회사 뉴티씨 (Newtc) | 전자 부품 인터페이스 장치 |
WO2014187470A1 (en) * | 2013-05-20 | 2014-11-27 | Abb Ab | Machine safety apparatus and a method of operating a machine safety apparatus |
US10268601B2 (en) * | 2016-06-17 | 2019-04-23 | Massachusetts Institute Of Technology | Timely randomized memory protection |
JP2018163498A (ja) * | 2017-03-24 | 2018-10-18 | エイブリック株式会社 | 監視回路 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63205754A (ja) * | 1987-02-21 | 1988-08-25 | Nec Corp | デイジタル処理装置の内部バス拡張方式 |
KR960003748Y1 (ko) * | 1991-07-13 | 1996-05-07 | 임종호 | 호퍼분리형 선별기 |
US5802882A (en) * | 1996-06-03 | 1998-09-08 | General Motors Corporation | Knitted cover |
US6191611B1 (en) * | 1997-10-16 | 2001-02-20 | Altera Corporation | Driver circuitry for programmable logic devices with hierarchical interconnection resources |
JP2003233584A (ja) * | 2002-02-12 | 2003-08-22 | Ricoh Co Ltd | データ転送装置 |
JP2004192051A (ja) * | 2002-12-06 | 2004-07-08 | Ricoh Co Ltd | 共用端子制御装置 |
JP2005165592A (ja) * | 2003-12-02 | 2005-06-23 | Matsushita Electric Ind Co Ltd | データ転送装置 |
KR102407406B1 (ko) * | 2017-06-23 | 2022-06-13 | 삼성디스플레이 주식회사 | 장식 인쇄 부재 및 장식 인쇄 부재를 포함하는 표시 장치 |
-
2006
- 2006-03-27 JP JP2006086708A patent/JP4699927B2/ja active Active
- 2006-07-14 TW TW095125842A patent/TWI327420B/zh active
- 2006-07-21 US US11/490,151 patent/US7456657B2/en active Active
- 2006-08-07 CN CN200610104269XA patent/CN101047380B/zh active Active
- 2006-08-08 KR KR1020060074667A patent/KR100776937B1/ko not_active IP Right Cessation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103078624A (zh) * | 2011-10-26 | 2013-05-01 | 迈实电子(上海)有限公司 | 信号输入电路和方法以及具有信号输入电路的芯片 |
US8766677B2 (en) | 2011-10-26 | 2014-07-01 | Maishi Electronic (Shanghai) Ltd. | Signal input circuit/chip |
CN103078624B (zh) * | 2011-10-26 | 2014-07-16 | 迈实电子(上海)有限公司 | 信号输入电路和方法以及具有信号输入电路的芯片 |
Also Published As
Publication number | Publication date |
---|---|
TWI327420B (en) | 2010-07-11 |
KR20070096747A (ko) | 2007-10-02 |
CN101047380B (zh) | 2010-09-29 |
TW200737712A (en) | 2007-10-01 |
KR100776937B1 (ko) | 2007-11-21 |
US20080001631A1 (en) | 2008-01-03 |
US7456657B2 (en) | 2008-11-25 |
JP4699927B2 (ja) | 2011-06-15 |
JP2007264853A (ja) | 2007-10-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081024 |
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C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20081024 Address after: Tokyo, Japan, Japan Applicant after: Fujitsu Microelectronics Ltd. Address before: Kanagawa Applicant before: Fujitsu Ltd. |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: SPANSION LLC N. D. GES D. STAATES Free format text: FORMER OWNER: FUJITSU SEMICONDUCTOR CO., LTD. Effective date: 20140106 |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20140106 Address after: American California Patentee after: Spansion LLC N. D. Ges D. Staates Address before: Kanagawa Patentee before: Fujitsu Semiconductor Co., Ltd. |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20160408 Address after: American California Patentee after: Cypress Semiconductor Corp. Address before: American California Patentee before: Spansion LLC N. D. Ges D. Staates |