CN100568378C - 集成电路存储器及用于刷新存储器的方法 - Google Patents

集成电路存储器及用于刷新存储器的方法 Download PDF

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Publication number
CN100568378C
CN100568378C CNB2005800168872A CN200580016887A CN100568378C CN 100568378 C CN100568378 C CN 100568378C CN B2005800168872 A CNB2005800168872 A CN B2005800168872A CN 200580016887 A CN200580016887 A CN 200580016887A CN 100568378 C CN100568378 C CN 100568378C
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China
Prior art keywords
memory
refresh
maximum time
address
data
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Expired - Lifetime
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CNB2005800168872A
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English (en)
Chinese (zh)
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CN1957422A (zh
Inventor
佩里·H·派莱伊
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Vlsi Technology Co ltd
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Freescale Semiconductor Inc
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Publication of CN1957422A publication Critical patent/CN1957422A/zh
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40607—Refresh operations in memory devices with an internal cache or data buffer
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40618—Refresh operations over multiple banks or interleaving
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40626—Temperature related aspects of refresh operations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Multimedia (AREA)
  • Dram (AREA)
CNB2005800168872A 2004-05-26 2005-04-28 集成电路存储器及用于刷新存储器的方法 Expired - Lifetime CN100568378C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/854,298 2004-05-26
US10/854,298 US7088632B2 (en) 2004-05-26 2004-05-26 Automatic hidden refresh in a dram and method therefor

Publications (2)

Publication Number Publication Date
CN1957422A CN1957422A (zh) 2007-05-02
CN100568378C true CN100568378C (zh) 2009-12-09

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2005800168872A Expired - Lifetime CN100568378C (zh) 2004-05-26 2005-04-28 集成电路存储器及用于刷新存储器的方法

Country Status (8)

Country Link
US (1) US7088632B2 (enExample)
EP (2) EP1751762B1 (enExample)
JP (1) JP2008500675A (enExample)
KR (1) KR20070026630A (enExample)
CN (1) CN100568378C (enExample)
AT (1) ATE465492T1 (enExample)
DE (1) DE602005020772D1 (enExample)
WO (1) WO2005119687A2 (enExample)

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US6563746B2 (en) * 1999-11-09 2003-05-13 Fujitsu Limited Circuit for entering/exiting semiconductor memory device into/from low power consumption mode and method of controlling internal circuit at low power consumption mode
US7313047B2 (en) * 2006-02-23 2007-12-25 Hynix Semiconductor Inc. Dynamic semiconductor memory with improved refresh mechanism
KR100850207B1 (ko) * 2006-12-29 2008-08-04 삼성전자주식회사 시스터메틱 코드 발생을 위한 듀얼 클럭킹 방법을 채용한메모리 장치
US8352772B2 (en) * 2007-05-25 2013-01-08 Rambus Inc. Reference clock and command word alignment
CN101404581B (zh) * 2007-10-11 2011-01-12 硅谷数模半导体（北京）有限公司 以太网物理层器件的控制方法
KR20110018947A (ko) * 2008-06-17 2011-02-24 엔엑스피 비 브이 전기 회로, 방법 및 동적 랜덤 액세스 메모리
EP2529374A4 (en) * 2010-01-28 2014-04-02 Hewlett Packard Development Co STORAGE ACCESS AND METHOD
US20110320699A1 (en) * 2010-06-24 2011-12-29 International Business Machines Corporation System Refresh in Cache Memory
JP2012038399A (ja) * 2010-08-11 2012-02-23 Elpida Memory Inc 半導体装置
JP6031745B2 (ja) 2011-10-17 2016-11-24 ソニー株式会社 送信装置、送信方法および受信装置
KR20130042236A (ko) * 2011-10-18 2013-04-26 에스케이하이닉스 주식회사 메모리 시스템
US9230046B2 (en) 2012-03-30 2016-01-05 International Business Machines Corporation Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator
US9286423B2 (en) 2012-03-30 2016-03-15 International Business Machines Corporation Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator
JP5323238B1 (ja) * 2012-05-18 2013-10-23 株式会社東芝 信号送信装置及び信号送信方法
US9286964B2 (en) 2012-12-21 2016-03-15 Intel Corporation Method, apparatus and system for responding to a row hammer event
US20150003172A1 (en) * 2013-06-26 2015-01-01 Sua KIM Memory module including buffer chip controlling refresh operation of memory devices
KR102171260B1 (ko) * 2013-06-26 2020-10-28 삼성전자 주식회사 리프레쉬 동작을 제어하는 버퍼 칩을 장착하는 메모리 모듈
US8982654B2 (en) 2013-07-05 2015-03-17 Qualcomm Incorporated DRAM sub-array level refresh
US9842630B2 (en) * 2013-10-16 2017-12-12 Rambus Inc. Memory component with adjustable core-to-interface data rate ratio
KR102130611B1 (ko) 2013-12-31 2020-07-06 삼성전자주식회사 아날로그-디지털 변환 회로, 이를 포함하는 이미지 센서 및 이미지 센서의 동작 방법
KR20160132243A (ko) * 2015-05-08 2016-11-17 에스케이하이닉스 주식회사 반도체 메모리 장치
US9928895B2 (en) * 2016-02-03 2018-03-27 Samsung Electronics Co., Ltd. Volatile memory device and electronic device comprising refresh information generator, information providing method thereof, and refresh control method thereof
US9824742B1 (en) 2016-04-28 2017-11-21 Qualcomm Incorporated DRAM access in self-refresh state
EP3901952B1 (en) * 2016-10-31 2023-06-07 Intel Corporation Applying chip select for memory device identification and power management control
US10497420B1 (en) * 2018-05-08 2019-12-03 Micron Technology, Inc. Memory with internal refresh rate control
DE102020133713A1 (de) * 2020-02-27 2021-09-02 Taiwan Semiconductor Manufacturing Co., Ltd. Speicheraktualisierung
CN116862756B (zh) * 2023-09-05 2023-12-19 广东匠芯创科技有限公司 行数据处理方法、行缓存器、电子设备及存储介质
US12265732B1 (en) * 2023-09-29 2025-04-01 Advanced Micro Devices, Inc. Refresh during power state changes

Citations (5)

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US4691303A (en) * 1985-10-31 1987-09-01 Sperry Corporation Refresh system for multi-bank semiconductor memory
US5555527A (en) * 1993-12-15 1996-09-10 Matsushita Electric Industrial Co., Ltd. Semiconductor memory, moving-picture storing memory, moving-picture storing apparatus, moving-picture displaying apparatus, static-picture storing memory, and electronic notebook
CN1375831A (zh) * 2001-03-16 2002-10-23 矽统科技股份有限公司 存储器刷新系统
US20030012070A1 (en) * 2001-07-13 2003-01-16 Mitsubishi Denki Kabushiki Kaisha Dynamic semiconductor memory device with adjustable refresh frequency
US20040022103A1 (en) * 2002-03-28 2004-02-05 Joachim Schnabel Limiter for refresh signal period in dram

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JPH0589672A (ja) 1991-09-30 1993-04-09 Casio Comput Co Ltd リフレツシユ信号発生回路
US5418920A (en) * 1992-04-30 1995-05-23 Alcatel Network Systems, Inc. Refresh control method and system including request and refresh counters and priority arbitration circuitry
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JPH08315569A (ja) * 1995-05-16 1996-11-29 Hitachi Ltd 半導体記憶装置、及びデータ処理装置
JPH09106674A (ja) * 1995-10-12 1997-04-22 Fujitsu Ltd 同期型ダイナミック半導体記憶装置
JPH10247384A (ja) * 1997-03-03 1998-09-14 Mitsubishi Electric Corp 同期型半導体記憶装置
US5870350A (en) * 1997-05-21 1999-02-09 International Business Machines Corporation High performance, high bandwidth memory bus architecture utilizing SDRAMs
US6442644B1 (en) 1997-08-11 2002-08-27 Advanced Memory International, Inc. Memory system having synchronous-link DRAM (SLDRAM) devices and controller
JPH11339469A (ja) * 1998-05-26 1999-12-10 Hitachi Ltd 半導体記憶装置
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US6707743B2 (en) * 1998-10-01 2004-03-16 Monolithic System Technology, Inc. Method and apparatus for completely hiding refresh operations in a DRAM device using multiple clock division
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US4691303A (en) * 1985-10-31 1987-09-01 Sperry Corporation Refresh system for multi-bank semiconductor memory
US5555527A (en) * 1993-12-15 1996-09-10 Matsushita Electric Industrial Co., Ltd. Semiconductor memory, moving-picture storing memory, moving-picture storing apparatus, moving-picture displaying apparatus, static-picture storing memory, and electronic notebook
CN1375831A (zh) * 2001-03-16 2002-10-23 矽统科技股份有限公司 存储器刷新系统
US20030012070A1 (en) * 2001-07-13 2003-01-16 Mitsubishi Denki Kabushiki Kaisha Dynamic semiconductor memory device with adjustable refresh frequency
US20040022103A1 (en) * 2002-03-28 2004-02-05 Joachim Schnabel Limiter for refresh signal period in dram

Also Published As

Publication number Publication date
CN1957422A (zh) 2007-05-02
EP2207184A1 (en) 2010-07-14
EP1751762B1 (en) 2010-04-21
US7088632B2 (en) 2006-08-08
WO2005119687A2 (en) 2005-12-15
JP2008500675A (ja) 2008-01-10
KR20070026630A (ko) 2007-03-08
DE602005020772D1 (de) 2010-06-02
WO2005119687A3 (en) 2006-05-26
ATE465492T1 (de) 2010-05-15
EP1751762A4 (en) 2008-05-14
EP1751762A2 (en) 2007-02-14
US20050276142A1 (en) 2005-12-15

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SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder

Address after: Texas in the United States

Patentee after: NXP USA, Inc.

Address before: Texas in the United States

Patentee before: FREESCALE SEMICONDUCTOR, Inc.

CP01 Change in the name or title of a patent holder
TR01 Transfer of patent right

Effective date of registration: 20180124

Address after: Delaware

Patentee after: VLSI Technology Co.,Ltd.

Address before: Texas in the United States

Patentee before: NXP USA, Inc.

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CX01 Expiry of patent term

Granted publication date: 20091209

CX01 Expiry of patent term