CN100539008C - 半导体封装及其形成方法 - Google Patents

半导体封装及其形成方法 Download PDF

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CN100539008C
CN100539008C CNB2006800182164A CN200680018216A CN100539008C CN 100539008 C CN100539008 C CN 100539008C CN B2006800182164 A CNB2006800182164 A CN B2006800182164A CN 200680018216 A CN200680018216 A CN 200680018216A CN 100539008 C CN100539008 C CN 100539008C
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semiconductor packages
gold
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adhesion
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瓦西里·罗梅加·汤普森
贾森·芬德
特里·K·戴利
张镇旭
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NXP USA Inc
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Abstract

提供在管芯粘接工艺期间防止来自背面金属层(118)的金渗入到焊料(164)中的半导体封装(100)及其制造方法。根据本发明的方法包括提供包括有多个金属焊盘(112)的半导体晶片叠层(110)。在基板(116)的表面(119)上形成粘附/镀层(115)。在粘附/镀层(115)的表面上镀上金层(118)。在划片道区域(124)中使用标准光刻技术蚀刻金层(118)以暴露金层(118)及粘附/镀层(115)的边缘部分(128)。沉积阻挡金属层(130)以在金层(118)及粘附/镀层(115)的暴露的边缘(128)的周围形成边缘密封(129)。在划片道区域(124)中切割半导体晶片叠层(110)并将其焊接到引线框架(162)以形成其提供边缘密封(128)以防止来自背面金属层(118)的金渗入到焊料(162)中的半导体封装(100)。

Description

半导体封装及其形成方法
技术领域
本发明通常涉及半导体封装以及用于制造半导体封装的方法，更具体地涉及管芯(die)粘接工艺。
背景技术
在晶片上产生多个管芯之后，必须对它们执行管芯制备，期间制备管芯用于集成电路(IC)封装及测试。管芯制备工艺通常由晶片贴装和管芯切割以及随后的管芯粘接工艺组成。管芯被粘接在半导体封装的支撑结构(例如，引线框架)的管芯焊盘或者管芯腔上。结合管芯的方式限定了管芯粘接工艺。通常在汽车和大功率器件中使用软焊料及焊膏应用。例如，在软焊料或焊膏粘接工艺期间，采用焊接材料将管芯结合到引线框架上。在软焊料粘接工艺期间，焊料被导入作为导线预型(wire preform)并且熔化在热引线框架的表面上作为液态焊料点。在焊膏粘接工艺期间，通过小注射器将焊料分配在引线框架上。随后将管芯放置在焊料上，并加热到熔化点以上，随后冷却，提供稳固的连接。
当前的后端金属工艺包括在切割(dicing)或单颗化(singulation)之前在晶片上沉积金和阻挡金属层。标准的晶片切割方法使用锯片贯穿器件阵列直线切割，导致在单颗化切点处暴露金层。在软焊料粘接工艺期间，金层的暴露部分溶解在焊料中，导致失去粘附性以及在焊料块中形成大的空洞。由于金溶解或渗入到焊料中导致的典型金损耗为30％。
因此，需要提供一种可降低焊料空洞并改善半导体管芯粘附性的封装半导体器件的方法。此外，需要提供一种可提供具有改良的热性能的器件的封装半导体器件的方法。此外，结合附图及本发明的背景技术，根据随后对本发明的详细描述及附加的权利要求，本发明的其它期望的特性及特征将会明显。
发明内容
本发明提供了一种制造半导体封装的方法，该方法包括：提供半导体晶片叠层，其包括在基板的第一表面上形成的多个金属焊盘以及在所述基板的相对的第二表面上形成的金层；蚀刻位于所述半导体晶片叠层的划片道区域中的所述金层，其中，蚀刻暴露了所述金层和所述基板的多个边缘部分；在所述金层的所述暴露的边缘部分的周围形成边缘密封；在所述划片道区域中切割所述半导体叠层以限定半导体管芯；以及将所述半导体管芯粘接到支撑结构。支撑结构可以为引线框架。提供金层的步骤包括通过将金层溅射在基板的相对的第二表面上溅射金层的沉积步骤。蚀刻步骤包括采用湿式化学法进行蚀刻。形成边缘密封的步骤包括在所述相对的第二表面上沉积阻挡金属层，其中，阻挡金属具有在1.0至1.7微米范围内的厚度。沉积阻挡金属层的步骤包括溅射单独的钛、镍-钒(7-9wt％的钒)和金的层。边缘密封防止在将所述半导体管芯粘附到支撑结构期间所使用的焊接材料中形成空洞。
进一步提供制造半导体封装的方法，该方法包括：提供半导体叠层，其具有在基板的第一表面上形成的多个金属焊盘以及与多个半导体器件对准形成的多个热通孔；在基板的相对的第二表面上沉积金层并延伸到热通孔中；蚀刻位于半导体叠层的划片道区域内的金层以暴露金层和基板的边缘部分；采用阻挡金属层在金层的暴露的边缘部分的周围形成边缘密封；在划片道区域内切割半导体叠层；以及将半导体叠层焊接至支撑结构以形成半导体封装。支撑结构可以为引线框架结构。蚀刻步骤包括采用湿式化学法进行蚀刻。形成边缘密封的步骤包括溅射具有在1.0至1.7微米范围内的厚度的阻挡金属层的步骤，其中阻挡金属包括钛、镍-钒(7-9wt％的钒)和金的层。边缘密封防止金层渗入进在焊接工艺期间所使用的焊接材料中以及防止在焊接材料中形成空洞。
最后，提供一种半导体封装，其包括：半导体管芯，其包括：基板；在基板的第一表面上形成的至少一个半导体器件；在与基板的第一表面相对的第二表面上形成金层并且其具有边缘部分；在金层的表面上形成阻挡金属层，其中阻挡金属层在金层的边缘部分的周围产生边缘密封；以及焊接到半导体管芯的支撑结构。边缘密封防止金层渗入到焊接材料中。基板可以为砷化镓。在蚀刻步骤期间在半导体管芯的划片道区域中形成金层的暴露的边缘部分。阻挡金属层由钛、镍-钒(7-9wt％的钒)和金的层组成。该封装进一步包括在基板中形成的多个热通孔。
附图说明
下面将结合附图描述本发明，其中相同的附图标记表示相同的元件，并且其中
图1至6在横截面中示出了根据本发明的半导体晶片封装及其制造的方法步骤。
具体实施方式
对本发明的下面的详细描述本质上只是示例性的并且不意图限制本发明或者本发明的应用和使用。此外，也不意图受在本发明的前述背景技术或者本发明的下面详细描述中所介绍的任何理论所限制。
图1至6在横截面中示出了根据本发明的半导体晶片封装及其制造的方法步骤。如图1所示，根据本发明实施例的半导体封装100的制造开始于设置基板116，通常为半导体晶片，其具有根据公知的半导体制造技术制造的形成在其最上表面111上的多个金属焊盘112。与焊盘112对准设置多个热通孔(via)114，并且将由相关半导体器件(未示出)产生的热及增大的源极到漏极电流传递到封装基板(在下面讨论)。基板116优选地由砷化镓(GaAs)组成，其中术语“基板”在这里用于包括基板本身以及可覆盖在基板上以形成半导体晶片叠层110的金属或绝缘层。应了解，在晶片叠层110的制造中以及更具体地在焊盘112和热通孔114的制造中的多个步骤是公知的，并由此为了简洁起见，这里将只简单的叙述或者完全省略许多常规步骤，而不提供公知方法的细节。
在晶片制造工艺期间，在基板116的背面119上形成粘附/镀层115。粘附/镀层115由具有在1000-2000
Figure C200680018216D0009111656QIETU
范围内的厚度的钛层以及具有在4000-6000
Figure C200680018216D0009111656QIETU
范围内的厚度的金层形成。通过在本领域内公知的标准溅射工艺，在基板116上沉积粘附/镀层115，其提供增强的热学特性以及镀上随后的层。
接下来，在粘附/镀层115的表面上镀上金层118。在本示例性实施例中，金层118形成为具有约3微米的厚度，并且通过在本领域中公知的标准电镀工艺沉积在粘附/镀层115上。金层118提供热通路并且增加与金属焊盘112接触的器件的源极到漏极的电流能力，使得金属焊盘112更加有效。
在镀层118之后，在金层118的表面122上应用光致抗蚀剂层120并且对其光刻构图，如图1所示。采用本领域中公知的标准光刻步骤执行对层120的构图，并且其暴露在晶片叠层100的划片道或者划线区域124中的金层118。随后在划片道区域124中切割或单颗化晶片叠层110。
图2示出了采用构图的光刻抗蚀剂层120作为蚀刻掩模来贯穿金层118进行蚀刻。对金层118的蚀刻在层118中提供沟槽126并且暴露金层118及粘附/镀层115的边缘部分128，以及基板116的部分。采用公知的湿式化学法诸如X20来蚀刻金层118。如图3所示，在完成对沟槽126的蚀刻之后，去除光致抗蚀剂层120。
在剥去光致抗蚀剂层120之后，如图4所示，在金层118的表面122上沉积阻挡金属层130。通过溅射技术将阻挡金属层130沉积在晶片叠层110的表面122上以及沟槽126和热通孔114中。在一个实施例中，阻挡金属层130由钛、镍-钒和金组成。在优选实施例中，阻挡金属层130包括具有约0.3微米厚度的钛材料、具有约0.6微米厚度的镍-钒(7-9wt％钒)材料以及具有约0.5微米厚度的金材料。通常，阻挡金属层形成为具有在约1.0至1.7微米范围内的厚度。沉积阻挡金属层130，使得钛材料形成在金层118的表面122上，镍-钒材料夹在钛和金材料之间，一起组成阻挡金属层130。在阻挡金属层130中金层的比例小于其最终提供且边缘密封的金层118的比例。层130提供了在金层118和粘附/镀层115的边缘部分128周围形成的边缘密封129。边缘密封129将在管芯粘接工艺期间防止层118渗入到焊接材料中(在下面描述)。
参考图5，在沉积阻挡金属层之后，对晶片叠层100进行管芯制备，期间，在制备中将晶片叠层100单颗化为单个的管芯用于装配。管芯制备通常由在管芯粘接之前的两个主要步骤组成，即晶片贴装和晶片切割。晶片贴装包括提供对晶片的支撑以助于通过管芯粘接工艺对来自晶片切割的晶片进行加工。在晶片贴装期间，晶片叠层100及晶片框架(未示出)同时粘接在支撑晶片或切割胶带上。
在晶片贴装之后进行晶片切割并且其包括将晶片切割为单个的管芯用于在IC封装中的装配。参考图5，使用晶片锯140在划片道区域贯穿晶片叠层110产生切口142。晶片切割工艺产生第一晶片部分(或管芯)150及第二晶片部分(或管芯)152。接下来，在管芯粘接之前，对晶片部分150和152执行清洗工艺(未示出)。
晶片切割在每一个晶片部分150和152上提供暴露的边缘154。如图5所示，在切割之后，先前沉积的阻挡金属层130通过边缘密封129提供对金层118的密封。对层118的该密封消除了在管芯粘接工艺期间金的损耗以及焊料中空洞的形成，这是因为在粘接工艺期间，阻挡金属层130对于焊料是化学非响应的。
图6示出了在管芯粘接之后包括有第一晶片部分150的完整的晶片封装。在切割之后，对第一晶片部分150执行管芯粘接以形成半导体封装。管芯粘接工艺也被称为管芯贴装或管芯结合。在该工艺期间，晶片或者管芯被粘接在半导体封装的支撑结构(例如，引线框架)的管芯焊盘或管芯腔。通常，管芯粘接工艺采用公知的管芯粘接设备和管芯粘接工具来贴装管芯。
如图所述，使用焊接材料160来将第一晶片部分150结合到引线框架162。引线框架162可以为由例如镍、钯和金形成的镀铜引线框架。在软焊料工艺中，焊接材料160被导入作为导线预型并且熔化在热引线框架162的表面上作为液态焊料点。随后将第一晶片部分150放置在热焊料上，并且在冷却之后，形成稳固的连接。在将晶片部分150放置在液态焊料点上的期间，焊料点散开以便与晶片部分150和引线框架162的基本整个结合表面相接触。在焊料沿着晶片部分150的边缘上升的位置处形成管芯粘接嵌条(fillet)164。焊接材料160为基于铅和锡的合金，并且在不包括阻挡金属层130来保护金层118的情况下，将发生金渗入到焊接材料160中。然而，如前所述，阻挡层118对于焊接材料160是化学非响应的并因此在焊接材料160中不会发生渗入或形成空洞。在受控温度环境下执行第一晶片部分150到引线框架162的焊接，受控温度环境包括保护性气体环境，诸如在惰性气体环境中，以防止引线框架162的氧化。
将第一晶片部分150粘接在引线框架162上的替代方式被认为也是在本发明的范围之内的，并且所述方式包括，但不限于，焊膏管芯粘接以及馈线管芯粘接。在背面金属处理期间形成层118的暴露部分128的额外光刻步骤，以及用于形成边缘密封129的阻挡层130的沉积，提供了对金层118的密封，从而在管芯粘接工艺期间保持背面金属的完整性。
尽管在本发明的在前详细描述中介绍了至少一个示例性的实施例，但是应了解存在大量的变化。还应了解，示例性的实施例只是例子，并不意图以任何形式限制本发明的范围、实用性或结构。更确切地，在前的详细说明将为本领域的技术人员提供用于实现本发明的示例性实施例的方便的指示，并且应了解，在不背离在附加的权利要求以及它们法律上的等价物中所阐述的本发明范围的情况下，可以在示例性的实施例中所描述的元件的功能和排列方面进行各种变化。

Claims (20)

1.一种制造半导体封装的方法，所述方法包括：
提供半导体晶片叠层，其包括在基板的第一表面中形成的多个金属焊盘、在所述基板的相对的第二表面上形成的粘附/镀层以及在所述粘附/镀层的表面上上形成的金层；
在所述半导体晶片叠层的划片道区域中蚀刻所述金层，其中蚀刻暴露出所述金层、所述粘附/镀层以及所述基板的多个边缘部分；
在所述粘附/镀层及所述金层的所述暴露的边缘部分的周围形成边缘密封；
在所述划片道区域中切割所述半导体叠层以限定半导体管芯；以及
将所述管芯粘接至支撑结构。
2.如权利要求1所述的制造半导体封装的方法，其中，所述形成边缘密封的步骤包括：在所述相对的第二表面上沉积阻挡金属层。
3.如权利要求2所述的制造半导体封装的方法，其中，所述沉积阻挡金属层的步骤包括：溅射由钛、镍-钒和金的层所组成的阻挡金属层，并且其中，在所述阻挡金属层中的金的比例小于在所述粘附/镀层的表面上形成的金层的比例。
4.如权利要求2所述的制造半导体封装的方法，其中，所述阻挡金属层具有在1.0至1.7微米的范围内的厚度。
5.如权利要求1所述的制造半导体封装的方法，其中，所述支撑结构为引线框架。
6.如权利要求1所述的制造半导体封装的方法，其中，所述提供金层的步骤包括通过在所述粘附/镀层上溅射金层的沉积步骤。
7.如权利要求1所述的制造半导体封装的方法，其中，所述蚀刻步骤包括使用湿式化学法进行蚀刻。
8.如权利要求1所述的制造半导体封装的方法，其中，所述边缘密封防止在将所述管芯粘接到支撑结构期间所使用的焊接材料中形成空洞。
9.一种制造半导体封装的方法，所述方法包括：
提供半导体叠层，其具有在基板的第一表面中形成的多个金属焊盘以及与所述多个金属焊盘对准形成的多个热通孔；
在所述基板的相对的第二表面上沉积粘附/镀层并且延伸到热通孔中；
在所述粘附/镀层上沉积金层并且延伸到热通孔中；
在所述半导体叠层的划片道区域中蚀刻所述金层以暴露所述金层、所述粘附/镀层以及所述基板的边缘；
采用阻挡金属层在所述金层和所述粘附/镀层的暴露的边缘部分周围形成边缘密封；
在所述划片道区域中切割所述半导体叠层；以及
将所述半导体叠层焊接至支撑结构以形成半导体封装。
10.如权利要求9所述的制造半导体封装的方法，其中，所述蚀刻步骤包括采用湿式化学法进行蚀刻。
11.如权利要求9所述的制造半导体封装的方法，其中，所述形成边缘密封的步骤包括通过溅射来沉积阻挡金属层，所述阻挡金属层具有在1.0至1.7微米范围内的厚度。
12.如权利要求9所述的制造半导体封装的方法，其中，所述阻挡金属层包括钛、镍-钒和金的层。
13.如权利要求9所述的制造半导体封装的方法，其中，所述边缘密封防止金层渗入到在焊接工艺期间所使用的焊接材料中以及防止在焊接材料中形成空洞。
14.如权利要求9所述的制造半导体封装的方法，其中，所述支撑结构为引线框架。
15.一种半导体封装，其包括：
半导体管芯，其包括：
基板，具有暴露的基板边缘；
形成在所述基板的第一表面中的至少一个金属焊盘；
形成在第二表面上的粘附/镀层，其具有边缘部分；
形成在所述粘附/镀层上的金层，其具有边缘部分；
形成在所述金层的表面上的阻挡金属层，
其中所述阻挡金属层在所述金层的边缘部分及所述粘附/镀层的边缘部分的周围产生边缘密封，所述阻挡金属层延伸到所述暴露的基板边缘并且与之协作形成基本平坦的表面；以及
焊接到所述半导体管芯的支撑结构。
16.如权利要求15所述的半导体封装，其中，所述暴露的基板边缘与所述边缘密封纵向间隔开。
17.如权利要求15所述的半导体封装，其中，用焊接材料将所述支撑结构焊接到半导体管芯，且所述边缘密封防止金层渗入到焊接材料中。
18.如权利要求15所述的半导体封装，其中，在蚀刻步骤期间，在所述半导体管芯的划片道区域中形成金层及粘附/镀层的边缘部分。
19.如权利要求15所述的半导体封装，其中，所述阻挡金属层由钛、镍-钒和金的层组成，所述阻挡金属层具有在1.0至1.7微米范围内的厚度。
20.如权利要求15所述的半导体封装，进一步包括形成在所述基板中的多个热通孔。
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