CN102543868B - 切割半导体结构的方法 - Google Patents
切割半导体结构的方法 Download PDFInfo
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- CN102543868B CN102543868B CN201110217321.3A CN201110217321A CN102543868B CN 102543868 B CN102543868 B CN 102543868B CN 201110217321 A CN201110217321 A CN 201110217321A CN 102543868 B CN102543868 B CN 102543868B
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- Dicing (AREA)
Abstract
本发明的实施例包括一种切割半导体结构的方法。在半导体衬底上方提供器件层。器件层具有第一芯片区域和第二芯片区域。划线区域位于第一芯片区域和第二芯片区域之间。保护层形成在器件层上方。从而形成在半导体衬底的上方。对划线区域之上的保护层进行激光切割,以形成切口。切口延伸至半导体衬底中,并且将保护层形成为覆盖部分切口。穿过保护层的部分和衬底,进行机械切割,以将第一芯片区域和第二芯片区域分离。
Description
技术领域
本发明通常涉及半导体结构制造工艺,更具体地,涉及切割半导体衬底的方法。
背景技术
在通常的集成电路形成工艺中,首先制造的是半导体晶圆,每个半导体晶圆包括多个相同的半导体芯片(也称作管芯)。在制造半导体晶圆之后,将其切割以使半导体芯片分离,从而每个半导体芯片均可被单独封装。
然而,传统的晶圆切割工艺有诸多缺点。例如,在工艺进行过程中,半导体衬底上的上层金属层可能开裂,导致污染物或湿气能够渗透进芯片。由此,增加了整体组件的不合格率。
于是,需要一种改进的方法,以将半导体晶圆切割成具有稳定电性能的单个晶圆。
发明内容
未解决上述问题,本发明提供了一种方法,包括:在半导体衬底上方提供器件层,器件层具有第一芯片区域和第二芯片区域、以及位于第一芯片区域和第二芯片区域之间的划线区域;在器件层上方形成保护层;对划线区域上的保护层进行激光切割,以形成切口(123),切口延伸至衬底中,并且由保护层的一部分填充;穿过保护层的一部分和半导体衬底进行机械切割,以将第一芯片区域和第二芯片区域分离。
该方法进一步包括:在激光切割过程中,加热保护层,以使保护层可流动。
其中,保护层在约50℃至约150℃的温度范围内可流动。
该方法进一步包括:在激光切割之后,将保护层固化。
其中,保护层在约50℃至约150℃的温度范围内固化。
其中,在保护层的一部分填充切口之后,保护层覆盖器件层和半导体衬底的分界面。
其中,保护层包括可流动复合树脂。
其中,切口从划线区域的一端向划线区域的相对端延伸。
其中,器件层包括多个互连层。
其中,切口延伸至衬底中约5μm至10μm的深度。
此外,本发明还提供了一种方法,包括:在半导体衬底上方形成器件层,器件层具有第一芯片区域和第二芯片区域、以及位于第一芯片区域和第二芯片区域之间的划线区域;在划线区域中的器件层中蚀刻多个开口;在多个开口中填充激光可流动材料;以及对划线区域上的器件层进行激光切割,以形成切口,切口延伸至半导体衬底中,并且切口的一部分由激光可流动材料覆盖;以及穿过切口进行机械切割,以将第一芯片区域和第二芯片区域分离。
其中,填充激光可流动材料进一步包括:通过激光切割软化激光可流动材料,从而使激光可流动材料流动到多个开口的外部,并且覆盖切口的一部分;以及将软化的激光可流动材料固化。
其中,激光可流动材料包括在激光切割过程中可流动的焊料或金属合金。
其中,激光可流动材料在约2000℃的温度下可流动。
其中,在激光切割之后,激光可流动材料覆盖器件层和半导体衬底的分界面。
其中,器件层包括多个互连层,并且激光可流动材料填充在多个互连层的至少一个中。
该方法进一步包括:使密封环环绕第一芯片区域和第二芯片区域的每一个,并且由激光可流动材料填充的开口位于密封环的相对于环绕的第一芯片区域和第二芯片区域的相对侧。
其中,由激光可流动材料填充的开口从划线区域的一端延伸至划线区域的相对端。
其中,器件层包括低k介电层。
其中,将激光可流动材料填充的开口排列为从划线区域的一端延伸至划线区域的相对端的分离段。
附图说明
以下将通过参考补充的附图而对示例性实施例进行描述。应该理解,附图是以说明性为目的,因此未按比例绘制。
图1是包括多个芯片区域的晶圆的顶视图。
图2是图1所描述的晶圆的放大图。
图3是根据本发明的实施例的制造半导体结构的方法的流程图。
图4至图7是按照图3的根据一个或多个实施例的示出了在结构的制造过程中各个阶段的横截面图。
图8是根据本发明的实施例的制造半导体结构的另一种方法的流程图。
图9至图11是按照图8的根据一个或多个实施例的示出了结构的制造过程中各个阶段的横截面图。
具体实施方式
以下详细讨论说明性实施例的制造和使用。然而,应该理解,本发明提供了许多可以在多种具体情况下实现的可应用的发明的概念。所讨论的具体实施例仅是说明性的,并不用于限定本发明的范围。
图1和图2中示出的是包括多个芯片区域的晶圆的顶视图。图3和图8示出的是根据本发明的实施例的制造半导体结构的方法10和方法20的流程图。图4至图7是按照图3的根据一个或多个实施例的示出了半导体结构的制造过程中各个阶段的横截面视图。图9至图11是按照图8的根据一个或多个实施例的示出了半导体结构的制造过程中各个阶段的横截面图。
图1是制造在半导体衬底101上的包括多个芯片区域103的晶圆100的顶视图。通过芯片区域103之间的划线105划分出多个芯片区域103。图2是图1中描述的晶圆100的一部分的放大图。这里的术语“晶圆”通常是指在其上形成有多个层和器件结构的半导体衬底101。在一些实施例中,半导体衬底101包括硅或化合物半导体,诸如GaAs、InP、Si/Ge、或SiC。上述的层的示例包括介电层、掺杂层、和/或多晶硅层。器件结构的示例包括晶体管、电阻和/或电容,这些晶体管、电阻和/电容可以通过互连层互连到附加的有源电路,或者可以不通过互连层互连到附加的有源电路。以下工艺步骤将在衬底表面上的多个半导体芯片区域上实施。
现参考图3,方法10开始于框11,其中,在半导体衬底上提供了器件层。器件层具有第一芯片区域和第二芯片区域。划线区域形成在第一芯片区域和第二芯片区域之间。方法10继续至框12,其中,保护层形成在器件层上方,从而位于半导体衬底的上方。方法10继续至框13,其中,将划线区域之上的保护层激光切割,以形成切口。切口延伸至半导体衬底中,并由保护层的部分填充。方法10继续至框14,其中,穿过保护层的部分和衬底执行机械切割,以将第一芯片区域、第二芯片区域及其下的衬底分离。
图4至图7是按照图3的根据一个或多个实施例的示出了半导体结构的制造过程中各个阶段的横截面图。图4至图7是横截面图,通过图2中的垂直平面交叉线A-A′获得。图4提供了仅包括半导体衬底101(其上形成有两个芯片区域103/103′)的一部分的结构200。半导体衬底101的其余部分以及其他芯片区域在图4-7中省略。结构200包括半导体衬底101,器件层109形成在半导体衬底101上方,接合焊盘111形成在器件层109的上方,钝化层113形成在接合焊盘111的上方,UBM 115形成在钝化层113的上方,并且导电部件117形成在UBM 115的上方。器件层109具有第一芯片区域103和第二芯片区域103′。第一芯片区域103和第二芯片区域103′中的每个都由密封环107环绕。划线区域105限定在第一芯片区域103和第二芯片区域103′的密封环107之间。
以下描述结构200的制造工艺。提供了具有顶表面102的半导体衬底101。在半导体衬底101的顶表面102的上方形成器件层109。器件层109包括多个互连层。互连层包括设置在一个或多个介电层中的一个或多个导电层。导电层与集成电路元件电连接,并且将电连接从集成电路提供至上层。在一些实施例中,互连层中的介电层由介电常数(k值)介于约2.9和约3.8之间的低k介电材料、k值介于约2.5和约2.9之间的极低k(ULK)介电材料、或一些低k介电材料的组合物形成。通常,介电层的k值越小,介电层就会变得越易碎并且易脱层和破裂。互连层还包括形成在芯片区域周围的密封环107。密封环107将划线区域105与芯片区域分隔开。密封环107保护芯片区域中的集成电路免受湿气和污染物的侵袭。在切割工艺中,密封环107还保护了芯片区域免受损坏。在至少一个实施例中,密封环107包含诸如铝、铝合金、铜、铜合金、或其组合物的导电材料。
接合焊盘111形成在器件层109的上方。接合焊盘111提供了上面的焊料凸块和下面的集成电路之间的电连接,穿过金属通孔(未示出)至器件层109中的导电层,以电连接至下层的集成电路。在一个实施例中,接合焊盘111包含导电材料,诸如铝、铝合金、铜、铜合金、或其组合物。在一些实施例中,通过物理气相沉积(PVD)(例如使用由铝、铜或其合金制成的溅镀靶(sputtering target)的溅镀沉积)使接合焊盘111沉积而成,而后通过光刻和蚀刻对沉积层进行图案化。
接下来,钝化层113形成在接合焊盘111的上方。钝化层113吸收或释放由衬底的封装产生的热应力或机械应力。通过诸如化学气相沉积(CVD)的可应用的沉积技术,可将钝化层113沉积在接合焊盘111的上方。钝化层113包括一个或多个层,诸如氧化物、未掺杂的硅玻璃(USG)、氮化硅(SiN)、二氧化硅(SiO2)或氮氧化硅(SiON)。钝化层113防止或减少湿气、机械力和/或辐射对集成电路的损坏。
凸块底部金属化(UBM)层115形成在钝化层113上方,并且与接合焊盘111的一部分接触。在一些实施例中,UBM层115包括多层导电材料,例如,钛层,铜层,和/或镍层。优选地,UBM层115中的每一层使用诸如电化学电镀的电镀工艺来形成,不过根据所需的材料可选择使用其他形成工艺,诸如溅射、蒸发、化学镀或PECVD工艺。
接下来,在一些实施例中,在UBM层115上方形成光刻胶(未示出),并且进一步形成至少暴露UBM层115的一部分的孔。光刻胶用作金属沉积工艺的模具,以形成导电部件。在一些实施例中,如图4中所示,通过蒸发、电镀、或丝网印刷(screen printing),将导电材料沉积在孔中,从而在UBM层115的上方形成一列导电部件117。导电材料包括诸如焊料或铜的金属或金属合金中的任一种类。在至少一个实施例中,导电部件117是铜柱。在另一个实施例中,导电部件117是焊料,其中,通过加热将焊料回流,以形成焊料凸块。
如图5所示,保护层119形成在器件层109上方并且覆盖钝化层113、UBM层115和导电部件117。在至少一个实施例中,保护层119固定在载体上。接下来,将载体翻转,并将保护层119面朝下对着器件层109。然后,将载体朝着器件层109按下,并将保护层119形成在器件层109上方。最后,将载体移除。保护层119包括可以在约50℃至约150℃的温度范围内流动的可流动复合树脂。
参考图6,将位于划线区域105上方的保护层119和划线区域105激光切割121,以形成切口123。切口123从保护层119的顶表面延伸至半导体衬底101中约5μm到10μm的深度。切口123还沿着划线区域105的一端向划线区域105的相对侧端延伸。保护层119的一部分因激光产生的热量而被熔化后流动到切口123中,并且填充切口123。同时,切口123中的保护层119覆盖了器件层109和半导体衬底101的分界面(interface)126。在一个实施例中,激光切割使用由DISCO制成的氩(Ar)基离子激光束工具。激光切割的运行功率在激光束的温度约2000℃时约为0.4W至4W。在激光切割之前或激光切割过程中,将保护层119加热到可流动状态。加热温度为约50℃至约150℃,持续20分钟。激光切割之后,保护层119在约50℃至约150℃的温度范围内固化2小时,以使保护层119硬化。有利地,在后面的机械切割管芯的工艺中,保护层119具有减少芯片边缘开裂或破裂的效果。同时,也不太可能在薄弱层(诸如低介电常数层)中发生开裂、剥落或脱层。
参考图7,穿过保护层119的部分以及半导体衬底101实施机械切割125,以将第一芯片区域103和第二芯片区域103′分离。将晶圆100上的多个芯片区域,以及,在一些实施例中,其下的衬底切割成单独的芯片区域。
现参考图8,图8是根据本发明的实施例的制造半导体结构的另一种方法。方法20开始于框21,其中,提供了半导体衬底。方法20继续至框22,其中,在半导体衬底上方形成器件层。器件层具有第一芯片区域和第二芯片区域。划线区域定义在第一芯片区域和第二芯片区域之间。方法20继续至框23,其中,在划线区域中的器件层中蚀刻多个开口。方法20继续至框24,其中,器件层中的多个开口利用激光可流动材料进行填充。方法20继续至框25,其中,将划线区域上的器件层激光切割,以形成切口。切口延伸至半导体衬底中。切口的一部分由激光可流动材料覆盖。方法20继续至框26,其中,穿过切口实施机械切割,以将第一芯片区域和第二芯片区域分离。
图9至图11是按照图8的根据一个或多个实施例示出的半导体结构的制造过程中各个阶段的横截面图。图9示出结构201的形成中的图4的工艺步骤的变化。图9中与图4中相同的标记代表了相同的或类似的元件。
参考图9,示出了结构201。器件层109形成在半导体衬底101的上方。器件层109包括多个互连层。互连层包括设置在一个或多个介电层中的一个或多个导电层。密封环107环绕第一芯片区域103和第二芯片区域103′中的每一个。密封环107将第一芯片区域103、第二芯片区域103′和划线区域分隔开。然后,在划线区域105中的器件层109中蚀刻一个或多个开口。利用激光可流动材料110将开口填充。接下来,在器件层109上方形成接合焊盘111。在接合焊盘111的上方形成钝化层113。在钝化层113上方形成UBM 115,并且在UBM 115上方形成导电部件117。
在图9中,激光可流动材料110包括焊料,比如锡合金,或在2000℃的激光束的激光切割工作温度下为可流动的金属合金。在至少一个实施例中,由激光可流动材料110填充的开口位于密封环107关于第一芯片区域103和第二芯片区域103′的相对侧。在至少一个实施例中,由激光可流动材料110填充的开口形成在至少一个互连层中。在其他实施例中,由激光可流动材料110填充的开口沿着划线区域105的一端延伸至划线105的另一相对端。在另一实施例中,由激光可流动材料110填充的开口排列为沿着划线区域105的一端至划线105的相对端延伸的分离段。
参考图10,在划线区域105上的器件层109实施激光切割工艺121,以形成切口123。切口123从器件层109的顶表面延伸至半导体衬底101中约5μm到10μm的深度。切口123还沿着划线区域105的一端向划线区域105的相对端延伸。切口123的一部分由激光可流动材料110覆盖。同时,切口123中的激光可流动材料110覆盖器件层109和半导体衬底101的分界面126。在至少一个实施例中,激光切割使用由DISCO制成的Ar基离子激光束工具。激光切割的工作功率在约2000℃的激光束的温度下约为0.4W至4W。在激光切割过程中,激光可流动材料110被软化,成为可流动状态。激光可流动材料110流至多个开口外部并且填充切口123的部分。然后,将软化的激光可流动材料110固化。有利地,在后面的机械切割芯片的工艺中,切口123中的激光可流动材料110具有减少晶圆边缘开裂或破裂的效果。同时,也不太可能在薄弱层(诸如低介电常数层)中发生开裂、剥落或脱层。
参考图11,穿过切口123、激光可流动材料110和半导体衬底101,实施机械切割125,以将第一芯片区域103和第二芯片区域103′,以及,在一些实施例中,其下的衬底分离。晶圆100上的芯片区域被切割成单独的芯片区域。
本申请文件的各个实施例可用于改善传统的晶圆切割工艺中的缺陷。例如,在各个实施例中,在切口中的保护层119或激光可流动材料110在切割工艺过程期间为芯片的边缘部分提供刚性支撑。因此,也不太可能在薄弱层(诸如低介电常数层)中发生开裂、剥落或脱层。封装工艺的合格率因此会显著提高。
尽管已经详细地描述了本发明及其优势,但应该理解,可以在不背离所附权利要求限定的本发明主旨和范围的情况下,做各种不同的改变,替换和更改。而且,本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。作为本领域普通技术人员应理解,通过本发明,现有的或今后开发的用于执行与根据本发明所采用的所述相应实施例基本相同的功能或获得基本相同结果的工艺、机器、制造,材料组分、装置、方法或步骤根据本发明可以被使用。因此,所附权利要求应该包括在这样的工艺、机器、制造、材料组分、装置、方法或步骤的范围内。
Claims (20)
1.一种切割半导体衬底的方法,包括:
在所述半导体衬底上方提供器件层,所述器件层具有第一芯片区域和第二芯片区域、以及位于所述第一芯片区域和所述第二芯片区域之间的划线区域;
在所述器件层上方形成保护层;
对所述划线区域上的所述保护层进行激光切割,以形成切口,所述切口延伸至所述衬底中,并且由通过所述激光切割熔化的所述保护层的一部分填充;
穿过所述保护层的所述一部分和所述半导体衬底进行机械切割,以将所述第一芯片区域和所述第二芯片区域分离。
2.根据权利要求1所述的方法,进一步包括:在激光切割过程中,加热所述保护层,以使所述保护层可流动。
3.根据权利要求2所述的方法,其中,所述保护层在50℃至150℃的温度范围内可流动。
4.根据权利要求1所述的方法,进一步包括:在激光切割之后,将所述保护层固化。
5.根据权利要求4所述的方法,其中,所述保护层在50℃至150℃的温度范围内固化。
6.根据权利要求1所述的方法,其中,在所述保护层的所述一部分填充所述切口之后,所述保护层覆盖所述器件层和所述半导体衬底的分界面。
7.根据权利要求1所述的方法,其中,所述保护层包括可流动复合树脂。
8.根据权利要求1所述的方法,其中,所述切口从所述划线区域的一端向所述划线区域的相对端延伸。
9.根据权利要求1所述的方法,其中,所述器件层包括多个互连层。
10.根据权利要求1所述的方法,其中,所述切口延伸至所述衬底中5μm至10μm的深度。
11.一种切割半导体衬底的方法,包括:
在所述半导体衬底上方形成器件层,所述器件层具有第一芯片区域和第二芯片区域、以及位于所述第一芯片区域和所述第二芯片区域之间的划线区域;
在所述划线区域中的所述器件层中蚀刻多个开口;
在所述多个开口中填充激光可流动材料;以及
对所述划线区域上的所述器件层进行激光切割,以形成切口,所述切口延伸至所述半导体衬底中,并且所述切口的一部分由所述激光可流动材料覆盖,所述激光可流动材料在所述激光切割期间可流动;以及
穿过所述切口中的所述激光可流动材料和所述半导体衬底进行机械切割,以将所述第一芯片区域和所述第二芯片区域分离。
12.根据权利要求11所述的方法,其中,所述激光切割进一步包括:
通过激光切割软化所述激光可流动材料,从而使激光可流动材料流动到所述多个开口的外部,并且覆盖所述切口的所述一部分;以及
将软化的激光可流动材料固化。
13.根据权利要求11所述的方法,其中,所述激光可流动材料包括在激光切割过程中可流动的焊料或金属合金。
14.根据权利要求13所述的方法,其中,所述激光可流动材料在2000℃的温度下可流动。
15.根据权利要求11所述的方法,其中,在激光切割之后,所述激光可流动材料覆盖所述器件层和所述半导体衬底的分界面。
16.根据权利要求11所述的方法,其中,所述器件层包括多个互连层,并且所述激光可流动材料填充在所述多个互连层的至少一个中。
17.根据权利要求11所述的方法,进一步包括:使密封环环绕所述第一芯片区域和所述第二芯片区域的每一个,并且由所述激光可流动材料填充的所述开口位于所述密封环的相对于环绕的所述第一芯片区域和所述第二芯片区域的相对侧。
18.根据权利要求11所述的方法,其中,由所述激光可流动材料填充的所述开口从所述划线区域的一端延伸至所述划线区域的相对端。
19.根据权利要求11所述的方法,其中,所述器件层包括低k介电层。
20.根据权利要求11所述的方法,其中,将所述激光可流动材料填充的所述开口排列为从所述划线区域的一端延伸至所述划线区域的相对端的分离段。
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US9559005B2 (en) * | 2014-01-24 | 2017-01-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of packaging and dicing semiconductor devices and structures thereof |
US9165832B1 (en) * | 2014-06-30 | 2015-10-20 | Applied Materials, Inc. | Method of die singulation using laser ablation and induction of internal defects with a laser |
US9922895B2 (en) * | 2016-05-05 | 2018-03-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package with tilted interface between device die and encapsulating material |
US10720360B2 (en) | 2016-07-29 | 2020-07-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor die singulation and structures formed thereby |
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US11081392B2 (en) * | 2018-09-28 | 2021-08-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Dicing method for stacked semiconductor devices |
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