CN100521231C - 半导体器件及制造方法 - Google Patents

半导体器件及制造方法 Download PDF

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Publication number
CN100521231C
CN100521231C CNB2004800176215A CN200480017621A CN100521231C CN 100521231 C CN100521231 C CN 100521231C CN B2004800176215 A CNB2004800176215 A CN B2004800176215A CN 200480017621 A CN200480017621 A CN 200480017621A CN 100521231 C CN100521231 C CN 100521231C
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CN
China
Prior art keywords
layer
semiconductor
gate
dielectric substance
grid structure
Prior art date
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Expired - Fee Related
Application number
CNB2004800176215A
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English (en)
Chinese (zh)
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CN1809927A (zh
Inventor
Z·克里沃卡皮奇
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GlobalFoundries Inc
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Advanced Micro Devices Inc
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Publication of CN1809927A publication Critical patent/CN1809927A/zh
Application granted granted Critical
Publication of CN100521231C publication Critical patent/CN100521231C/zh
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6757Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743Silicon
    • H10D30/6744Monocrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/751Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
  • Electrodes Of Semiconductors (AREA)
CNB2004800176215A 2003-06-23 2004-06-05 半导体器件及制造方法 Expired - Fee Related CN100521231C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/601,401 US6913959B2 (en) 2003-06-23 2003-06-23 Method of manufacturing a semiconductor device having a MESA structure
US10/601,401 2003-06-23

Publications (2)

Publication Number Publication Date
CN1809927A CN1809927A (zh) 2006-07-26
CN100521231C true CN100521231C (zh) 2009-07-29

Family

ID=33552165

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004800176215A Expired - Fee Related CN100521231C (zh) 2003-06-23 2004-06-05 半导体器件及制造方法

Country Status (8)

Country Link
US (1) US6913959B2 (enExample)
JP (1) JP2007519217A (enExample)
KR (1) KR101065046B1 (enExample)
CN (1) CN100521231C (enExample)
DE (1) DE112004001117B4 (enExample)
GB (1) GB2418533B (enExample)
TW (1) TWI341546B (enExample)
WO (1) WO2005001908A2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100725112B1 (ko) * 2005-04-27 2007-06-04 한국과학기술원 백―바이어스를 이용하여 soi 기판에 형성된 플래시 블록을 소거하기 위한 플래시 메모리 소자의 제조 방법, 그 소거 방법 및 그 구조
JP4988217B2 (ja) * 2006-02-03 2012-08-01 株式会社日立製作所 Mems構造体の製造方法
US9184263B2 (en) * 2013-12-30 2015-11-10 Globalfoundries Inc. Methods of forming gate structures for semiconductor devices using a replacement gate technique and the resulting devices
US10170332B2 (en) * 2014-06-30 2019-01-01 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET thermal protection methods and related structures
US10014410B2 (en) 2014-12-02 2018-07-03 Renesas Electronics Corporation Method for producing semiconductor device and semiconductor device
US20170366965A1 (en) * 2016-06-21 2017-12-21 Chiun Mai Communication Systems, Inc. Communication device, communication system and method therefor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5612230A (en) * 1991-04-16 1997-03-18 Canon Kabushiki Kaisha Process for manufacturing a semiconductor device by applying a non-single-crystalline material on a sidewall inside of an opening portion for growing a single-crystalline semiconductor body
US6207511B1 (en) * 1997-04-30 2001-03-27 Texas Instruments Incorporated Self-aligned trenched-channel lateral-current-flow transistor

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Publication number Priority date Publication date Assignee Title
US5397904A (en) * 1992-07-02 1995-03-14 Cornell Research Foundation, Inc. Transistor microstructure
DE4340967C1 (de) * 1993-12-01 1994-10-27 Siemens Ag Verfahren zur Herstellung einer integrierten Schaltungsanordnung mit mindestens einem MOS-Transistor
JP3078720B2 (ja) * 1994-11-02 2000-08-21 三菱電機株式会社 半導体装置およびその製造方法
DE19544721C1 (de) * 1995-11-30 1997-04-30 Siemens Ag Verfahren zur Herstellung einer integrierten Schaltungsanordnung mit mindestens einem MOS-Transistor
JP3472401B2 (ja) * 1996-01-17 2003-12-02 三菱電機株式会社 半導体装置の製造方法
DE19711482C2 (de) * 1997-03-19 1999-01-07 Siemens Ag Verfahren zur Herstellung eines vertikalen MOS-Transistors
JPH1131659A (ja) * 1997-07-10 1999-02-02 Toshiba Corp 半導体装置の製造方法
US6200866B1 (en) * 1998-02-23 2001-03-13 Sharp Laboratories Of America, Inc. Use of silicon germanium and other alloys as the replacement gate for the fabrication of MOSFET
KR100280106B1 (ko) * 1998-04-16 2001-03-02 윤종용 트렌치 격리 형성 방법
US6080612A (en) * 1998-05-20 2000-06-27 Sharp Laboratories Of America, Inc. Method of forming an ultra-thin SOI electrostatic discharge protection device
US6339002B1 (en) * 1999-02-10 2002-01-15 International Business Machines Corporation Method utilizing CMP to fabricate double gate MOSFETS with conductive sidewall contacts
US6770689B1 (en) * 1999-03-19 2004-08-03 Sakura Color Products Corp. Aqueous glittering ink
US6252284B1 (en) 1999-12-09 2001-06-26 International Business Machines Corporation Planarized silicon fin device
JP2002151688A (ja) 2000-08-28 2002-05-24 Mitsubishi Electric Corp Mos型半導体装置およびその製造方法
US6495401B1 (en) 2000-10-12 2002-12-17 Sharp Laboratories Of America, Inc. Method of forming an ultra-thin SOI MOS transistor
KR100346845B1 (ko) * 2000-12-16 2002-08-03 삼성전자 주식회사 반도체 장치의 얕은 트렌치 아이솔레이션 형성방법
EP1244142A1 (en) * 2001-03-23 2002-09-25 Universite Catholique De Louvain Fabrication method of SOI semiconductor devices
US6635923B2 (en) 2001-05-24 2003-10-21 International Business Machines Corporation Damascene double-gate MOSFET with vertical channel regions
KR100428768B1 (ko) * 2001-08-29 2004-04-30 삼성전자주식회사 트렌치 소자 분리형 반도체 장치 및 그 형성 방법
US6689650B2 (en) 2001-09-27 2004-02-10 International Business Machines Corporation Fin field effect transistor with self-aligned gate
US6611029B1 (en) 2002-11-08 2003-08-26 Advanced Micro Devices, Inc. Double gate semiconductor device having separate gates
US6872606B2 (en) * 2003-04-03 2005-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with raised segment

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5612230A (en) * 1991-04-16 1997-03-18 Canon Kabushiki Kaisha Process for manufacturing a semiconductor device by applying a non-single-crystalline material on a sidewall inside of an opening portion for growing a single-crystalline semiconductor body
US6207511B1 (en) * 1997-04-30 2001-03-27 Texas Instruments Incorporated Self-aligned trenched-channel lateral-current-flow transistor

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Novel locally strained channel technique for highperformance 55nm CMOS. OTA K ET AL.INTERNATIONAL ELECTRON DEVICES MEETING 2002. IEDM. TECHNICAL DIGEST. 2002 *

Also Published As

Publication number Publication date
GB2418533A (en) 2006-03-29
GB2418533B (en) 2007-03-28
WO2005001908A2 (en) 2005-01-06
TW200507030A (en) 2005-02-16
KR101065046B1 (ko) 2011-09-19
TWI341546B (en) 2011-05-01
DE112004001117T5 (de) 2006-06-29
WO2005001908A3 (en) 2005-06-02
GB0523869D0 (en) 2006-01-04
US6913959B2 (en) 2005-07-05
US20050003593A1 (en) 2005-01-06
KR20060062035A (ko) 2006-06-09
DE112004001117B4 (de) 2011-12-01
JP2007519217A (ja) 2007-07-12
CN1809927A (zh) 2006-07-26

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Patentee after: Globalfoundries Semiconductor Inc.

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Patentee before: Advanced Micro Devices Inc.

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Granted publication date: 20090729

Termination date: 20190605

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