GB2418533B - Semiconductor device and method of manufacture - Google Patents

Semiconductor device and method of manufacture

Info

Publication number
GB2418533B
GB2418533B GB0523869A GB0523869A GB2418533B GB 2418533 B GB2418533 B GB 2418533B GB 0523869 A GB0523869 A GB 0523869A GB 0523869 A GB0523869 A GB 0523869A GB 2418533 B GB2418533 B GB 2418533B
Authority
GB
United Kingdom
Prior art keywords
manufacture
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0523869A
Other languages
English (en)
Other versions
GB2418533A (en
GB0523869D0 (en
Inventor
Zoran Krivokapic
Daniel R Collopy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of GB0523869D0 publication Critical patent/GB0523869D0/en
Publication of GB2418533A publication Critical patent/GB2418533A/en
Application granted granted Critical
Publication of GB2418533B publication Critical patent/GB2418533B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6757Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H01L29/1054
    • H01L29/42384
    • H01L29/786
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743Silicon
    • H10D30/6744Monocrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/751Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
  • Electrodes Of Semiconductors (AREA)
GB0523869A 2003-06-23 2004-06-05 Semiconductor device and method of manufacture Expired - Fee Related GB2418533B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/601,401 US6913959B2 (en) 2003-06-23 2003-06-23 Method of manufacturing a semiconductor device having a MESA structure
PCT/US2004/017727 WO2005001908A2 (en) 2003-06-23 2004-06-05 Strained semiconductor device and method of manufacture

Publications (3)

Publication Number Publication Date
GB0523869D0 GB0523869D0 (en) 2006-01-04
GB2418533A GB2418533A (en) 2006-03-29
GB2418533B true GB2418533B (en) 2007-03-28

Family

ID=33552165

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0523869A Expired - Fee Related GB2418533B (en) 2003-06-23 2004-06-05 Semiconductor device and method of manufacture

Country Status (8)

Country Link
US (1) US6913959B2 (enExample)
JP (1) JP2007519217A (enExample)
KR (1) KR101065046B1 (enExample)
CN (1) CN100521231C (enExample)
DE (1) DE112004001117B4 (enExample)
GB (1) GB2418533B (enExample)
TW (1) TWI341546B (enExample)
WO (1) WO2005001908A2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100725112B1 (ko) * 2005-04-27 2007-06-04 한국과학기술원 백―바이어스를 이용하여 soi 기판에 형성된 플래시 블록을 소거하기 위한 플래시 메모리 소자의 제조 방법, 그 소거 방법 및 그 구조
JP4988217B2 (ja) * 2006-02-03 2012-08-01 株式会社日立製作所 Mems構造体の製造方法
US9184263B2 (en) * 2013-12-30 2015-11-10 Globalfoundries Inc. Methods of forming gate structures for semiconductor devices using a replacement gate technique and the resulting devices
US10170332B2 (en) * 2014-06-30 2019-01-01 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET thermal protection methods and related structures
US10014410B2 (en) 2014-12-02 2018-07-03 Renesas Electronics Corporation Method for producing semiconductor device and semiconductor device
US20170366965A1 (en) * 2016-06-21 2017-12-21 Chiun Mai Communication Systems, Inc. Communication device, communication system and method therefor

Citations (8)

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Publication number Priority date Publication date Assignee Title
US5612230A (en) * 1991-04-16 1997-03-18 Canon Kabushiki Kaisha Process for manufacturing a semiconductor device by applying a non-single-crystalline material on a sidewall inside of an opening portion for growing a single-crystalline semiconductor body
US6207511B1 (en) * 1997-04-30 2001-03-27 Texas Instruments Incorporated Self-aligned trenched-channel lateral-current-flow transistor
US20010036731A1 (en) * 1999-12-09 2001-11-01 Muller K. Paul L. Process for making planarized silicon fin device
US20020003256A1 (en) * 2000-02-14 2002-01-10 Mitsubishi Denki Kabushiki Kaisha MOS semiconductor device and method of manufacturing the same
US20020177263A1 (en) * 2001-05-24 2002-11-28 International Business Machines Corporation Damascene double-gate MOSFET with vertical channel regions
US20030025126A1 (en) * 2000-10-12 2003-02-06 Sharp Laboratories Of America, Inc. Ultra-thin SOI MOS transistors
US20030057486A1 (en) * 2001-09-27 2003-03-27 International Business Machines Corporation Fin field effect transistor with self-aligned gate
WO2004044992A1 (en) * 2002-11-08 2004-05-27 Advanced Micro Devices, Inc. Double gate semiconductor device having separate gates

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Publication number Priority date Publication date Assignee Title
US5397904A (en) * 1992-07-02 1995-03-14 Cornell Research Foundation, Inc. Transistor microstructure
DE4340967C1 (de) * 1993-12-01 1994-10-27 Siemens Ag Verfahren zur Herstellung einer integrierten Schaltungsanordnung mit mindestens einem MOS-Transistor
JP3078720B2 (ja) * 1994-11-02 2000-08-21 三菱電機株式会社 半導体装置およびその製造方法
DE19544721C1 (de) * 1995-11-30 1997-04-30 Siemens Ag Verfahren zur Herstellung einer integrierten Schaltungsanordnung mit mindestens einem MOS-Transistor
JP3472401B2 (ja) * 1996-01-17 2003-12-02 三菱電機株式会社 半導体装置の製造方法
DE19711482C2 (de) * 1997-03-19 1999-01-07 Siemens Ag Verfahren zur Herstellung eines vertikalen MOS-Transistors
JPH1131659A (ja) * 1997-07-10 1999-02-02 Toshiba Corp 半導体装置の製造方法
US6200866B1 (en) * 1998-02-23 2001-03-13 Sharp Laboratories Of America, Inc. Use of silicon germanium and other alloys as the replacement gate for the fabrication of MOSFET
KR100280106B1 (ko) * 1998-04-16 2001-03-02 윤종용 트렌치 격리 형성 방법
US6080612A (en) * 1998-05-20 2000-06-27 Sharp Laboratories Of America, Inc. Method of forming an ultra-thin SOI electrostatic discharge protection device
US6339002B1 (en) * 1999-02-10 2002-01-15 International Business Machines Corporation Method utilizing CMP to fabricate double gate MOSFETS with conductive sidewall contacts
US6770689B1 (en) * 1999-03-19 2004-08-03 Sakura Color Products Corp. Aqueous glittering ink
KR100346845B1 (ko) * 2000-12-16 2002-08-03 삼성전자 주식회사 반도체 장치의 얕은 트렌치 아이솔레이션 형성방법
EP1244142A1 (en) * 2001-03-23 2002-09-25 Universite Catholique De Louvain Fabrication method of SOI semiconductor devices
KR100428768B1 (ko) * 2001-08-29 2004-04-30 삼성전자주식회사 트렌치 소자 분리형 반도체 장치 및 그 형성 방법
US6872606B2 (en) * 2003-04-03 2005-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with raised segment

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5612230A (en) * 1991-04-16 1997-03-18 Canon Kabushiki Kaisha Process for manufacturing a semiconductor device by applying a non-single-crystalline material on a sidewall inside of an opening portion for growing a single-crystalline semiconductor body
US6207511B1 (en) * 1997-04-30 2001-03-27 Texas Instruments Incorporated Self-aligned trenched-channel lateral-current-flow transistor
US20010036731A1 (en) * 1999-12-09 2001-11-01 Muller K. Paul L. Process for making planarized silicon fin device
US20020003256A1 (en) * 2000-02-14 2002-01-10 Mitsubishi Denki Kabushiki Kaisha MOS semiconductor device and method of manufacturing the same
US20030025126A1 (en) * 2000-10-12 2003-02-06 Sharp Laboratories Of America, Inc. Ultra-thin SOI MOS transistors
US20020177263A1 (en) * 2001-05-24 2002-11-28 International Business Machines Corporation Damascene double-gate MOSFET with vertical channel regions
US20030057486A1 (en) * 2001-09-27 2003-03-27 International Business Machines Corporation Fin field effect transistor with self-aligned gate
WO2004044992A1 (en) * 2002-11-08 2004-05-27 Advanced Micro Devices, Inc. Double gate semiconductor device having separate gates

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
OTA KET AL: "Novel locally strained channel technique for high performance 55nm CMOS" INTERNATIONAL ELECTRON DEVICES MEETING 2002 IEDM TECHNICAL DIGEST SAN FRANCISCO, CA, DEC 8-11, 2002, NEW YORK, NY: IEEE, pages 27-30, XP010625982 *
SHIMIZU A ET AL: "Local mechanical-stress control (LMC) a new technique for CMOS-performance enhancement" INTERNATIONAL ELECTRON DEVICES MEETING 2001 IEDM TECHNICAL DIGEST WASHINGTON DC DEC 2-5, 2001 pages 1941-1944, XP010575160, ISBN: 0-7803-7050-3 *

Also Published As

Publication number Publication date
GB2418533A (en) 2006-03-29
WO2005001908A2 (en) 2005-01-06
TW200507030A (en) 2005-02-16
KR101065046B1 (ko) 2011-09-19
TWI341546B (en) 2011-05-01
DE112004001117T5 (de) 2006-06-29
WO2005001908A3 (en) 2005-06-02
GB0523869D0 (en) 2006-01-04
US6913959B2 (en) 2005-07-05
US20050003593A1 (en) 2005-01-06
CN100521231C (zh) 2009-07-29
KR20060062035A (ko) 2006-06-09
DE112004001117B4 (de) 2011-12-01
JP2007519217A (ja) 2007-07-12
CN1809927A (zh) 2006-07-26

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20091210 AND 20091216

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20110605