CN100475012C - 中间板的制造方法 - Google Patents

中间板的制造方法 Download PDF

Info

Publication number
CN100475012C
CN100475012C CNB2004800194092A CN200480019409A CN100475012C CN 100475012 C CN100475012 C CN 100475012C CN B2004800194092 A CNB2004800194092 A CN B2004800194092A CN 200480019409 A CN200480019409 A CN 200480019409A CN 100475012 C CN100475012 C CN 100475012C
Authority
CN
China
Prior art keywords
layer
connector zone
coupling assembling
bonded
layer sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2004800194092A
Other languages
English (en)
Other versions
CN1820557A (zh
Inventor
格拉尔德·A·J·赫姆肯斯
罗格·特伦
马塞尔·斯米茨
弗兰克·斯皮特延斯
彼得·J·M·托伦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Viasystems Group Inc
Original Assignee
Viasystems Group Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Viasystems Group Inc filed Critical Viasystems Group Inc
Publication of CN1820557A publication Critical patent/CN1820557A/zh
Application granted granted Critical
Publication of CN100475012C publication Critical patent/CN100475012C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/044—Details of backplane or midplane for mounting orthogonal PCBs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09127—PCB or component having an integral separable or breakable part
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09972—Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10189—Non-printed connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/1059—Connections made by press-fit insertion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742—Details of leads
    • H05K2201/1075—Shape details
    • H05K2201/10878—Means for retention of a lead in a hole
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • H05K3/308—Adaptations of leads
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Combinations Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Chemical And Physical Treatments For Wood And The Like (AREA)

Abstract

制造中间板的方法。提供具有连接组件的多层板，并提供具有形成于其中以限定连接器区域周界的通道的层。该层粘合至多层板，使得连接器区域与多层板的连接组件重叠。移除该层中的至少一部分连接器区域，以暴露多层板的连接组件。还公开了刚性多层。该刚性多层包括多层板和层。多层板具有连接组件。所述层具有形成于其中以限定连接器区域周界的通道。层粘合至多层板，使得连接器区域与多层板的连接组件重叠。然后可以例如通过深度可控刮刨移除连接器区域。如本领域技术人员将要了解到的，深度的公差不是关键性的，因为在形成刚性多层之前预先形成了具有通道的层。

Description

中间板的制造方法
相关申请的交叉参考
本专利申请要求2003年7月8日提交并标记为美国Serial No.60/485,765的临时专利申请的优先权，其全部内容通过引用并入本文。
关于联邦政府赞助的研究或开发的声明
不适用。
发明内容
一般而言，本发明涉及制造中间板(mid-plane)的方法。在该方法中，提供多层板和层。所述层优选为介电层。所述多层板具有连接组件。所述层具有形成于其中以限定连接器区域周界的通道。所述层粘合至所述多层板，使得连接器区域与多层板的连接组件重叠。然后移除所述层中的至少一部分连接器区域，以暴露多层板的连接组件。
本发明还涉及刚性多层。所述刚性多层包括多层板和层。所述层优选为介电层。所述多层板具有连接组件。所述层具有形成于其中以限定连接器区域周界的通道。所述层粘合至所述多层板，使得连接器区域与多层板的连接组件重叠。然后可以例如通过深度可控刮刨(routing)来移除连接器区域，以暴露多层板的连接组件。如本领域技术人员将要了解到的，深度的公差不是关键性的，因为在形成刚性多层之前预先形成了具有通道的层。
所述层优选用不可流动的粘合剂或流动性低的粘合剂粘合至多层板。不可流动的粘合剂或流动性低的粘合剂可以是本领域公知的某些种类的半固化片。预先形成于所述层中的通道防止任何粘合剂流入连接区域。因此，所述粘合剂不会干扰或以其它方式破坏形成于多层板中的连接组件。
结合附图和所附权利要求阅读下面的详细说明时，本领域的技术人员将会明白本发明的其它优点和特征。
附图说明
图1是根据本发明构建的中间板的横截面图。
图2是根据本发明构建的两个多层电路板的横截面图。
图3是图1中所述中间板的构造过程中所用的第一和第二金属箔以及粘合材料的横截面图。
图4是由图2中所述多层板与图3中所示金属箔和粘合材料一起形成的层叠体的横截面图。
图5是图4中所示层叠体一起层压形成准备最后加工的刚性多层产品的横截面图。
图6是层叠体另一实施方案的横截面图，其与图5相似，只是其移除了导电层并增加了电连接器。
图7是中间板成品的横截面图。
具体实施方式
参照附图，具体参照图1，其中示出并用附图标记10标明了根据本发明构建的中间板。中间板10提供有第一面12和第二面14。中间板10还提供有至少两个多层板16，为清楚起见用附图标记16a和16b标明。每个多层板16限定至少一个、优选一个以上的连接器区域20。为清楚起见用附图标记20a、20b、20c和20d标明连接器区域20。连接器区域20a和20b与第一面12相邻设置。连接器区域20c和20d与第二面14相邻设置。如下文中更加详细讨论的那样，连接器区域20设计来允许与连接器22互连，使得连接器22可以安装在中间板10的两侧，即第一面12和第二面14。为清楚起见用附图标记22a、22b、22c和22d标明连接器22。连接器22通过任何合适的连接组件24连接至多层板16，例如图1中所示利用压入配合连接器26。为清楚起见图1中仅标出了三个压入配合连接器26。
中间板10还提供有第一和第二金属箔30和32。第一金属箔30通过粘合材料34连接至多层板16a。第二金属箔32通过粘合材料36连接至多层板16b。多层板16a
Figure C200480019409D0007135230QIETU
过粘合材料38连接至多层板16b。粘合材料34、36和38可以是任何能够将金属箔30和32与多层板16a和16b刚性固定在一起以形成作为刚性结构的中间板10的合适材料。例如，粘合材料34、36和38可以是未固化的预浸料。粘合材料34和36优选为流动性低的粘合剂或不可流动的粘合剂，如本领域内已知的某些种类的半固化片。
应该注意，第一和第二金属箔30和32可以在其上提供有预定导电图案，包括通路或其它类型的电互连以将第一和第二金属箔30和32连接至相应的多层板16a和16b，从而在中间板10的任一面上形成至少两个独立电路。换句话说，第一金属箔30与多层板16a电互连以形成至少一个独立电路。同样地，第二金属箔32与多层板16b互连以形成至少一个独立电路。应该注意，多层板16a和16b上的电路根据需要可以通过形成在中间板10中的通路或其它合适的导电路径互连。
图2-5描述形成中间板10的方法。现在将更加详细地说明图2-5。但是，应该理解，可以使用其它方式构建中间板10。
图2中所示为多层板16a和16b。多层板16a的连接组件24包括限定多个孔42的多个电连接器40。同样地，多层板16b的连接组件24提供有限定多个孔48的多个电连接器46。电连接器40和46的尺寸应使得孔42和48匹配地容纳压入配合连接器26。在本文所示的优选实施方案中，电连接器40和46形成上述连接组件24的一部分。孔42和48的尺寸优选等于压入配合尺寸。
多层板16a和16b的特征可在于经表面精加工(未示出)如ENIG加工完成的埋入的通路产品。
图3中所示是第一和第二金属箔30和32，以及粘合材料34和36。第一和第二金属箔30和32在构造和功能上基本相同。为简明起见，下文中仅详细描述第一金属箔30。第一金属箔30提供有导电层50和介电层52。导电层50由任何种类的合适的导电材料如铝、铜等构成。通常，导电层50由铜构成。导电层50被蚀刻或者以其它方式形成为预定图案的形状以电连接提供在多层板16a中的各种组件和/或电路。介电层52可以由任何合适种类的介电材料如FR4构成。连接器区域20通过绕连接器区域20的周界形成通道54而限定在介电层52中。为清楚起见，通道54在图3中用附图标记54a、54b、54c和54d标明。通道54a、54b、54c和54d具有至少两个用途。第一用途是防止粘合材料34和36渗出或流入连接器区域20a、20b、20c和20d。另一用途是允许在后续制造步骤中移除连接器区域20a、20b、20c和20d中的第一和第二金属箔30和32，这将在图7中更加详细地讨论。通道54a、54b、54c和54d可以任何合适的方式如用刮刨机或激光器形成。粘合材料34和36优选预先形成有切除部分，使得粘合材料34和36包围通道54a、54b、54c和54d。在一个实施方案(未示出)中，通道54a、54b、54c和54d可以形成在导电层中，而不是介电层52中。
粘合材料34和36与介电层52相邻提供，通常在介电层52周围延伸，除了提供在连接器区域20a、20b、20c和20d中的部分介电层52。
图4中所示为由多层板16a和16b、第一和第二金属箔30和32以及粘合材料34、36和38形成的层叠体60。随后对层叠体60施加一定的条件，使得粘合材料34、36和38将第一和第二金属箔30和32以及多层板16a和16b粘合在一起，基本如图5中所示。例如，当粘合材料34、36和38由半固化片构成时，对层叠体60施加热和压力以形成适合于最后加工的刚性多层62。
在另一实施方案中，可以生产刚性多层62a，如图6中所示。所述刚性多层62a与刚性多层62相似，只是其移除了导电层50并增加了电连接器40a。刚性多层62a易于进行标准精加工。例如，可以利用钻、镀、形成外层图案和表面精加工来完成刚性多层62a。
如图7中所示，刚性多层62可以众所周知的方式形成其轮廓，但是首先，连接器区域22a、22b、22c是开放的，以允许通过切削或移除与通道54a-d相邻的材料来插入连接器22a-b。如本领域技术人员将会了解到的，深度的公差不是关键性的，因为在形成刚性多层62之前，第一和第二金属箔30和32预先形成有通道54a-d。在一个实施方案中，连接器区域22a-d利用曲面的深度可控刮刨来暴露。
然后可以众所周知的方式使用中间板10。也就是说，具有压入配合连接器26的连接器22利用穿过刚性多层62中的孔42和48来插入压入配合连接器26从而穿过刚性多层而连接。中间板的用途是本领域公知的，考虑到本文中所包含的其它详细说明，相信不需要更多的语言来教导本领域的技术人员如何使用中间板10。
应该理解，前文提出了本发明的实施例。因此，在不背离如所附权利要求所限定的本发明精神和范围的情况下，可以对本文所述的各种部件、元件和组件的构造和操作进行改变，也可以对本文所述方法的步骤和步骤顺序进行改变。

Claims (17)

1.制造中间板的方法，其包括以下步骤：
提供具有连接组件的多层板；
提供包含第一面和第二面的层，所述层的所述第一面具有通道，所述通道形成于所述层中以限定连接器区域周界；
将所述层的所述第一面粘合至所述多层板，使得连接器区域与多层板的连接组件重叠；和
移除所述层中的至少一部分连接器区域，以暴露多层板的连接组件。
2.权利要求1的方法，其中所述层粘合至所述多层板，使得在所述层和所述多层板的连接组件之间形成空隙。
3.权利要求1的方法，其中所述层的所述第二面粘合至导电层，以形成金属箔。
4.权利要求3的方法，其中所述金属箔是单面覆铜箔层压板，由此导电层由铜形成，并且所述层贴附于铜导电层的唯一一个面上。
5.权利要求1的方法，其中移除至少一部分连接器区域的步骤还限定为通过沿所述通道进行深度可控刮刨来移除连接器区域。
6.权利要求1的方法，其中在将所述层粘合至所述多层板的步骤之前，所述多层板涂覆有表面覆盖层。
7.制造中间板的方法，其包括以下步骤：
提供第一和第二多层板，每个多层板均具有连接组件；
提供第一和第二层；
所述第一层包含第一面和第二面，所述第一层的所述第一面具有形成于其中以限定连接器区域周界的通道；
所述第二层包含第一面和第二面，所述第二层的所述第一面具有形成于其中以限定连接器区域周界的通道；
将所述第一层的所述第一面粘合至所述第一多层板，使得连接器区域与所述第一多层板的所述连接组件重叠；
将所述第二层的所述第一面粘合至所述第二多层板，使得所述连接器区域与所述第二多层板的所述连接组件重叠；
将多层板粘合在一起，以形成刚性多层，其中第一层置于刚性多层的一面上，第二层置于刚性多层的反面上；和
移除第一和第二层中的至少一部分连接器区域，以暴露相应的连接组件。
8.权利要求7的方法，其中每一所述层粘合至所述层各自的多层板，使得在所述层和所述多层板的连接组件之间形成空隙。
9.权利要求7的方法，其中所述层中的一个或多个粘合至导电层，以形成金属箔。
10.权利要求9的方法，其中金属箔是单面覆铜箔层压板，由此导电层由铜形成，并且所述层贴附于铜层的唯一一个面上。
11.权利要求7的方法，其中移除至少一部分连接器区域的步骤还限定为通过沿通道进行的深度可控刮刨来移除连接器区域。
12.权利要求7的方法，其中在将所述层粘合至所述多层板的步骤之前，所述多层板涂覆有表面覆盖层。
13.刚性多层，其包括：
具有连接组件的多层板；
具有通道的层，所述通道形成于所述层中以限定连接器区域周界，所述层粘合至所述多层板，使得连接器区域与多层板的连接组件重叠。
14.权利要求13的刚性多层，其中所述层具有通道形成于其中的第一面，并且其中所述层的第一面面对所述多层板。
15.权利要求13的刚性多层，其中所述层的连接器区域与多层板间隔一定距离。
16.权利要求13的刚性多层，其还包括在所述层上方延伸的导电层，使得所述层位于导电层和多层板之间。
17.权利要求13的刚性多层，其中通过在所述连接器区域的至少部分中的开口暴露所述多层板的连接组件。
CNB2004800194092A 2003-07-08 2004-07-08 中间板的制造方法 Expired - Fee Related CN100475012C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US48576503P 2003-07-08 2003-07-08
US60/485,765 2003-07-08

Publications (2)

Publication Number Publication Date
CN1820557A CN1820557A (zh) 2006-08-16
CN100475012C true CN100475012C (zh) 2009-04-01

Family

ID=33564053

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004800194092A Expired - Fee Related CN100475012C (zh) 2003-07-08 2004-07-08 中间板的制造方法

Country Status (10)

Country Link
US (2) US20060278430A1 (zh)
EP (1) EP1647170B1 (zh)
JP (1) JP2007516593A (zh)
CN (1) CN100475012C (zh)
AT (1) ATE358411T1 (zh)
AU (1) AU2004300569A1 (zh)
DE (1) DE602004005598T2 (zh)
ES (1) ES2284031T3 (zh)
PL (1) PL1647170T3 (zh)
WO (1) WO2005004570A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107926119A (zh) * 2015-08-12 2018-04-17 施韦策电子公司 具有层叠的内层基底的导体结构元件和其制造方法
CN110140430A (zh) * 2016-04-29 2019-08-16 阿瑞斯塔网络公司 用于印刷电路板的连接器

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100665298B1 (ko) * 2004-06-10 2007-01-04 서울반도체 주식회사 발광장치
FR3034219B1 (fr) 2015-03-23 2018-04-06 Safran Electronics & Defense Carte electronique de fond de panier et calculateur electronique associe
DE102015113322B3 (de) * 2015-08-12 2016-11-17 Schweizer Electronic Ag Hochfrequenzantenne, Hochfrequenzsubstrat mit Hochfrequenzantenne und Verfahren zur Herstellung
FR3091136B1 (fr) 2018-12-21 2022-01-21 Safran Electronics & Defense procédé de fabrication d'une carte électronique de fond de panier

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3756891A (en) * 1967-12-26 1973-09-04 Multilayer circuit board techniques
US3610811A (en) * 1969-06-02 1971-10-05 Honeywell Inf Systems Printed circuit board with solder resist gas escape ports
US4030190A (en) 1976-03-30 1977-06-21 International Business Machines Corporation Method for forming a multilayer printed circuit board
GB2101411B (en) 1981-06-04 1985-06-05 Standard Telephones Cables Ltd Flexi-rigid printed circuit boards
US4478469A (en) * 1982-05-17 1984-10-23 Zero Corporation Card keying device
US4686607A (en) * 1986-01-08 1987-08-11 Teradyne, Inc. Daughter board/backplane assembly
US4943334A (en) 1986-09-15 1990-07-24 Compositech Ltd. Method for making reinforced plastic laminates for use in the production of circuit boards
US5023754A (en) 1990-01-19 1991-06-11 International Business Machines Corporation Double-sided backplane assembly
TW210422B (zh) 1991-06-04 1993-08-01 Akzo Nv
US5677515A (en) * 1991-10-18 1997-10-14 Trw Inc. Shielded multilayer printed wiring board, high frequency, high isolation
US5199879A (en) * 1992-02-24 1993-04-06 International Business Machines Corporation Electrical assembly with flexible circuit
US5573172A (en) * 1993-11-08 1996-11-12 Sawtek, Inc. Surface mount stress relief hidden lead package device and method
US5400220A (en) 1994-05-18 1995-03-21 Dell Usa, L.P. Mechanical printed circuit board and ball grid array interconnect apparatus
US6016598A (en) 1995-02-13 2000-01-25 Akzo Nobel N.V. Method of manufacturing a multilayer printed wire board
US5826329A (en) * 1995-12-19 1998-10-27 Ncr Corporation Method of making printed circuit board using thermal transfer techniques
US5784260A (en) * 1996-05-29 1998-07-21 International Business Machines Corporation Structure for constraining the flow of encapsulant applied to an I/C chip on a substrate
SE509938C2 (sv) * 1996-07-09 1999-03-29 Ericsson Telefon Ab L M Förfarande och anordning vid mönsterkort
US6135781A (en) 1996-07-17 2000-10-24 Minnesota Mining And Manufacturing Company Electrical interconnection system and device
DE19957789A1 (de) * 1999-12-01 2001-06-21 Leoni Bordnetz Sys Gmbh & Co Kontaktierungssystem für zwei Leiterplatten
KR100333627B1 (ko) * 2000-04-11 2002-04-22 구자홍 다층 인쇄회로기판 및 그 제조방법
US6499214B2 (en) * 2000-05-26 2002-12-31 Visteon Global Tech, Inc. Method of making a circuit board
US6201305B1 (en) * 2000-06-09 2001-03-13 Amkor Technology, Inc. Making solder ball mounting pads on substrates
US6528737B1 (en) * 2000-08-16 2003-03-04 Nortel Networks Limited Midplane configuration featuring surface contact connectors
US6538899B1 (en) 2001-01-02 2003-03-25 Juniper Networks, Inc. Traceless midplane
US6535397B2 (en) * 2001-05-31 2003-03-18 Harris Corporation Interconnect structure for interconnecting electronic modules
US6608762B2 (en) * 2001-06-01 2003-08-19 Hyperchip Inc. Midplane for data processing apparatus
US6456498B1 (en) * 2001-08-07 2002-09-24 Hewlett-Packard Co. CompactPCI-based computer system with mid-plane connector for equivalent front and back loading
US20040108137A1 (en) 2002-12-10 2004-06-10 Litton Systems, Inc. Cross connect via for multilayer printed circuit boards

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107926119A (zh) * 2015-08-12 2018-04-17 施韦策电子公司 具有层叠的内层基底的导体结构元件和其制造方法
CN107926119B (zh) * 2015-08-12 2021-04-09 施韦策电子公司 具有层叠的内层基底的导体结构元件和其制造方法
CN110140430A (zh) * 2016-04-29 2019-08-16 阿瑞斯塔网络公司 用于印刷电路板的连接器

Also Published As

Publication number Publication date
US20050109532A1 (en) 2005-05-26
PL1647170T3 (pl) 2007-08-31
CN1820557A (zh) 2006-08-16
WO2005004570A1 (en) 2005-01-13
EP1647170A1 (en) 2006-04-19
ES2284031T3 (es) 2007-11-01
EP1647170B1 (en) 2007-03-28
AU2004300569A1 (en) 2005-01-13
DE602004005598D1 (de) 2007-05-10
DE602004005598T2 (de) 2008-01-24
US7172805B2 (en) 2007-02-06
JP2007516593A (ja) 2007-06-21
ATE358411T1 (de) 2007-04-15
US20060278430A1 (en) 2006-12-14

Similar Documents

Publication Publication Date Title
US7235148B2 (en) Selectively roughening conductors for high frequency printed wiring boards
US8042445B2 (en) Cutting mold for rigid-flexible circuit board and method for forming the same
US20170265298A1 (en) Self-decap cavity fabrication process and structure
JPH07506218A (ja) 高密度導体ネットワーク並びにその製造方法と製造装置
US10064292B2 (en) Recessed cavity in printed circuit board protected by LPI
JP4246615B2 (ja) フレックスリジッドプリント配線板及びその製造方法
US10292279B2 (en) Disconnect cavity by plating resist process and structure
CN100475012C (zh) 中间板的制造方法
EP1180921A3 (en) Multi-layer circuit board and method of manufacturing the same
CN101998766B (zh) 软硬复合板的制作方法
US20170238416A1 (en) Dummy core restrict resin process and structure
US6846993B2 (en) Multilayer printed wiring board and its manufacturing method
JP2008300658A (ja) フレキシブルリジッド多層プリント配線板およびその製造方法
TWI417002B (zh) 線路板及其製作方法
JPH08288660A (ja) 多層メタルコアプリント配線板
GB2101411A (en) Flexi-rigid printed circuit boards
CN113301716B (zh) 一种带异型孔的多层pcb板及加工方法
CN112243319B (zh) 柔性电路板的制作方法及柔性电路板
KR102309827B1 (ko) 다층 인쇄회로기판 제조 방법 및 이에 의해 제조된 다층 인쇄회로기판
JP2000294920A (ja) 多層フレックスリジッド配線板の製造方法と打抜き金型
KR102138555B1 (ko) 블록 구분 슬롯이 형성된 회로기판의 커버레이
US20030077851A1 (en) Process for making surface mountable electrical devices
JPH0870183A (ja) 多層プリント配線板の製造方法
JPH0471285A (ja) メタルコアプリント配線板の外形加工方法
JPH08264952A (ja) 多層プリント配線基板

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
REG Reference to a national code

Ref country code: HK

Ref legal event code: DE

Ref document number: 1093844

Country of ref document: HK

C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090401

Termination date: 20100708

REG Reference to a national code

Ref country code: HK

Ref legal event code: WD

Ref document number: 1093844

Country of ref document: HK