CH573663A5 - - Google Patents

Info

Publication number
CH573663A5
CH573663A5 CH903374A CH903374A CH573663A5 CH 573663 A5 CH573663 A5 CH 573663A5 CH 903374 A CH903374 A CH 903374A CH 903374 A CH903374 A CH 903374A CH 573663 A5 CH573663 A5 CH 573663A5
Authority
CH
Switzerland
Prior art keywords
sep
ester
radical
hydrogen peroxide
bleaching
Prior art date
Application number
CH903374A
Other languages
German (de)
English (en)
Original Assignee
Bbc Brown Boveri & Cie
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bbc Brown Boveri & Cie filed Critical Bbc Brown Boveri & Cie
Priority to CH903374A priority Critical patent/CH573663A5/de
Priority to DE19747428330U priority patent/DE7428330U/de
Priority to DE2440080A priority patent/DE2440080A1/de
Publication of CH573663A5 publication Critical patent/CH573663A5/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/10—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP]
    • H10P72/12—Vertical boat type carrier whereby the substrates are horizontally supported, e.g. comprising rod-shaped elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/104—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices having particular shapes of the bodies at or near reverse-biased junctions, e.g. having bevels or moats
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/692—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their composition, e.g. multilayer masks or materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/10—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP]
    • H10P72/12—Vertical boat type carrier whereby the substrates are horizontally supported, e.g. comprising rod-shaped elements
    • H10P72/123—Vertical boat type carrier whereby the substrates are horizontally supported, e.g. comprising rod-shaped elements characterised by a material, a roughness, a coating or the like

Landscapes

  • Weting (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Detergent Compositions (AREA)
CH903374A 1974-07-02 1974-07-02 CH573663A5 (enExample)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CH903374A CH573663A5 (enExample) 1974-07-02 1974-07-02
DE19747428330U DE7428330U (de) 1974-07-02 1974-08-21 Vorrichtung zur aetzung von halbleiteraktivteilen
DE2440080A DE2440080A1 (de) 1974-07-02 1974-08-21 Verfahren zur aetzung von halbleiteraktivteilen und vorrichtung zur ausfuehrung des verfahrens

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH903374A CH573663A5 (enExample) 1974-07-02 1974-07-02

Publications (1)

Publication Number Publication Date
CH573663A5 true CH573663A5 (enExample) 1976-03-15

Family

ID=4347579

Family Applications (1)

Application Number Title Priority Date Filing Date
CH903374A CH573663A5 (enExample) 1974-07-02 1974-07-02

Country Status (2)

Country Link
CH (1) CH573663A5 (enExample)
DE (2) DE2440080A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3743044A1 (de) * 1987-12-18 1989-06-29 Semikron Elektronik Gmbh Verfahren zum herstellen von halbleiterbauelementen

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4595480A (en) * 1985-09-26 1986-06-17 National Semiconductor Corporation System for electroplating molded semiconductor devices
DE102023112827A1 (de) * 2023-05-16 2024-11-21 Singulus Technologies Aktiengesellschaft Carrier für die Kantenpassivierung

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3743044A1 (de) * 1987-12-18 1989-06-29 Semikron Elektronik Gmbh Verfahren zum herstellen von halbleiterbauelementen

Also Published As

Publication number Publication date
DE2440080A1 (de) 1976-01-22
DE7428330U (de) 1976-05-06

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Legal Events

Date Code Title Description
PL Patent ceased