BR112015029869A2 - gerenciamento de energia em conjuntos de matrizes múltiplas - Google Patents
gerenciamento de energia em conjuntos de matrizes múltiplasInfo
- Publication number
- BR112015029869A2 BR112015029869A2 BR112015029869A BR112015029869A BR112015029869A2 BR 112015029869 A2 BR112015029869 A2 BR 112015029869A2 BR 112015029869 A BR112015029869 A BR 112015029869A BR 112015029869 A BR112015029869 A BR 112015029869A BR 112015029869 A2 BR112015029869 A2 BR 112015029869A2
- Authority
- BR
- Brazil
- Prior art keywords
- matrix
- inductive element
- voltage
- power management
- control circuitry
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F38/00—Adaptations of transformers or inductances for specific applications or functions
- H01F38/14—Inductive couplings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
- H02J50/10—Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/618—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series and in parallel with the load as final control devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
- H01L2924/19104—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device on the semiconductor or solid-state device, i.e. passive-on-chip
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Networks & Wireless Communication (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
- Power Sources (AREA)
- Semiconductor Memories (AREA)
- Dc-Dc Converters (AREA)
- Power Conversion In General (AREA)
Abstract
resumo patente de invenção: "gerenciamento de energia em conjuntos de matrizes múltiplas". a presente invenção refere-se a um aparelho tal como um dispositivo heterogêneo que inclui pelo menos uma primeira matriz e uma segunda matriz. o aparelho inclui adicionalmente um primeiro elemento indutivo, um segundo elemento indutivo e conjunto de circuitos de controle de comutador. o conjunto de circuitos de controle de comutador é disposto na primeira matriz. o conjunto de circuitos de controle de comutador controla a corrente através do primeiro elemento indutivo para produzir uma primeira tensão. a primeira tensão energiza a primeira matriz. o segundo elemento indutivo é acoplado ao primeiro elemento indutivo. o segundo elemento indutivo produz uma segunda tensão para energizar a segunda matriz. a primeira matriz e a segunda matriz podem ser fabricadas em concordância com tecnologias diferentes e nas quais a primeira matriz e a segunda matriz resistem a tensões máximas diferentes. uma magnitude da primeira tensão pode ser maior do que uma magnitude da segunda tensão.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/927,227 | 2013-06-26 | ||
US13/927,227 US9391453B2 (en) | 2013-06-26 | 2013-06-26 | Power management in multi-die assemblies |
PCT/US2014/042830 WO2014209693A1 (en) | 2013-06-26 | 2014-06-18 | Power management in multi-die assemblies |
Publications (2)
Publication Number | Publication Date |
---|---|
BR112015029869A2 true BR112015029869A2 (pt) | 2017-07-25 |
BR112015029869B1 BR112015029869B1 (pt) | 2022-05-31 |
Family
ID=52115475
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112015029869-9A BR112015029869B1 (pt) | 2013-06-26 | 2014-06-18 | Aparelho e método para gerenciamento de energia em um conjunto de múltiplas matrizes e sistema de computador |
Country Status (8)
Country | Link |
---|---|
US (2) | US9391453B2 (pt) |
EP (1) | EP3014742B1 (pt) |
JP (2) | JP6195985B2 (pt) |
KR (1) | KR101860624B1 (pt) |
CN (1) | CN105264743B (pt) |
BR (1) | BR112015029869B1 (pt) |
RU (1) | RU2639302C2 (pt) |
WO (1) | WO2014209693A1 (pt) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
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US9230940B2 (en) * | 2013-09-13 | 2016-01-05 | Globalfoundries Inc. | Three-dimensional chip stack for self-powered integrated circuit |
US9298201B2 (en) * | 2013-12-18 | 2016-03-29 | International Business Machines Corporation | Power delivery to three-dimensional chips |
US9875787B2 (en) | 2015-12-08 | 2018-01-23 | Rambus Inc. | Reduced transport energy in a memory system |
WO2017138691A1 (ko) * | 2016-02-12 | 2017-08-17 | 주식회사 맵스 | 무선통신장치를 보호하기 위한 장치 및 이를 포함하는 무선통신장치 |
KR101816242B1 (ko) | 2016-02-12 | 2018-01-08 | 주식회사 맵스 | 무선통신장치를 보호하기 위한 장치 및 이를 포함하는 무선통신장치 |
KR102482896B1 (ko) | 2017-12-28 | 2022-12-30 | 삼성전자주식회사 | 이종 휘발성 메모리 칩들을 포함하는 메모리 장치 및 이를 포함하는 전자 장치 |
US10446254B1 (en) * | 2018-05-03 | 2019-10-15 | Western Digital Technologies, Inc. | Method for maximizing power efficiency in memory interface block |
US11710720B2 (en) | 2018-06-28 | 2023-07-25 | Intel Corporation | Integrated multi-die partitioned voltage regulator |
CN111355309B (zh) * | 2020-03-12 | 2022-04-22 | 宁波大学 | 一种基于硅通孔电感器的无线功率传输电路 |
US11561597B2 (en) | 2020-12-02 | 2023-01-24 | Micron Technology, Inc. | Memory device power management |
US11429292B2 (en) * | 2020-12-02 | 2022-08-30 | Micron Technology, Inc. | Power management for a memory device |
JP2022144032A (ja) | 2021-03-18 | 2022-10-03 | キオクシア株式会社 | 半導体記憶装置 |
US11721385B2 (en) | 2021-08-12 | 2023-08-08 | Micron Technology, Inc. | Dynamic power distribution for stacked memory |
WO2023223126A1 (ja) * | 2022-05-16 | 2023-11-23 | 株式会社半導体エネルギー研究所 | 半導体装置 |
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JPH01218052A (ja) * | 1988-02-26 | 1989-08-31 | Nec Corp | Lsiパッケージ |
US5721506A (en) * | 1994-12-14 | 1998-02-24 | Micron Technology, Inc. | Efficient Vccp supply with regulation for voltage control |
US6694438B1 (en) * | 1999-07-02 | 2004-02-17 | Advanced Energy Industries, Inc. | System for controlling the delivery of power to DC computer components |
US6545450B1 (en) | 1999-07-02 | 2003-04-08 | Advanced Energy Industries, Inc. | Multiple power converter system using combining transformers |
US6975098B2 (en) * | 2002-01-31 | 2005-12-13 | Vlt, Inc. | Factorized power architecture with point of load sine amplitude converters |
WO2004025730A1 (ja) * | 2002-08-09 | 2004-03-25 | Renesas Technology Corp. | 半導体装置およびそれを用いたメモリカード |
JP2004096921A (ja) * | 2002-09-02 | 2004-03-25 | Chinon Ind Inc | 電源装置およびカメラ |
JP3427935B1 (ja) * | 2002-10-11 | 2003-07-22 | ローム株式会社 | スイッチング電源装置 |
JP2004274935A (ja) * | 2003-03-11 | 2004-09-30 | Denso Corp | 多出力dcチョッパ回路 |
JP2007116013A (ja) | 2005-10-24 | 2007-05-10 | Renesas Technology Corp | 半導体装置及びそれを用いた電源装置 |
US8120958B2 (en) * | 2007-12-24 | 2012-02-21 | Qimonda Ag | Multi-die memory, apparatus and multi-die memory stack |
RU2398279C2 (ru) * | 2008-05-15 | 2010-08-27 | Владимир Васильевич Леонтьев | Устройство накопления и обработки информации (унои) |
CN102187400A (zh) * | 2008-10-20 | 2011-09-14 | 国立大学法人东京大学 | 集成电路装置 |
KR101332228B1 (ko) | 2008-12-26 | 2013-11-25 | 메키트 에퀴지션 코포레이션 | 전력 관리 집적 회로들을 갖는 칩 패키지들 및 관련 기술들 |
US7894230B2 (en) * | 2009-02-24 | 2011-02-22 | Mosaid Technologies Incorporated | Stacked semiconductor devices including a master device |
KR20110052133A (ko) * | 2009-11-12 | 2011-05-18 | 주식회사 하이닉스반도체 | 반도체 장치 |
US8276002B2 (en) * | 2009-11-23 | 2012-09-25 | International Business Machines Corporation | Power delivery in a heterogeneous 3-D stacked apparatus |
KR101212722B1 (ko) | 2010-02-26 | 2013-01-09 | 에스케이하이닉스 주식회사 | 멀티 칩 패키지 |
WO2012078682A1 (en) * | 2010-12-06 | 2012-06-14 | Semtech Corporation | Flyback primary side output voltage sensing system and method |
US9160346B2 (en) | 2011-03-15 | 2015-10-13 | Rambus Inc. | Area and power efficient clock generation |
KR20120108474A (ko) * | 2011-03-24 | 2012-10-05 | 에스케이하이닉스 주식회사 | 반도체 장치 |
US8547769B2 (en) * | 2011-03-31 | 2013-10-01 | Intel Corporation | Energy efficient power distribution for 3D integrated circuit stack |
US8913443B2 (en) * | 2011-09-19 | 2014-12-16 | Conversant Intellectual Property Management Inc. | Voltage regulation for 3D packages and method of manufacturing same |
KR101678751B1 (ko) | 2011-12-23 | 2016-11-23 | 인텔 코포레이션 | 스택 메모리 아키텍처의 별개의 마이크로채널 전압 도메인들 |
WO2013101249A1 (en) * | 2011-12-31 | 2013-07-04 | Intel Corporation | Fully integrated voltage regulators for multi-stack integrated circuit architectures |
US8964412B2 (en) * | 2012-10-31 | 2015-02-24 | Power Integrations, Inc. | Split current mirror line sensing |
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-
2013
- 2013-06-26 US US13/927,227 patent/US9391453B2/en active Active
-
2014
- 2014-06-18 RU RU2015150798A patent/RU2639302C2/ru active
- 2014-06-18 BR BR112015029869-9A patent/BR112015029869B1/pt active IP Right Grant
- 2014-06-18 WO PCT/US2014/042830 patent/WO2014209693A1/en active Application Filing
- 2014-06-18 KR KR1020157031496A patent/KR101860624B1/ko active IP Right Grant
- 2014-06-18 EP EP14818632.3A patent/EP3014742B1/en active Active
- 2014-06-18 JP JP2016521526A patent/JP6195985B2/ja active Active
- 2014-06-18 CN CN201480030419.XA patent/CN105264743B/zh not_active Expired - Fee Related
-
2016
- 2016-07-11 US US15/206,999 patent/US10079489B2/en active Active
-
2017
- 2017-08-16 JP JP2017157187A patent/JP6430600B2/ja active Active
Also Published As
Publication number | Publication date |
---|---|
JP6430600B2 (ja) | 2018-11-28 |
KR101860624B1 (ko) | 2018-05-23 |
RU2015150798A (ru) | 2017-05-31 |
CN105264743B (zh) | 2018-11-16 |
US20150003181A1 (en) | 2015-01-01 |
KR20150138349A (ko) | 2015-12-09 |
JP6195985B2 (ja) | 2017-09-13 |
US10079489B2 (en) | 2018-09-18 |
JP2018032855A (ja) | 2018-03-01 |
BR112015029869B1 (pt) | 2022-05-31 |
EP3014742A1 (en) | 2016-05-04 |
EP3014742B1 (en) | 2020-08-05 |
WO2014209693A1 (en) | 2014-12-31 |
US20170011779A1 (en) | 2017-01-12 |
JP2016528719A (ja) | 2016-09-15 |
CN105264743A (zh) | 2016-01-20 |
RU2639302C2 (ru) | 2017-12-21 |
US9391453B2 (en) | 2016-07-12 |
EP3014742A4 (en) | 2017-03-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B06F | Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette] | ||
B06U | Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette] | ||
B350 | Update of information on the portal [chapter 15.35 patent gazette] | ||
B06A | Patent application procedure suspended [chapter 6.1 patent gazette] | ||
B09A | Decision: intention to grant [chapter 9.1 patent gazette] | ||
B16A | Patent or certificate of addition of invention granted [chapter 16.1 patent gazette] |
Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 18/06/2014, OBSERVADAS AS CONDICOES LEGAIS |