BR112015030435A2 - temporizadores por processador virtuais para sistemas de processador múltiplo - Google Patents

temporizadores por processador virtuais para sistemas de processador múltiplo

Info

Publication number
BR112015030435A2
BR112015030435A2 BR112015030435A BR112015030435A BR112015030435A2 BR 112015030435 A2 BR112015030435 A2 BR 112015030435A2 BR 112015030435 A BR112015030435 A BR 112015030435A BR 112015030435 A BR112015030435 A BR 112015030435A BR 112015030435 A2 BR112015030435 A2 BR 112015030435A2
Authority
BR
Brazil
Prior art keywords
processor
timer
timers
virtual
virtual processor
Prior art date
Application number
BR112015030435A
Other languages
English (en)
Other versions
BR112015030435A8 (pt
Inventor
Sherwin Bruce
Hartwig Cody
Wohlgemuth Jason
Original Assignee
Microsoft Technology Licensing Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Technology Licensing Llc filed Critical Microsoft Technology Licensing Llc
Publication of BR112015030435A2 publication Critical patent/BR112015030435A2/pt
Publication of BR112015030435A8 publication Critical patent/BR112015030435A8/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3243—Power saving in microcontroller unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4825—Interrupt from clock, e.g. time of day
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5077—Logical partitioning of resources; Management or configuration of virtualized resources
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4418—Suspend and resume; Hibernate and awake
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)

Abstract

resumo patente de invenção: "temporizadores por processador virtuais para sistemas de processador múltiplo". a presente invenção refere-se a um sistema que provê temporizadores por processador virtuais com base em um temporizador, tal como um temporizador de plataforma. para virtualizar um temporizador para ser usado por meio de cada processador independentemente, uma estrutura de dados é mantida na memória pelo temporizador, a estrutura de dados tem uma entrada para cada interrupção a ser produzida para cada processador usando-se o temporizador, a especificação do processador e do tempo devido, com as entradas classificadas pelo tempo devido. se o temporizador virtualizado for um temporizador de plataforma que mantém um contexto durante transições de potência, um processador poderá comutar para o temporizador por processador virtual mediante uma transição de potência com perda de contexto.
BR112015030435A 2013-06-13 2013-09-18 computador, artigo de fabricação e processo para proporcionar temporizadores por processador virtuais para sistemas de processador múltiplo BR112015030435A8 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/916,621 US10534421B2 (en) 2013-06-13 2013-06-13 Virtual per-processor timers for multiprocessor systems
PCT/US2013/060242 WO2014200520A1 (en) 2013-06-13 2013-09-18 Virtual per processor timers for multiprocessor systems

Publications (2)

Publication Number Publication Date
BR112015030435A2 true BR112015030435A2 (pt) 2017-07-25
BR112015030435A8 BR112015030435A8 (pt) 2019-12-24

Family

ID=49447795

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112015030435A BR112015030435A8 (pt) 2013-06-13 2013-09-18 computador, artigo de fabricação e processo para proporcionar temporizadores por processador virtuais para sistemas de processador múltiplo

Country Status (6)

Country Link
US (1) US10534421B2 (pt)
EP (1) EP3008544B1 (pt)
CN (1) CN105474127B (pt)
BR (1) BR112015030435A8 (pt)
ES (1) ES2757173T3 (pt)
WO (1) WO2014200520A1 (pt)

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US9703951B2 (en) 2014-09-30 2017-07-11 Amazon Technologies, Inc. Allocation of shared system resources
US9378363B1 (en) * 2014-10-08 2016-06-28 Amazon Technologies, Inc. Noise injected virtual timer
US9754103B1 (en) 2014-10-08 2017-09-05 Amazon Technologies, Inc. Micro-architecturally delayed timer
US9491112B1 (en) 2014-12-10 2016-11-08 Amazon Technologies, Inc. Allocating processor resources based on a task identifier
US9864636B1 (en) 2014-12-10 2018-01-09 Amazon Technologies, Inc. Allocating processor resources based on a service-level agreement
CN105700961B (zh) 2016-02-29 2019-03-08 华为技术有限公司 业务容器创建方法及装置
US10664311B1 (en) * 2017-01-31 2020-05-26 Parallels International Gmbh Timer object management for a multiprocessor virtual environment
US10496572B1 (en) 2017-03-06 2019-12-03 Apple Inc. Intracluster and intercluster interprocessor interrupts including a retract interrupt that causes a previous interrupt to be canceled
CN109952560B (zh) * 2017-10-20 2022-12-23 深圳市汇顶科技股份有限公司 虚拟定时器的定时方法及其装置、电子装置
CN108376059B (zh) * 2018-02-12 2021-06-25 山东师范大学 一种通用计算机语音开机唤醒装置
CN112559117B (zh) 2019-09-25 2024-06-07 阿里巴巴集团控股有限公司 定时器处理方法、装置、电子设备及计算机存储介质

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US6205509B1 (en) * 1999-07-15 2001-03-20 3Com Corporation Method for improving interrupt response time
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US7610473B2 (en) 2003-08-28 2009-10-27 Mips Technologies, Inc. Apparatus, method, and instruction for initiation of concurrent instruction streams in a multithreading microprocessor
US7574709B2 (en) 2004-04-30 2009-08-11 Microsoft Corporation VEX-virtual extension framework
US7461173B2 (en) * 2004-06-30 2008-12-02 Intel Corporation Distributing timers across processors
US7383460B2 (en) 2005-03-25 2008-06-03 Microsoft Corporation Method and system for configuring a timer
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US7886177B2 (en) * 2006-12-27 2011-02-08 Intel Corporation Method and apparatus of collecting timer ticks
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JP2008171293A (ja) * 2007-01-15 2008-07-24 Hitachi Ltd 仮想計算機システムのスケジューリング方法
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Also Published As

Publication number Publication date
EP3008544B1 (en) 2019-10-23
ES2757173T3 (es) 2020-04-28
BR112015030435A8 (pt) 2019-12-24
CN105474127A (zh) 2016-04-06
WO2014200520A1 (en) 2014-12-18
US10534421B2 (en) 2020-01-14
EP3008544A1 (en) 2016-04-20
US20140372786A1 (en) 2014-12-18
CN105474127B (zh) 2018-12-11

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B11B Dismissal acc. art. 36, par 1 of ipl - no reply within 90 days to fullfil the necessary requirements
B350 Update of information on the portal [chapter 15.35 patent gazette]