AU2001265321A1 - Apparatus and circuit having reduced leakage current and method therefor - Google Patents

Apparatus and circuit having reduced leakage current and method therefor

Info

Publication number
AU2001265321A1
AU2001265321A1 AU2001265321A AU6532101A AU2001265321A1 AU 2001265321 A1 AU2001265321 A1 AU 2001265321A1 AU 2001265321 A AU2001265321 A AU 2001265321A AU 6532101 A AU6532101 A AU 6532101A AU 2001265321 A1 AU2001265321 A1 AU 2001265321A1
Authority
AU
Australia
Prior art keywords
circuit
leakage current
method therefor
reduced leakage
reduced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001265321A
Other languages
English (en)
Inventor
Lawrence Clark
Kimberley Velarde
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU2001265321A1 publication Critical patent/AU2001265321A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
AU2001265321A 2000-06-12 2001-06-01 Apparatus and circuit having reduced leakage current and method therefor Abandoned AU2001265321A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US59186500A 2000-06-12 2000-06-12
US09/591,865 2000-06-12
PCT/US2001/017839 WO2001097380A1 (en) 2000-06-12 2001-06-01 Apparatus and circuit having reduced leakage current and method therefor

Publications (1)

Publication Number Publication Date
AU2001265321A1 true AU2001265321A1 (en) 2001-12-24

Family

ID=24368271

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001265321A Abandoned AU2001265321A1 (en) 2000-06-12 2001-06-01 Apparatus and circuit having reduced leakage current and method therefor

Country Status (6)

Country Link
JP (2) JP2004503948A (ko)
KR (1) KR100551143B1 (ko)
CN (1) CN1236560C (ko)
AU (1) AU2001265321A1 (ko)
TW (1) TW501278B (ko)
WO (1) WO2001097380A1 (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003031681A (ja) * 2001-07-16 2003-01-31 Matsushita Electric Ind Co Ltd 半導体集積回路
US6731157B2 (en) * 2002-01-15 2004-05-04 Honeywell International Inc. Adaptive threshold voltage control with positive body bias for N and P-channel transistors
CN108986748B (zh) * 2018-08-02 2021-08-27 京东方科技集团股份有限公司 一种消除驱动晶体管漏电流的方法及系统、显示装置
JP2021101512A (ja) 2019-12-24 2021-07-08 キオクシア株式会社 半導体集積回路

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3184265B2 (ja) * 1991-10-17 2001-07-09 株式会社日立製作所 半導体集積回路装置およびその制御方法
KR0169157B1 (ko) * 1993-11-29 1999-02-01 기다오까 다까시 반도체 회로 및 mos-dram
JPH07176624A (ja) * 1993-12-20 1995-07-14 Nippon Telegr & Teleph Corp <Ntt> 相補性ｍｏｓ型電界効果トランジスタ集積回路
KR100223770B1 (ko) * 1996-06-29 1999-10-15 김영환 반도체 장치의 문턱전압 제어회로
US5883544A (en) * 1996-12-03 1999-03-16 Stmicroelectronics, Inc. Integrated circuit actively biasing the threshold voltage of transistors and related methods
JPH10229165A (ja) * 1997-02-17 1998-08-25 Ricoh Co Ltd 半導体集積回路装置
JP3732914B2 (ja) * 1997-02-28 2006-01-11 株式会社ルネサステクノロジ 半導体装置
JPH10261946A (ja) * 1997-03-19 1998-09-29 Mitsubishi Electric Corp 半導体集積回路
JP4046383B2 (ja) * 1997-04-01 2008-02-13 株式会社ルネサステクノロジ 半導体集積回路装置
JP3737240B2 (ja) * 1997-04-24 2006-01-18 富士通株式会社 半導体集積回路装置
US5929695A (en) * 1997-06-02 1999-07-27 Stmicroelectronics, Inc. Integrated circuit having selective bias of transistors for low voltage and low standby current and related methods
AU7970898A (en) * 1997-06-20 1999-01-04 Intel Corporation Forward body bias transistor circuits
JP3814385B2 (ja) * 1997-10-14 2006-08-30 株式会社ルネサステクノロジ 半導体集積回路装置
JP2000155617A (ja) * 1998-11-19 2000-06-06 Mitsubishi Electric Corp 内部電圧発生回路

Also Published As

Publication number Publication date
CN1236560C (zh) 2006-01-11
JP2004503948A (ja) 2004-02-05
WO2001097380A1 (en) 2001-12-20
JP2009207178A (ja) 2009-09-10
KR20030022816A (ko) 2003-03-17
CN1446403A (zh) 2003-10-01
KR100551143B1 (ko) 2006-02-10
TW501278B (en) 2002-09-01

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