ATE95959T1 - Geraet zur synchronisation eines ersten signals mit einem zweiten signal. - Google Patents

Geraet zur synchronisation eines ersten signals mit einem zweiten signal.

Info

Publication number
ATE95959T1
ATE95959T1 AT86304777T AT86304777T ATE95959T1 AT E95959 T1 ATE95959 T1 AT E95959T1 AT 86304777 T AT86304777 T AT 86304777T AT 86304777 T AT86304777 T AT 86304777T AT E95959 T1 ATE95959 T1 AT E95959T1
Authority
AT
Austria
Prior art keywords
sub
signal
delay
output
delay means
Prior art date
Application number
AT86304777T
Other languages
English (en)
Inventor
Craig Clapp
Neil Adams
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE95959T1 publication Critical patent/ATE95959T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Synchronisation In Digital Transmission Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Stereo-Broadcasting Methods (AREA)
  • Synchronizing For Television (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
AT86304777T 1985-06-21 1986-06-20 Geraet zur synchronisation eines ersten signals mit einem zweiten signal. ATE95959T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/747,476 US4675612A (en) 1985-06-21 1985-06-21 Apparatus for synchronization of a first signal with a second signal
EP86304777A EP0208449B1 (de) 1985-06-21 1986-06-20 Gerät zur Synchronisation eines ersten Signals mit einem zweiten Signal

Publications (1)

Publication Number Publication Date
ATE95959T1 true ATE95959T1 (de) 1993-10-15

Family

ID=25005220

Family Applications (1)

Application Number Title Priority Date Filing Date
AT86304777T ATE95959T1 (de) 1985-06-21 1986-06-20 Geraet zur synchronisation eines ersten signals mit einem zweiten signal.

Country Status (5)

Country Link
US (1) US4675612A (de)
EP (1) EP0208449B1 (de)
JP (1) JPS61296815A (de)
AT (1) ATE95959T1 (de)
DE (1) DE3689159T2 (de)

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DE4142825A1 (de) * 1990-12-26 1992-07-02 Mitsubishi Electric Corp Synchronisierter taktgenerator
JPH04235409A (ja) * 1991-01-09 1992-08-24 Nec Eng Ltd 遅延回路
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JPH04298116A (ja) * 1991-03-27 1992-10-21 Toshiba Corp サンプリング信号発生回路
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US5428764A (en) * 1992-04-24 1995-06-27 Digital Equipment Corporation System for radial clock distribution and skew regulation for synchronous clocking of components of a computing system
JP3381938B2 (ja) * 1992-06-05 2003-03-04 株式会社東芝 入力遷移検知パルス発生回路
US5404437A (en) * 1992-11-10 1995-04-04 Sigma Designs, Inc. Mixing of computer graphics and animation sequences
US5347227A (en) * 1992-12-10 1994-09-13 At&T Bell Laboratories Clock phase adjustment between duplicated clock circuits
JP3247190B2 (ja) * 1993-04-13 2002-01-15 三菱電機株式会社 位相同期回路および集積回路装置
US5598576A (en) * 1994-03-30 1997-01-28 Sigma Designs, Incorporated Audio output device having digital signal processor for responding to commands issued by processor by emulating designated functions according to common command interface
US5515107A (en) * 1994-03-30 1996-05-07 Sigma Designs, Incorporated Method of encoding a stream of motion picture data
JP3553639B2 (ja) * 1994-05-12 2004-08-11 アジレント・テクノロジーズ・インク タイミング調整回路
US6124897A (en) 1996-09-30 2000-09-26 Sigma Designs, Inc. Method and apparatus for automatic calibration of analog video chromakey mixer
US5528309A (en) 1994-06-28 1996-06-18 Sigma Designs, Incorporated Analog video chromakey mixer
US5828250A (en) * 1994-09-06 1998-10-27 Intel Corporation Differential delay line clock generator with feedback phase control
US5537068A (en) * 1994-09-06 1996-07-16 Intel Corporation Differential delay line clock generator
US5486783A (en) * 1994-10-31 1996-01-23 At&T Corp. Method and apparatus for providing clock de-skewing on an integrated circuit board
US6239627B1 (en) * 1995-01-03 2001-05-29 Via-Cyrix, Inc. Clock multiplier using nonoverlapping clock pulses for waveform generation
WO1997005739A1 (en) * 1995-08-01 1997-02-13 Auravision Corporation Transition aligned video synchronization system
KR0179779B1 (ko) * 1995-12-18 1999-04-01 문정환 클럭신호 모델링 회로
US5945861A (en) * 1995-12-18 1999-08-31 Lg Semicon., Co. Ltd. Clock signal modeling circuit with negative delay
US5719511A (en) * 1996-01-31 1998-02-17 Sigma Designs, Inc. Circuit for generating an output signal synchronized to an input signal
US5793233A (en) * 1996-05-30 1998-08-11 Sun Microsystems, Inc. Apparatus and method for generating a phase detection signal that coordinates the phases of separate clock signals
US6128726A (en) 1996-06-04 2000-10-03 Sigma Designs, Inc. Accurate high speed digital signal processor
US5818468A (en) * 1996-06-04 1998-10-06 Sigma Designs, Inc. Decoding video signals at high speed using a memory buffer
US5818890A (en) * 1996-09-24 1998-10-06 Motorola, Inc. Method for synchronizing signals and structures therefor
US6154079A (en) * 1997-06-12 2000-11-28 Lg Semicon Co., Ltd. Negative delay circuit operable in wide band frequency
US6184936B1 (en) 1997-10-06 2001-02-06 Sigma Designs, Inc. Multi-function USB capture chip using bufferless data compression
US6690834B1 (en) 1999-01-22 2004-02-10 Sigma Designs, Inc. Compression of pixel data
JP3789247B2 (ja) * 1999-02-26 2006-06-21 Ｎｅｃエレクトロニクス株式会社 クロック周期検知回路
US6675297B1 (en) 1999-03-01 2004-01-06 Sigma Designs, Inc. Method and apparatus for generating and using a tamper-resistant encryption key
US6687770B1 (en) 1999-03-08 2004-02-03 Sigma Designs, Inc. Controlling consumption of time-stamped information by a buffered system
US6654956B1 (en) 2000-04-10 2003-11-25 Sigma Designs, Inc. Method, apparatus and computer program product for synchronizing presentation of digital video data with serving of digital video data
AU6195401A (en) * 2000-05-24 2001-12-03 John W. Bogdan High resolution phase frequency detectors
US6441666B1 (en) 2000-07-20 2002-08-27 Silicon Graphics, Inc. System and method for generating clock signals
FR2823340A1 (fr) * 2001-04-04 2002-10-11 St Microelectronics Sa Stockage d'un code binaire immuable dans un circuit integre
FR2823341B1 (fr) * 2001-04-04 2003-07-25 St Microelectronics Sa Identification d'un circuit integre a partir de ses parametres physiques de fabrication
US8416955B2 (en) * 2009-12-07 2013-04-09 Mitsubishi Electric Research Laboratories, Inc. Method for determining functions applied to signals
JP2013070281A (ja) * 2011-09-22 2013-04-18 Toshiba Corp Ｄｌｌ回路、逓倍回路、及び半導体記憶装置

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US3502991A (en) * 1967-06-19 1970-03-24 Bell Telephone Labor Inc Signal generator with asynchronous start
GB1187489A (en) * 1967-10-25 1970-04-08 Standard Telephones Cables Ltd Variable Digital Delay Circuit
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JPS598104B2 (ja) * 1979-08-08 1984-02-22 富士通株式会社 ビット位相調整回路
NL183214C (nl) * 1980-01-31 1988-08-16 Philips Nv Inrichting voor het synchroniseren van de fase van een lokaal opgewekt kloksignaal met de fase van een ingangssignaal.
JPS5986385A (ja) * 1982-11-09 1984-05-18 Toshiba Corp サンプリングパルス生成回路
JPS59105721A (ja) * 1982-12-09 1984-06-19 Matsushita Electric Ind Co Ltd デジタル位相同期回路
SU1140237A1 (ru) * 1983-02-24 1985-02-15 Предприятие П/Я Г-4125 Фазируемый генератор синхроимпульсов
JPS60204121A (ja) * 1984-03-29 1985-10-15 Fujitsu Ltd 位相同期回路
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JPS61261918A (ja) * 1985-05-16 1986-11-20 Japanese National Railways<Jnr> クロツクパルスの位相調整方法

Also Published As

Publication number Publication date
DE3689159T2 (de) 1994-04-21
EP0208449B1 (de) 1993-10-13
EP0208449A2 (de) 1987-01-14
EP0208449A3 (en) 1988-10-12
JPS61296815A (ja) 1986-12-27
US4675612A (en) 1987-06-23
DE3689159D1 (de) 1993-11-18

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