ATE516584T1 - Durch bitline geregelter ansatz zur programmsteuerung von nichtflüchtigem speicher - Google Patents

Durch bitline geregelter ansatz zur programmsteuerung von nichtflüchtigem speicher

Info

Publication number
ATE516584T1
ATE516584T1 AT05737998T AT05737998T ATE516584T1 AT E516584 T1 ATE516584 T1 AT E516584T1 AT 05737998 T AT05737998 T AT 05737998T AT 05737998 T AT05737998 T AT 05737998T AT E516584 T1 ATE516584 T1 AT E516584T1
Authority
AT
Austria
Prior art keywords
applying
phase
bit lines
volatile memory
nand strings
Prior art date
Application number
AT05737998T
Other languages
English (en)
Inventor
Daniel Guterman
Nima Mokhlesi
Yupin Fong
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/839,764 external-priority patent/US7023733B2/en
Priority claimed from US10/839,806 external-priority patent/US7020026B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Application granted granted Critical
Publication of ATE516584T1 publication Critical patent/ATE516584T1/de

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/24Bit-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3454Arrangements for verifying correct programming or for detecting overprogrammed cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
AT05737998T 2004-05-05 2005-04-20 Durch bitline geregelter ansatz zur programmsteuerung von nichtflüchtigem speicher ATE516584T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/839,764 US7023733B2 (en) 2004-05-05 2004-05-05 Boosting to control programming of non-volatile memory
US10/839,806 US7020026B2 (en) 2004-05-05 2004-05-05 Bitline governed approach for program control of non-volatile memory
PCT/US2005/013366 WO2005112036A1 (en) 2004-05-05 2005-04-20 Bitune governed approach for program control of non-volatile memory

Publications (1)

Publication Number Publication Date
ATE516584T1 true ATE516584T1 (de) 2011-07-15

Family

ID=34966408

Family Applications (2)

Application Number Title Priority Date Filing Date
AT05736981T ATE511187T1 (de) 2004-05-05 2005-04-20 Boosting zur steuerung der programmierung von nichtflüchtigem speicher
AT05737998T ATE516584T1 (de) 2004-05-05 2005-04-20 Durch bitline geregelter ansatz zur programmsteuerung von nichtflüchtigem speicher

Family Applications Before (1)

Application Number Title Priority Date Filing Date
AT05736981T ATE511187T1 (de) 2004-05-05 2005-04-20 Boosting zur steuerung der programmierung von nichtflüchtigem speicher

Country Status (6)

Country Link
EP (2) EP1751770B1 (de)
JP (2) JP4763687B2 (de)
KR (1) KR100806327B1 (de)
AT (2) ATE511187T1 (de)
TW (2) TWI279808B (de)
WO (2) WO2005112037A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7130210B2 (en) * 2005-01-13 2006-10-31 Spansion Llc Multi-level ONO flash program algorithm for threshold width control
US7626866B2 (en) * 2006-07-28 2009-12-01 Micron Technology, Inc. NAND flash memory programming
US7511996B2 (en) * 2006-11-30 2009-03-31 Mosaid Technologies Incorporated Flash memory program inhibit scheme
JP4640658B2 (ja) * 2008-02-15 2011-03-02 マイクロン テクノロジー, インク. マルチレベル抑制スキーム
US8081514B2 (en) * 2009-08-25 2011-12-20 Sandisk Technologies Inc. Partial speed and full speed programming for non-volatile memory using floating bit lines
JP4922464B1 (ja) * 2011-05-02 2012-04-25 株式会社東芝 半導体記憶装置
TWI675273B (zh) * 2019-03-28 2019-10-21 友達光電股份有限公司 升壓電路、輸出緩衝電路與顯示面板
EP3891745B1 (de) 2019-10-12 2023-09-06 Yangtze Memory Technologies Co., Ltd. Verfahren zur programmierung einer speichervorrichtung und zugehörige speichervorrichtung

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1224062B (it) 1979-09-28 1990-09-26 Ates Componenti Elettron Metodo di programmazione per una memoria a semiconduttore non volatile elettricamente alterabile
US5313421A (en) 1992-01-14 1994-05-17 Sundisk Corporation EEPROM with split gate source side injection
KR0169267B1 (ko) 1993-09-21 1999-02-01 사토 후미오 불휘발성 반도체 기억장치
KR100253868B1 (ko) * 1995-11-13 2000-05-01 니시무로 타이죠 불휘발성 반도체기억장치
JP3504057B2 (ja) * 1996-03-18 2004-03-08 株式会社東芝 不揮発性半導体記憶装置
KR100244864B1 (ko) * 1996-03-18 2000-03-02 니시무로 타이죠 불휘발성 반도체 기억 장치
US5712815A (en) 1996-04-22 1998-01-27 Advanced Micro Devices, Inc. Multiple bits per-cell flash EEPROM capable of concurrently programming and verifying memory cells and reference cells
JP3481817B2 (ja) * 1997-04-07 2003-12-22 株式会社東芝 半導体記憶装置
JP4157189B2 (ja) * 1997-05-14 2008-09-24 株式会社東芝 不揮発性半導体記憶装置
JP3906545B2 (ja) * 1998-02-03 2007-04-18 ソニー株式会社 不揮発性半導体記憶装置
JP3999900B2 (ja) * 1998-09-10 2007-10-31 株式会社東芝 不揮発性半導体メモリ
JP4154771B2 (ja) * 1998-11-10 2008-09-24 ソニー株式会社 不揮発性半導体記憶装置およびそのデータ書き込み方法
JP2000149577A (ja) * 1998-11-10 2000-05-30 Sony Corp 不揮発性半導体記憶装置およびそのデータ書き込み方法
JP2001067884A (ja) * 1999-08-31 2001-03-16 Hitachi Ltd 不揮発性半導体記憶装置
US6301161B1 (en) * 2000-04-25 2001-10-09 Winbond Electronics Corporation Programming flash memory analog storage using coarse-and-fine sequence
JP3810985B2 (ja) * 2000-05-22 2006-08-16 株式会社東芝 不揮発性半導体メモリ
JP3631463B2 (ja) * 2001-12-27 2005-03-23 株式会社東芝 不揮発性半導体記憶装置
KR100453854B1 (ko) * 2001-09-07 2004-10-20 삼성전자주식회사 향상된 프로그램 방지 특성을 갖는 불휘발성 반도체메모리 장치 및 그것의 프로그램 방법

Also Published As

Publication number Publication date
KR20070067011A (ko) 2007-06-27
TWI305361B (en) 2009-01-11
EP1751770A1 (de) 2007-02-14
JP4763687B2 (ja) 2011-08-31
TW200625333A (en) 2006-07-16
TWI279808B (en) 2007-04-21
TW200620300A (en) 2006-06-16
KR100806327B1 (ko) 2008-02-27
JP2007536681A (ja) 2007-12-13
EP1751770B1 (de) 2011-05-25
WO2005112036A1 (en) 2005-11-24
JP2007536682A (ja) 2007-12-13
EP1751771A1 (de) 2007-02-14
JP4879168B2 (ja) 2012-02-22
ATE511187T1 (de) 2011-06-15
WO2005112037A1 (en) 2005-11-24
EP1751771B1 (de) 2011-07-13

Similar Documents

Publication Publication Date Title
ATE516584T1 (de) Durch bitline geregelter ansatz zur programmsteuerung von nichtflüchtigem speicher
TW200623136A (en) Concurrent programming of non-volatile memory
ATE490540T1 (de) Variable programmierung von nicht-flüchtigem speicher
US8730734B2 (en) Access line dependent biasing schemes
JP6494139B1 (ja) 半導体記憶装置
TW200612433A (en) Programming inhibit for non-volatile memory
ATE450043T1 (de) Verfahren zur programmierung eines nicht flüchtigen speichers mit verminderter programmstörung über modizifierte durchgangsspannungen
JP5827536B2 (ja) 不揮発性メモリ装置及びそのプログラム方法
KR102152524B1 (ko) 반도체 기억장치, 및 nand형 플래시 메모리의 소거방법
KR20090119042A (ko) 플래시 메모리 장치, 그것의 프로그램 방법, 그리고 그것을포함하는 메모리 시스템
KR20050101685A (ko) 낸드 플래시 메모리 소자 및 이의 프로그램 방법
US9036426B2 (en) Memory cell sensing using a boost voltage
CN107886988A (zh) 在存储器编程期间斜变抑制电压
ATE544157T1 (de) Verifizierungsoperation für nichtflüchtige speicherung unter verwendung verschiedener spannungen
ATE489708T1 (de) Reduktion von programmstörungen in einem nichtflüchtigen speicher mit frühem quellenseitigem boosting
JP4209219B2 (ja) 不揮発性半導体記憶装置および記憶装置並びに不良記憶素子検出修復方法
KR20190002359A (ko) 다중 리드 동작을 지원하는 메모리 디바이스
KR20140078989A (ko) 반도체 메모리 장치 및 그것의 프로그램 방법
KR101998076B1 (ko) 집적 회로 및 이를 포함하는 장치들
ATE471563T1 (de) Verfahren zur gesteuerten programmierung von nichtflüchtigem speicher, der bitleitungskopplung aufweist
DE69630228D1 (de) Flash-speichersystem mit reduzierten störungen und verfahren dazu
US7733706B2 (en) Flash memory device and erase method thereof
ATE509349T1 (de) Minderung der auswirkung von pogrammstörungen
KR20140078986A (ko) 레귤레이터, 전압 발생기, 반도체 메모리 장치 및 전압 발생 방법
DE60127260D1 (de) Verfahren zur verminderung kapazitiver last in einem flash-speicher-zeilendekodierer zur genauen spannungsregulierung von wort- und auswahlleitungen

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties