ATE488804T1 - Adaptives zeitsystem zur steuerung des speicherzugriffs - Google Patents

Adaptives zeitsystem zur steuerung des speicherzugriffs

Info

Publication number
ATE488804T1
ATE488804T1 AT06111570T AT06111570T ATE488804T1 AT E488804 T1 ATE488804 T1 AT E488804T1 AT 06111570 T AT06111570 T AT 06111570T AT 06111570 T AT06111570 T AT 06111570T AT E488804 T1 ATE488804 T1 AT E488804T1
Authority
AT
Austria
Prior art keywords
data source
memory access
latched
time system
delay clock
Prior art date
Application number
AT06111570T
Other languages
English (en)
Inventor
Paul A Laberge
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE488804T1 publication Critical patent/ATE488804T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1689—Synchronisation and timing concerns
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/0033—Correction by delay
    • H04L7/0037—Delay of clock signal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Information Transfer Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Communication Control (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Static Random-Access Memory (AREA)
AT06111570T 2002-02-11 2003-01-29 Adaptives zeitsystem zur steuerung des speicherzugriffs ATE488804T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/073,611 US7076678B2 (en) 2002-02-11 2002-02-11 Method and apparatus for data transfer

Publications (1)

Publication Number Publication Date
ATE488804T1 true ATE488804T1 (de) 2010-12-15

Family

ID=27659717

Family Applications (3)

Application Number Title Priority Date Filing Date
AT06111570T ATE488804T1 (de) 2002-02-11 2003-01-29 Adaptives zeitsystem zur steuerung des speicherzugriffs
AT03704059T ATE326035T1 (de) 2002-02-11 2003-01-29 Speicher und ein adaptives zeitsteuerungssystem zur steuerung des zugriffs auf den speicher
AT06111574T ATE530985T1 (de) 2002-02-11 2003-01-29 Speichersteuerung mit adaptivem zeitsystem zur steuerung des speicherzugriffs

Family Applications After (2)

Application Number Title Priority Date Filing Date
AT03704059T ATE326035T1 (de) 2002-02-11 2003-01-29 Speicher und ein adaptives zeitsteuerungssystem zur steuerung des zugriffs auf den speicher
AT06111574T ATE530985T1 (de) 2002-02-11 2003-01-29 Speichersteuerung mit adaptivem zeitsystem zur steuerung des speicherzugriffs

Country Status (10)

Country Link
US (3) US7076678B2 (de)
EP (3) EP1677204B1 (de)
JP (1) JP3987038B2 (de)
KR (1) KR100733951B1 (de)
CN (1) CN100350402C (de)
AT (3) ATE488804T1 (de)
AU (1) AU2003205371A1 (de)
DE (2) DE60335042D1 (de)
TW (1) TWI257549B (de)
WO (1) WO2003069486A1 (de)

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Also Published As

Publication number Publication date
CN100350402C (zh) 2007-11-21
EP1677204A3 (de) 2006-10-18
EP1677204B1 (de) 2010-11-17
AU2003205371A1 (en) 2003-09-04
EP1679607A3 (de) 2006-10-18
EP1677204A2 (de) 2006-07-05
US7818601B2 (en) 2010-10-19
DE60335042D1 (de) 2010-12-30
TW200302969A (en) 2003-08-16
US20030154416A1 (en) 2003-08-14
KR100733951B1 (ko) 2007-06-29
US20080155141A1 (en) 2008-06-26
ATE530985T1 (de) 2011-11-15
KR20040089613A (ko) 2004-10-21
TWI257549B (en) 2006-07-01
ATE326035T1 (de) 2006-06-15
US7356723B2 (en) 2008-04-08
DE60305162D1 (de) 2006-06-14
EP1479006B1 (de) 2006-05-10
CN1630856A (zh) 2005-06-22
EP1679607A2 (de) 2006-07-12
EP1679607B1 (de) 2011-10-26
US7076678B2 (en) 2006-07-11
EP1479006A1 (de) 2004-11-24
WO2003069486A1 (en) 2003-08-21
US20060129865A1 (en) 2006-06-15
JP2005525623A (ja) 2005-08-25
DE60305162T2 (de) 2007-05-10
JP3987038B2 (ja) 2007-10-03

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