ATE470237T1 - Ein verfahren zur abscheidung einer metallschicht auf einer halbleiter-interkonnektstruktur mit einer deckschicht - Google Patents

Ein verfahren zur abscheidung einer metallschicht auf einer halbleiter-interkonnektstruktur mit einer deckschicht

Info

Publication number
ATE470237T1
ATE470237T1 AT03796085T AT03796085T ATE470237T1 AT E470237 T1 ATE470237 T1 AT E470237T1 AT 03796085 T AT03796085 T AT 03796085T AT 03796085 T AT03796085 T AT 03796085T AT E470237 T1 ATE470237 T1 AT E470237T1
Authority
AT
Austria
Prior art keywords
layer
capping layer
interconnect structure
deposing
metal layer
Prior art date
Application number
AT03796085T
Other languages
English (en)
Inventor
Larry Clevenger
Timothy Dalton
Mark Hoinkis
Steffen Kaldor
Kaushik Kumar
Tulipe Douglas La
Soon-Cheon Seo
Andrew Simon
Yun-Yu Wang
Chih-Chao Yang
Haining Yang
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE470237T1 publication Critical patent/ATE470237T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76844—Bottomless liners
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76847—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned within the main fill metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76865—Selective removal of parts of the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
AT03796085T 2002-12-11 2003-12-08 Ein verfahren zur abscheidung einer metallschicht auf einer halbleiter-interkonnektstruktur mit einer deckschicht ATE470237T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/318,606 US7241696B2 (en) 2002-12-11 2002-12-11 Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer
PCT/EP2003/050957 WO2004053979A1 (en) 2002-12-11 2003-12-08 A method for depositing a metal layer on a semiconductor interconnect structure having a capping layer

Publications (1)

Publication Number Publication Date
ATE470237T1 true ATE470237T1 (de) 2010-06-15

Family

ID=32506405

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03796085T ATE470237T1 (de) 2002-12-11 2003-12-08 Ein verfahren zur abscheidung einer metallschicht auf einer halbleiter-interkonnektstruktur mit einer deckschicht

Country Status (11)

Country Link
US (1) US7241696B2 (de)
EP (1) EP1570517B1 (de)
JP (1) JP2006510195A (de)
KR (1) KR100652334B1 (de)
CN (1) CN1316590C (de)
AT (1) ATE470237T1 (de)
AU (1) AU2003298347A1 (de)
DE (1) DE60332865D1 (de)
IL (1) IL169135A0 (de)
TW (1) TWI230438B (de)
WO (1) WO2004053979A1 (de)

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US20050263891A1 (en) * 2004-05-28 2005-12-01 Bih-Huey Lee Diffusion barrier for damascene structures
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US20070049008A1 (en) * 2005-08-26 2007-03-01 Martin Gerald A Method for forming a capping layer on a semiconductor device
US7994047B1 (en) * 2005-11-22 2011-08-09 Spansion Llc Integrated circuit contact system
US8264086B2 (en) * 2005-12-05 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Via structure with improved reliability
US7528066B2 (en) * 2006-03-01 2009-05-05 International Business Machines Corporation Structure and method for metal integration
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US7456099B2 (en) * 2006-05-25 2008-11-25 International Business Machines Corporation Method of forming a structure for reducing lateral fringe capacitance in semiconductor devices
JP5162869B2 (ja) * 2006-09-20 2013-03-13 富士通セミコンダクター株式会社 半導体装置およびその製造方法
US7666781B2 (en) * 2006-11-22 2010-02-23 International Business Machines Corporation Interconnect structures with improved electromigration resistance and methods for forming such interconnect structures
KR100834283B1 (ko) * 2006-12-28 2008-05-30 동부일렉트로닉스 주식회사 금속 배선 형성 방법
DE102007004860B4 (de) * 2007-01-31 2008-11-06 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung einer Kupfer-basierten Metallisierungsschicht mit einer leitenden Deckschicht durch ein verbessertes Integrationsschema
US8354751B2 (en) * 2008-06-16 2013-01-15 International Business Machines Corporation Interconnect structure for electromigration enhancement
US8237191B2 (en) * 2009-08-11 2012-08-07 International Business Machines Corporation Heterojunction bipolar transistors and methods of manufacture
DE102010063294B4 (de) * 2010-12-16 2019-07-11 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zur Herstellung von Metallisierungssystemen von Halbleiterbauelementen, die eine Kupfer/Silizium-Verbindung als ein Barrierenmaterial aufweisen
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Also Published As

Publication number Publication date
WO2004053979A1 (en) 2004-06-24
EP1570517B1 (de) 2010-06-02
US20040115921A1 (en) 2004-06-17
IL169135A0 (en) 2007-07-04
KR100652334B1 (ko) 2006-11-30
WO2004053979A8 (en) 2005-05-12
TW200425399A (en) 2004-11-16
TWI230438B (en) 2005-04-01
KR20050088076A (ko) 2005-09-01
JP2006510195A (ja) 2006-03-23
US7241696B2 (en) 2007-07-10
DE60332865D1 (de) 2010-07-15
EP1570517A1 (de) 2005-09-07
CN1316590C (zh) 2007-05-16
CN1708846A (zh) 2005-12-14
AU2003298347A1 (en) 2004-06-30

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