DE68926656T2 - Verfahren zum Herstellen eines Halbleiterbauelementes - Google Patents

Verfahren zum Herstellen eines Halbleiterbauelementes

Info

Publication number
DE68926656T2
DE68926656T2 DE68926656T DE68926656T DE68926656T2 DE 68926656 T2 DE68926656 T2 DE 68926656T2 DE 68926656 T DE68926656 T DE 68926656T DE 68926656 T DE68926656 T DE 68926656T DE 68926656 T2 DE68926656 T2 DE 68926656T2
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68926656T
Other languages
English (en)
Other versions
DE68926656D1 (de
Inventor
Rempei C O Intellectual Nakata
Hitoshi C O Intellectual Itoh
Takashi C O Intellectual Endo
Tohru C O Intellectua Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP63292329A external-priority patent/JPH02139932A/ja
Priority claimed from JP1005421A external-priority patent/JPH02185023A/ja
Priority claimed from JP1139720A external-priority patent/JPH034525A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE68926656D1 publication Critical patent/DE68926656D1/de
Application granted granted Critical
Publication of DE68926656T2 publication Critical patent/DE68926656T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising semiconducting material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
DE68926656T 1988-11-21 1989-11-21 Verfahren zum Herstellen eines Halbleiterbauelementes Expired - Fee Related DE68926656T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP63292329A JPH02139932A (ja) 1988-11-21 1988-11-21 半導体装置の製造方法
JP1005421A JPH02185023A (ja) 1989-01-12 1989-01-12 選択気相成長方法
JP1139720A JPH034525A (ja) 1989-06-01 1989-06-01 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE68926656D1 DE68926656D1 (de) 1996-07-18
DE68926656T2 true DE68926656T2 (de) 1996-11-28

Family

ID=27276742

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68926656T Expired - Fee Related DE68926656T2 (de) 1988-11-21 1989-11-21 Verfahren zum Herstellen eines Halbleiterbauelementes

Country Status (4)

Country Link
US (1) US5620925A (de)
EP (1) EP0370775B1 (de)
KR (1) KR940000906B1 (de)
DE (1) DE68926656T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11915935B2 (en) 2018-10-05 2024-02-27 Osram Opto Semiconductors Gmbh Method for producing a semiconductor component comprising performing a plasma treatment, and semiconductor component

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3940083A1 (de) * 1989-12-04 1991-06-13 Siemens Ag Verfahren zum anisotropen trockenaetzen von aluminium bzw. aluminiumlegierungen enthaltenden leiterbahnen in integrierten halbleiterschaltungen
DE69117077T2 (de) * 1990-03-06 1996-06-27 Sumitomo Electric Industries Verfahren zum Aufwachsen einer Dünnschicht aus Diamant oder c-BN
FR2670693B1 (fr) * 1990-12-20 1993-04-16 Dutartre Didier Procede pour nettoyer la surface d'un substrat par plasma.
JP2660359B2 (ja) * 1991-01-30 1997-10-08 三菱電機株式会社 半導体装置
US5089438A (en) * 1991-04-26 1992-02-18 At&T Bell Laboratories Method of making an article comprising a TiNx layer
JPH0922896A (ja) * 1995-07-07 1997-01-21 Toshiba Corp 金属膜の選択的形成方法
KR100440418B1 (ko) 1995-12-12 2004-10-20 텍사스 인스트루먼츠 인코포레이티드 저압,저온의반도체갭충전처리방법
JP3254997B2 (ja) * 1995-12-25 2002-02-12 ソニー株式会社 プラズマｃｖｄ方法、およびこれにより形成された金属膜を有する半導体装置
JPH10214896A (ja) * 1996-11-29 1998-08-11 Toshiba Corp 半導体装置の製造方法及び製造装置
KR19980064441A (ko) * 1996-12-20 1998-10-07 윌리엄비.켐플러 전도물질을 반도체 소자 표면에 선택적으로 결합시키는 방법
US6271121B1 (en) 1997-02-10 2001-08-07 Tokyo Electron Limited Process for chemical vapor deposition of tungsten onto a titanium nitride substrate surface
US5906866A (en) * 1997-02-10 1999-05-25 Tokyo Electron Limited Process for chemical vapor deposition of tungsten onto a titanium nitride substrate surface
US6872429B1 (en) * 1997-06-30 2005-03-29 Applied Materials, Inc. Deposition of tungsten nitride using plasma pretreatment in a chemical vapor deposition chamber
KR100666042B1 (ko) * 2001-03-16 2007-01-10 동경 엘렉트론 주식회사 박막 형성 방법 및 박막 형성 장치
US6537848B2 (en) * 2001-05-30 2003-03-25 St. Assembly Test Services Ltd. Super thin/super thermal ball grid array package
US7241696B2 (en) * 2002-12-11 2007-07-10 International Business Machines Corporation Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer
US20040192059A1 (en) * 2003-03-28 2004-09-30 Mosel Vitelic, Inc. Method for etching a titanium-containing layer prior to etching an aluminum layer in a metal stack
KR100707882B1 (ko) * 2005-12-14 2007-04-13 삼성전자주식회사 선택적 에피택시얼 성장 방법
US20090061623A1 (en) * 2007-09-05 2009-03-05 United Microelectronics Corp. Method of forming electrical connection structure
US9997325B2 (en) * 2008-07-17 2018-06-12 Verity Instruments, Inc. Electron beam exciter for use in chemical analysis in processing systems
US9892957B2 (en) * 2015-03-16 2018-02-13 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure and method for forming the same
US10453737B2 (en) * 2017-04-11 2019-10-22 Tokyo Electron Limited Method of filling retrograde recessed features with no voids

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4532702A (en) * 1983-11-04 1985-08-06 Westinghouse Electric Corp. Method of forming conductive interconnection between vertically spaced levels in VLSI devices
JPS60138940A (ja) * 1983-12-27 1985-07-23 Toshiba Corp 半導体装置の製造方法
US4629635A (en) * 1984-03-16 1986-12-16 Genus, Inc. Process for depositing a low resistivity tungsten silicon composite film on a substrate
US4595601A (en) * 1984-05-25 1986-06-17 Kabushiki Kaisha Toshiba Method of selectively forming an insulation layer
US4595608A (en) * 1984-11-09 1986-06-17 Harris Corporation Method for selective deposition of tungsten on silicon
JPH0770502B2 (ja) * 1985-04-26 1995-07-31 株式会社東芝 半導体装置の製造方法
US4617087A (en) * 1985-09-27 1986-10-14 International Business Machines Corporation Method for differential selective deposition of metal for fabricating metal contacts in integrated semiconductor circuits
US4904621A (en) * 1987-07-16 1990-02-27 Texas Instruments Incorporated Remote plasma generation process using a two-stage showerhead
EP0305143B1 (de) * 1987-08-24 1993-12-08 Fujitsu Limited Verfahren zur selektiven Ausbildung einer Leiterschicht
US4777061A (en) * 1987-12-14 1988-10-11 Spectrum Cvd, Inc. Blanket tungsten deposition for dielectric
US5043299B1 (en) * 1989-12-01 1997-02-25 Applied Materials Inc Process for selective deposition of tungsten on semiconductor wafer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11915935B2 (en) 2018-10-05 2024-02-27 Osram Opto Semiconductors Gmbh Method for producing a semiconductor component comprising performing a plasma treatment, and semiconductor component

Also Published As

Publication number Publication date
DE68926656D1 (de) 1996-07-18
KR900008620A (ko) 1990-06-04
KR940000906B1 (ko) 1994-02-04
EP0370775A3 (en) 1990-07-25
EP0370775B1 (de) 1996-06-12
US5620925A (en) 1997-04-15
EP0370775A2 (de) 1990-05-30

Similar Documents

Publication Publication Date Title
DE69030229D1 (de) Verfahren zum Herstellen einer Halbleitervorrichtung
DE69033736D1 (de) Verfahren zum Herstellen einer Halbleitervorrichtung
DE68926656D1 (de) Verfahren zum Herstellen eines Halbleiterbauelementes
DE3750325T2 (de) Verfahren zum Herstellen eines Halbleiterbauelements.
DE69031184D1 (de) Verfahren zum Herstellen einer Halbleiterbauelement-Packung
DE69133316D1 (de) Verfahren zum Herstellen einer Halbleitervorrichtung
DE68917995T2 (de) Verfahren zum Herstellen einer Halbleitervorrichtung.
DE69031543D1 (de) Verfahren zum Herstellen einer Halbleitervorrichtung
DE68910368T2 (de) Verfahren zum Herstellen eines Halbleiterkörpers.
DE68919549T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung.
DE69022087T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung.
DE68911621T2 (de) Verfahren zum Herstellen einer Einrichtung.
DE69028964D1 (de) Verfahren zum Herstellen einer Halbleitervorrichtung
DE68920094D1 (de) Verfahren zum Herstellen einer Halbleiteranordnung.
DE3028612C2 (de) Verfahren zum Herstellen eines Halbleiterbauelements
DE68906034T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung.
DE3854893D1 (de) Verfahren und Vorrichtung zum Abschrägen der Kerbe eines Halbleiterplättchen
DE69120975T2 (de) Verfahren zum Herstellen einer Halbleitervorrichtung
DE3883856T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung.
DE3888457D1 (de) Verfahren zum Herstellen einer Halbleitervorrichtung.
DE69018884T2 (de) Verfahren zum Herstellen einer Halbleitervorrichtung.
DE69116592T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung
DE69215956T2 (de) Verfahren zum Herstellen eines Kontakts auf einem Halbleiterbauelement
DE69116938T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung
DE69429636T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee