ATE365443T1 - Verfahren zur herstellung eines keramischen mehrschichtigen substrats - Google Patents

Verfahren zur herstellung eines keramischen mehrschichtigen substrats

Info

Publication number
ATE365443T1
ATE365443T1 AT99913716T AT99913716T ATE365443T1 AT E365443 T1 ATE365443 T1 AT E365443T1 AT 99913716 T AT99913716 T AT 99913716T AT 99913716 T AT99913716 T AT 99913716T AT E365443 T1 ATE365443 T1 AT E365443T1
Authority
AT
Austria
Prior art keywords
producing
layer substrate
sheets
shrinkage suppression
layered
Prior art date
Application number
AT99913716T
Other languages
English (en)
Inventor
Shigetoshi Segawa
Hiroshi Ochi
Yasuyuki Baba
Osamu Shiraishi
Masao Konishi
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Application granted granted Critical
Publication of ATE365443T1 publication Critical patent/ATE365443T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • H01L21/481—Insulating layers on insulating parts, with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4864—Cleaning, e.g. removing of solder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025—Abrading, e.g. grinding or sand blasting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0736—Methods for applying liquids, e.g. spraying
    • H05K2203/0746—Local treatment using a fluid jet, e.g. for removing or cleaning material; Providing mechanical pressure using a fluid jet

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
  • Devices For Post-Treatments, Processing, Supply, Discharge, And Other Processes (AREA)
AT99913716T 1998-04-24 1999-04-19 Verfahren zur herstellung eines keramischen mehrschichtigen substrats ATE365443T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11467198 1998-04-24

Publications (1)

Publication Number Publication Date
ATE365443T1 true ATE365443T1 (de) 2007-07-15

Family

ID=14643698

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99913716T ATE365443T1 (de) 1998-04-24 1999-04-19 Verfahren zur herstellung eines keramischen mehrschichtigen substrats

Country Status (9)

Country Link
US (1) US6740183B1 (de)
EP (1) EP0993242B1 (de)
KR (1) KR100375486B1 (de)
CN (1) CN1190117C (de)
AT (1) ATE365443T1 (de)
DE (1) DE69936329T2 (de)
ID (1) ID24350A (de)
TW (1) TW411750B (de)
WO (1) WO1999056510A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004034758A1 (ja) * 2002-10-10 2004-04-22 Murata Manufacturing Co., Ltd. セラミック多層基板の製造方法
US20070111642A1 (en) * 2005-11-14 2007-05-17 Davis Ian M Apparatus and methods for slurry cleaning of etch chambers
KR100900637B1 (ko) * 2007-10-29 2009-06-02 삼성전기주식회사 구속시트 제조방법
KR100978664B1 (ko) * 2008-10-23 2010-08-30 삼성전기주식회사 미소결 다층 세라믹 기판 및 무수축 다층 세라믹 기판의 제조방법
TWI589165B (zh) * 2016-03-09 2017-06-21 瑞軒科技股份有限公司 平衡推挽式喇叭裝置及其控制方法、音訊處理電路及音訊處理方法

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4517774A (en) * 1982-05-04 1985-05-21 Frank Dudding Wet blasting apparatus
JPH025899Y2 (de) * 1984-12-05 1990-02-13
US5130067A (en) * 1986-05-02 1992-07-14 International Business Machines Corporation Method and means for co-sintering ceramic/metal mlc substrates
US4817342A (en) * 1987-07-15 1989-04-04 Whitemetal Inc. Water/abrasive propulsion chamber
US4920640A (en) * 1988-01-27 1990-05-01 W. R. Grace & Co.-Conn. Hot pressing dense ceramic sheets for electronic substrates and for multilayer electronic substrates
US4896464A (en) * 1988-06-15 1990-01-30 International Business Machines Corporation Formation of metallic interconnects by grit blasting
US5085720A (en) * 1990-01-18 1992-02-04 E. I. Du Pont De Nemours And Company Method for reducing shrinkage during firing of green ceramic bodies
JPH0417392A (ja) * 1990-05-11 1992-01-22 Hitachi Ltd 多層セラミック配線基板の製法
KR100200902B1 (ko) * 1990-09-19 1999-06-15 가나이 쓰도무 다층세라믹 소결체 및 그 제조방법
JP2785544B2 (ja) * 1991-10-04 1998-08-13 松下電器産業株式会社 多層セラミック基板の製造方法
EP0535711A3 (en) * 1991-10-04 1993-12-01 Matsushita Electric Ind Co Ltd Method for producing multilayered ceramic substrate
DE69328390T2 (de) * 1992-05-20 2000-12-07 Matsushita Electric Industrial Co., Ltd. Verfahren zur Herstellung eines mehrlagigen Substrats
JPH0661649A (ja) * 1992-08-07 1994-03-04 Matsushita Electric Ind Co Ltd 多層セラミック基板の製造方法
US5456778A (en) * 1992-08-21 1995-10-10 Sumitomo Metal Ceramics Inc. Method of fabricating ceramic circuit substrate
JP2784527B2 (ja) * 1992-10-12 1998-08-06 株式会社住友金属エレクトロデバイス ガラスセラミックス基板の製造方法
JPH0864968A (ja) * 1994-08-24 1996-03-08 Oki Electric Ind Co Ltd プリント配線板のヴィアホールの形成方法とそれを用いた多層プリント配線板の製造方法
JPH0992983A (ja) * 1995-07-17 1997-04-04 Sumitomo Kinzoku Electro Device:Kk セラミック多層基板の製造方法
US5708570A (en) * 1995-10-11 1998-01-13 Hughes Aircraft Company Shrinkage-matched circuit package utilizing low temperature co-fired ceramic structures
US6042667A (en) * 1996-03-13 2000-03-28 Sumotomo Metal Electronics Devices, Inc. Method of fabricating ceramic multilayer substrate
JP3471571B2 (ja) * 1996-07-02 2003-12-02 Ｔｄｋ株式会社 多層ガラス・セラミック基板の製造方法
US5827114A (en) * 1996-09-25 1998-10-27 Church & Dwight Co., Inc. Slurry blasting process
JPH10218675A (ja) * 1997-02-06 1998-08-18 Sumitomo Kinzoku Electro Device:Kk セラミック基板の製造方法
US6241838B1 (en) * 1997-09-08 2001-06-05 Murata Manufacturing Co., Ltd. Method of producing a multi-layer ceramic substrate
JP3322199B2 (ja) * 1998-01-06 2002-09-09 株式会社村田製作所 多層セラミック基板およびその製造方法
US6139666A (en) * 1999-05-26 2000-10-31 International Business Machines Corporation Method for producing ceramic surfaces with easily removable contact sheets

Also Published As

Publication number Publication date
CN1190117C (zh) 2005-02-16
KR20010013652A (ko) 2001-02-26
US6740183B1 (en) 2004-05-25
CN1263692A (zh) 2000-08-16
DE69936329D1 (de) 2007-08-02
DE69936329T2 (de) 2007-10-04
TW411750B (en) 2000-11-11
EP0993242A1 (de) 2000-04-12
EP0993242B1 (de) 2007-06-20
KR100375486B1 (ko) 2003-03-10
EP0993242A4 (de) 2005-04-06
WO1999056510A1 (fr) 1999-11-04
ID24350A (id) 2000-07-13

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