ATE344499T1 - Interpolator mit variablem modul und variabler frequenzsynthesizer mit dem interpolator mit variablem modul - Google Patents

Interpolator mit variablem modul und variabler frequenzsynthesizer mit dem interpolator mit variablem modul

Info

Publication number
ATE344499T1
ATE344499T1 AT02739914T AT02739914T ATE344499T1 AT E344499 T1 ATE344499 T1 AT E344499T1 AT 02739914 T AT02739914 T AT 02739914T AT 02739914 T AT02739914 T AT 02739914T AT E344499 T1 ATE344499 T1 AT E344499T1
Authority
AT
Austria
Prior art keywords
sigma
delta
stage
variable
quantiser
Prior art date
Application number
AT02739914T
Other languages
English (en)
Inventor
Michael Francis Keaveney
William P Hunt
Original Assignee
Analog Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices Inc filed Critical Analog Devices Inc
Application granted granted Critical
Publication of ATE344499T1 publication Critical patent/ATE344499T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/302—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3022—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/17—Function evaluation by approximation methods, e.g. inter- or extrapolation, smoothing, least mean square method
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Circuits Of Receivers In General (AREA)
AT02739914T 2001-06-15 2002-06-14 Interpolator mit variablem modul und variabler frequenzsynthesizer mit dem interpolator mit variablem modul ATE344499T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29886201P 2001-06-15 2001-06-15

Publications (1)

Publication Number Publication Date
ATE344499T1 true ATE344499T1 (de) 2006-11-15

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
AT02739914T ATE344499T1 (de) 2001-06-15 2002-06-14 Interpolator mit variablem modul und variabler frequenzsynthesizer mit dem interpolator mit variablem modul

Country Status (7)

Country Link
US (2) US6927716B2 (de)
EP (1) EP1397772B1 (de)
JP (1) JP2004522361A (de)
CN (1) CN1465029A (de)
AT (1) ATE344499T1 (de)
DE (1) DE60215806T2 (de)
WO (1) WO2002103609A1 (de)

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US7024171B2 (en) * 2003-02-25 2006-04-04 Icom America, Incorporated Fractional-N frequency synthesizer with cascaded sigma-delta converters
US8019035B2 (en) 2003-08-05 2011-09-13 Stmicroelectronics Nv Noise shaped interpolator and decimator apparatus and method
DE102004006995B4 (de) * 2004-02-12 2007-05-31 Infineon Technologies Ag Digitaler Phasenregelkreis für Sub-µ-Technologien
US7035369B2 (en) * 2004-05-12 2006-04-25 Harris Corporation Apparatus and method for a programmable clock generator
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US20070061390A1 (en) * 2005-09-09 2007-03-15 Leo Bredehoft Interpolator using splines generated from an integrator stack seeded at input sample points
DE102006041892A1 (de) * 2005-09-23 2007-04-19 Samsung Electro-Mechanics Co., Ltd., Suwon Verfahren zum Bestimmen eines Fractional-Teilerverhältnisses unter Verwendung eines Sigma-Delta-Modulators
US7187313B1 (en) * 2005-10-31 2007-03-06 Mediatek Inc. Fractional-N frequency synthesizer with sigma-delta modulator for variable reference frequencies
US7680227B2 (en) * 2006-03-02 2010-03-16 Broadcom Corporation Method and system for filter calibration using fractional-N frequency synthesized signals
TWI351820B (en) 2007-03-27 2011-11-01 Mstar Semiconductor Inc Clock generator, method for generating clock signa
US7679540B2 (en) * 2007-11-30 2010-03-16 Infineon Technologies Ag Double sampling DAC and integrator
US7893736B2 (en) * 2008-11-14 2011-02-22 Analog Devices, Inc. Multiple input PLL with hitless switchover between non-integer related input frequencies
US7924072B2 (en) * 2008-11-14 2011-04-12 Analog Devices, Inc. Exact frequency translation using dual cascaded sigma-delta modulator controlled phase lock loops
US20100123488A1 (en) * 2008-11-14 2010-05-20 Analog Devices, Inc. Digital pll with known noise source and known loop bandwidth
US7924966B2 (en) * 2008-11-21 2011-04-12 Analog Devices, Inc. Symmetry corrected high frequency digital divider
US8193845B2 (en) * 2010-07-06 2012-06-05 Microchip Technology Incorporated Binary-weighted delta-sigma fractional-N frequency synthesizer with digital-to-analog differentiators canceling quantization noise
US8284085B2 (en) 2010-10-06 2012-10-09 Texas Instruments Incorporated Pipelined continuous-time sigma delta modulator
US8552772B2 (en) 2011-01-06 2013-10-08 Asahi Kasei Microdevices Corporation Loop filter buffer with level shifter
US8666011B1 (en) 2011-04-20 2014-03-04 Applied Micro Circuits Corporation Jitter-attenuated clock using a gapped clock reference
US8855258B1 (en) 2011-04-20 2014-10-07 Applied Micro Circuits Corporation Transmitters and receivers using a jitter-attenuated clock derived from a gapped clock reference
US8862648B2 (en) 2011-05-24 2014-10-14 Taiwan Semiconductor Manufacturing Company, Ltd. Fast filter calibration apparatus
US8451067B2 (en) 2011-06-08 2013-05-28 Asahi Kasei Microdevices Corporation Variable modulus modulator for fractional-N frequency synthesizers
JP5606400B2 (ja) * 2011-06-16 2014-10-15 株式会社東芝 信号生成回路、レーダー装置
US8847803B2 (en) * 2011-09-09 2014-09-30 Mstar Semiconductor, Inc. Parallel multibit digital-to-digital sigma-delta modulation
US8816724B2 (en) 2011-12-16 2014-08-26 University College Cork—National University of Ireland, Cork Nested digital delta-sigma modulator
DE102012212397B4 (de) 2011-12-21 2024-02-29 Apple Inc. Schaltung und Verfahren
US9077375B2 (en) * 2011-12-21 2015-07-07 Intel Mobile Communications GmbH DTC system with high resolution phase alignment
CN103944576B (zh) * 2014-04-17 2017-03-01 深圳市欧克蓝科技有限公司 一种Sigma‑Delta调制器及一种用于Sigma‑Delta调制器的运算方法
EP2966778B1 (de) * 2014-07-11 2016-11-09 The Swatch Group Research and Development Ltd. Digitaler Interpolator und Verfahren zur Interpolierung
CN108141222B (zh) * 2015-10-09 2021-08-06 Tdk株式会社 用于麦克风的电子电路和麦克风
CN106899291A (zh) * 2017-02-23 2017-06-27 广东轻工职业技术学院 一种基于mash结构的超高频rfid系统的频率综合器
CN107623523B (zh) * 2017-09-13 2020-11-17 东南大学 一种基于总线分割的数字σδ调制器
CN108566200A (zh) * 2018-04-27 2018-09-21 上海顺久电子科技有限公司 一种分频器控制器电路、锁相环及芯片
US11804847B2 (en) * 2018-11-30 2023-10-31 Ciena Corporation Fractional frequency synthesis by sigma-delta modulating frequency of a reference clock
CN111884655B (zh) * 2020-07-27 2024-02-20 中国电子科技集团公司第三十六研究所 一种可变模小数变频的串行信号处理方法及装置
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Also Published As

Publication number Publication date
WO2002103609A1 (en) 2002-12-27
JP2004522361A (ja) 2004-07-22
EP1397772A4 (de) 2004-11-24
DE60215806T2 (de) 2007-09-06
US7006024B2 (en) 2006-02-28
US20030067405A1 (en) 2003-04-10
US6927716B2 (en) 2005-08-09
WO2002103609A9 (en) 2003-02-13
CN1465029A (zh) 2003-12-31
US20050231408A1 (en) 2005-10-20
EP1397772A1 (de) 2004-03-17
EP1397772B1 (de) 2006-11-02
DE60215806D1 (de) 2006-12-14

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