ATE313847T1 - Selbsttest-schaltung für cache-speicher - Google Patents
Selbsttest-schaltung für cache-speicherInfo
- Publication number
- ATE313847T1 ATE313847T1 AT02254230T AT02254230T ATE313847T1 AT E313847 T1 ATE313847 T1 AT E313847T1 AT 02254230 T AT02254230 T AT 02254230T AT 02254230 T AT02254230 T AT 02254230T AT E313847 T1 ATE313847 T1 AT E313847T1
- Authority
- AT
- Austria
- Prior art keywords
- test
- cache
- cam
- ram
- cache memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US29917601P | 2001-06-20 | 2001-06-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE313847T1 true ATE313847T1 (de) | 2006-01-15 |
Family
ID=23153621
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT02254230T ATE313847T1 (de) | 2001-06-20 | 2002-06-18 | Selbsttest-schaltung für cache-speicher |
Country Status (4)
Country | Link |
---|---|
US (1) | US6966017B2 (de) |
EP (1) | EP1274098B1 (de) |
AT (1) | ATE313847T1 (de) |
DE (1) | DE60208117T2 (de) |
Families Citing this family (48)
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US7401271B1 (en) * | 2001-08-20 | 2008-07-15 | Emc Corporation | Testing system and method of using same |
AT412747B (de) * | 2002-03-05 | 2005-06-27 | Rene-Michael Mag Cordes | Codegenerator und vorrichtung zur synchronen oder asynchronen sowie permanenten identifikation oder ver- und endschlüsselung von daten beliebiger länge |
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US7185247B2 (en) * | 2003-06-26 | 2007-02-27 | Intel Corporation | Pseudo bus agent to support functional testing |
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DE102004051346A1 (de) * | 2004-10-21 | 2006-05-04 | Infineon Technologies Ag | Halbleiter-Bauelement-Test-Einrichtung, insbesondere Daten-Zwischenspeicher-Bauelement mit Halbleiter-Bauelement-Test-Einrichtung, sowie Halbleiter-Bauelement-Test-Verfahren |
DE102004051344A1 (de) * | 2004-10-21 | 2006-05-04 | Infineon Technologies Ag | Halbleiter-Bauelement-Test-Einrichtung mit Schieberegister, sowie Halbleiter-Bauelement-Test-Verfahren |
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JP2007164929A (ja) * | 2005-12-16 | 2007-06-28 | Fujitsu Ltd | 記憶媒体管理装置、記憶媒体管理プログラム、記憶媒体管理方法 |
US7519886B2 (en) * | 2006-01-05 | 2009-04-14 | International Business Machines Corporation | Apparatus and method for integrated functional built-in self test for an ASIC |
DE102006009224B4 (de) * | 2006-02-28 | 2017-04-06 | Advanced Micro Devices, Inc. | Auswahl eines Testalgorithmus in einer Steuerung für eingebauten Speicherselbsttest |
US7945823B2 (en) * | 2006-03-02 | 2011-05-17 | Netlogic Microsystems, Inc. | Programmable address space built-in self test (BIST) device and method for fault detection |
US7797599B2 (en) * | 2006-09-27 | 2010-09-14 | Verigy (Singapore) Pte. Ltd. | Diagnostic information capture from logic devices with built-in self test |
US7539902B2 (en) * | 2006-10-19 | 2009-05-26 | Sun Microsystems, Inc. | Application level testing of instruction caches in multi-processor/multi-core systems |
US8688890B2 (en) * | 2006-12-05 | 2014-04-01 | Hewlett-Packard Development Company, L.P. | Bit ordering for communicating an address on a serial fabric |
JP2009238256A (ja) * | 2008-03-25 | 2009-10-15 | Toshiba Corp | 半導体記憶装置 |
US7966521B2 (en) * | 2008-07-14 | 2011-06-21 | International Business Machines Corporation | Light weight and high throughput test case generation methodology for testing cache/TLB intervention and diagnostics |
KR20100009053A (ko) * | 2008-07-17 | 2010-01-27 | 삼성전자주식회사 | 임베디드 플래시 메모리 테스트 회로 |
US20120159274A1 (en) * | 2010-12-21 | 2012-06-21 | Balakrishnan Kedarnath J | Apparatus to facilitate built-in self-test data collection |
US20120236660A1 (en) * | 2011-03-16 | 2012-09-20 | Nanya Technology Corp. | Test system and test method for memory |
US9792192B1 (en) | 2012-03-29 | 2017-10-17 | Amazon Technologies, Inc. | Client-side, variable drive health determination |
US8972799B1 (en) | 2012-03-29 | 2015-03-03 | Amazon Technologies, Inc. | Variable drive diagnostics |
US8719320B1 (en) | 2012-03-29 | 2014-05-06 | Amazon Technologies, Inc. | Server-side, variable drive health determination |
US9037921B1 (en) * | 2012-03-29 | 2015-05-19 | Amazon Technologies, Inc. | Variable drive health determination and data placement |
US9548137B2 (en) * | 2013-12-26 | 2017-01-17 | Intel Corporation | Integrated circuit defect detection and repair |
JP6096690B2 (ja) * | 2014-02-25 | 2017-03-15 | アラクサラネットワークス株式会社 | 通信装置、及びcamの異常診断方法 |
US9558120B2 (en) * | 2014-03-27 | 2017-01-31 | Intel Corporation | Method, apparatus and system to cache sets of tags of an off-die cache memory |
US9449717B2 (en) | 2014-06-20 | 2016-09-20 | Arm Limited | Memory built-in self-test for a data processing apparatus |
WO2016003417A1 (en) * | 2014-06-30 | 2016-01-07 | Hewlett-Packard Development Company, L.P. | Access cache line from lower level cache |
US9355732B2 (en) * | 2014-10-01 | 2016-05-31 | Sandisk Technologies Inc. | Latch initialization for a data storage device |
US9711241B2 (en) * | 2015-04-01 | 2017-07-18 | Qualcomm Incorporated | Method and apparatus for optimized memory test status detection and debug |
CN108463795B (zh) | 2016-04-05 | 2022-03-08 | 金融及风险组织有限公司 | 自助分类系统 |
US10891421B2 (en) * | 2016-04-05 | 2021-01-12 | Refinitiv Us Organization Llc | Apparatuses, methods and systems for adjusting tagging in a computing environment |
JP6697993B2 (ja) * | 2016-09-29 | 2020-05-27 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の診断方法 |
US10079070B2 (en) * | 2016-10-20 | 2018-09-18 | International Business Machines Corporation | Testing content addressable memory and random access memory |
GB2560336B (en) * | 2017-03-07 | 2020-05-06 | Imagination Tech Ltd | Address generators for verifying integrated circuit hardware designs for cache memory |
US10643734B2 (en) * | 2018-06-27 | 2020-05-05 | Micron Technology, Inc. | System and method for counting fail bit and reading out the same |
CN112505527B (zh) * | 2020-12-10 | 2024-03-22 | 杭州迪普信息技术有限公司 | 一种检测集成电路缺陷的方法及装置 |
CN112614534B (zh) * | 2020-12-17 | 2023-09-05 | 珠海一微半导体股份有限公司 | 一种mbist电路系统 |
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JP2646854B2 (ja) * | 1990-12-18 | 1997-08-27 | 三菱電機株式会社 | マイクロプロセッサ |
KR100267110B1 (ko) * | 1992-05-28 | 2000-11-01 | 리패치 | 마이크로프로세서에 상주하는 캐시 램을 테스트하는 방법 및 장치 |
US5617531A (en) | 1993-11-02 | 1997-04-01 | Motorola, Inc. | Data Processor having a built-in internal self test controller for testing a plurality of memories internal to the data processor |
US5638382A (en) * | 1994-06-29 | 1997-06-10 | Intel Corporation | Built-in self test function for a processor including intermediate test results |
US20030061545A1 (en) * | 1994-09-30 | 2003-03-27 | Chandrashekhar S. Patwardhan | Method and apparatus for providing test mode access to an instruction cache and microcode rom |
US5640509A (en) | 1995-10-03 | 1997-06-17 | Intel Corporation | Programmable built-in self-test function for an integrated circuit |
US5663965A (en) | 1995-10-06 | 1997-09-02 | International Business Machines Corp. | Apparatus and method for testing a memory array |
US5987635A (en) | 1996-04-23 | 1999-11-16 | Matsushita Electric Industrial Co., Ltd. | Semiconductor integrated circuit device capable of simultaneously performing self-test on memory circuits and logic circuits |
US5740412A (en) | 1996-05-06 | 1998-04-14 | International Business Machines Corporation | Set-select multiplexer with an array built-in self-test feature |
US6115789A (en) * | 1997-04-28 | 2000-09-05 | International Business Machines Corporation | Method and system for determining which memory locations have been accessed in a self timed cache architecture |
JPH10334695A (ja) * | 1997-05-27 | 1998-12-18 | Toshiba Corp | キャッシュメモリ及び情報処理システム |
US6001662A (en) | 1997-12-02 | 1999-12-14 | International Business Machines Corporation | Method and system for providing a reusable configurable self-test controller for manufactured integrated circuits |
US6351789B1 (en) * | 1998-05-29 | 2002-02-26 | Via-Cyrix, Inc. | Built-in self-test circuit and method for validating an associative data array |
KR100308621B1 (ko) * | 1998-11-19 | 2001-12-17 | 윤종용 | 반도체 메모리 장치를 위한 프로그램 가능한 내장 자기 테스트 시스템 |
US6732234B1 (en) * | 2000-08-07 | 2004-05-04 | Broadcom Corporation | Direct access mode for a cache |
-
2002
- 2002-06-18 EP EP02254230A patent/EP1274098B1/de not_active Expired - Lifetime
- 2002-06-18 DE DE60208117T patent/DE60208117T2/de not_active Expired - Lifetime
- 2002-06-18 AT AT02254230T patent/ATE313847T1/de not_active IP Right Cessation
- 2002-06-18 US US10/173,048 patent/US6966017B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE60208117T2 (de) | 2006-08-17 |
US20030051197A1 (en) | 2003-03-13 |
EP1274098B1 (de) | 2005-12-21 |
DE60208117D1 (de) | 2006-01-26 |
EP1274098A1 (de) | 2003-01-08 |
US6966017B2 (en) | 2005-11-15 |
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Legal Events
Date | Code | Title | Description |
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RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |