ATE251329T1 - Flash-speichersystem mit reduzierten störungen und verfahren dazu - Google Patents

Flash-speichersystem mit reduzierten störungen und verfahren dazu

Info

Publication number
ATE251329T1
ATE251329T1 AT96925572T AT96925572T ATE251329T1 AT E251329 T1 ATE251329 T1 AT E251329T1 AT 96925572 T AT96925572 T AT 96925572T AT 96925572 T AT96925572 T AT 96925572T AT E251329 T1 ATE251329 T1 AT E251329T1
Authority
AT
Austria
Prior art keywords
read
cells
circuitry
array
flash memory
Prior art date
Application number
AT96925572T
Other languages
English (en)
Inventor
Frankie F Roohparvar
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE251329T1 publication Critical patent/ATE251329T1/de

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/32Timing circuits

Landscapes

  • Read Only Memory (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Near-Field Transmission Systems (AREA)
AT96925572T 1995-08-01 1996-07-29 Flash-speichersystem mit reduzierten störungen und verfahren dazu ATE251329T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/509,876 US5617350A (en) 1995-08-01 1995-08-01 Flash memory system having reduced disturb and method
PCT/US1996/012444 WO1997005623A1 (en) 1995-08-01 1996-07-29 Flash memory system having reduced disturb and method

Publications (1)

Publication Number Publication Date
ATE251329T1 true ATE251329T1 (de) 2003-10-15

Family

ID=24028450

Family Applications (1)

Application Number Title Priority Date Filing Date
AT96925572T ATE251329T1 (de) 1995-08-01 1996-07-29 Flash-speichersystem mit reduzierten störungen und verfahren dazu

Country Status (8)

Country Link
US (1) US5617350A (de)
EP (1) EP0842514B1 (de)
JP (1) JP3548830B2 (de)
KR (1) KR100308745B1 (de)
AT (1) ATE251329T1 (de)
AU (1) AU6604796A (de)
DE (1) DE69630228T2 (de)
WO (1) WO1997005623A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5970022A (en) * 1997-03-21 1999-10-19 Winbond Electronics Corporation Semiconductor memory device with reduced read disturbance
US5825715A (en) * 1997-05-13 1998-10-20 Cypress Semiconductor Corp. Method and apparatus for preventing write operations in a memory device
DE19742176C1 (de) * 1997-09-24 1999-04-08 Siemens Ag Verfahren zur Verwendung beim Einsatz von EEPROMs als Programmspeicher
US6493270B2 (en) 1999-07-01 2002-12-10 Micron Technology, Inc. Leakage detection in programming algorithm for a flash memory device
US6108241A (en) 1999-07-01 2000-08-22 Micron Technology, Inc. Leakage detection in flash memory cell
TW559814B (en) * 2001-05-31 2003-11-01 Semiconductor Energy Lab Nonvolatile memory and method of driving the same
US6597609B2 (en) * 2001-08-30 2003-07-22 Micron Technology, Inc. Non-volatile memory with test rows for disturb detection
DE60212938D1 (de) * 2002-04-30 2006-08-17 St Microelectronics Srl Methode zur Reduzierung von ungewolltem Löschen beim Programmieren eines nichtflüchtigen NROM
KR100546134B1 (ko) * 2004-03-31 2006-01-24 주식회사 하이닉스반도체 입출력을 멀티플렉스 하는 메모리 장치
US7804714B1 (en) * 2007-02-21 2010-09-28 National Semiconductor Corporation System and method for providing an EPROM with different gate oxide thicknesses
IT1394027B1 (it) 2009-05-11 2012-05-25 Mg 2 Srl Macchina per il riempimento di capsule con prodotti farmaceutici
US10593397B1 (en) * 2018-12-07 2020-03-17 Arm Limited MRAM read and write methods using an incubation delay interval
US10783957B1 (en) 2019-03-20 2020-09-22 Arm Limited Read and logic operation methods for voltage-divider bit-cell memory devices

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5317535A (en) * 1992-06-19 1994-05-31 Intel Corporation Gate/source disturb protection for sixteen-bit flash EEPROM memory arrays
US5434815A (en) * 1994-01-19 1995-07-18 Atmel Corporation Stress reduction for non-volatile memory cell

Also Published As

Publication number Publication date
JP3548830B2 (ja) 2004-07-28
KR19990036007A (ko) 1999-05-25
KR100308745B1 (ko) 2001-11-02
EP0842514A1 (de) 1998-05-20
JPH10510659A (ja) 1998-10-13
WO1997005623A1 (en) 1997-02-13
EP0842514A4 (de) 1999-09-08
DE69630228D1 (de) 2003-11-06
AU6604796A (en) 1997-02-26
US5617350A (en) 1997-04-01
EP0842514B1 (de) 2003-10-01
DE69630228T2 (de) 2004-06-24

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Legal Events

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