ATE244445T1 - Anordnung und verfahren für statischen ramspeicher - Google Patents
Anordnung und verfahren für statischen ramspeicherInfo
- Publication number
- ATE244445T1 ATE244445T1 AT99203042T AT99203042T ATE244445T1 AT E244445 T1 ATE244445 T1 AT E244445T1 AT 99203042 T AT99203042 T AT 99203042T AT 99203042 T AT99203042 T AT 99203042T AT E244445 T1 ATE244445 T1 AT E244445T1
- Authority
- AT
- Austria
- Prior art keywords
- array
- power supply
- output voltage
- arrangement
- ram memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10072298P | 1998-09-17 | 1998-09-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE244445T1 true ATE244445T1 (de) | 2003-07-15 |
Family
ID=22281200
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT99203042T ATE244445T1 (de) | 1998-09-17 | 1999-09-17 | Anordnung und verfahren für statischen ramspeicher |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6141240A (de) |
| EP (1) | EP0987714B1 (de) |
| AT (1) | ATE244445T1 (de) |
| DE (1) | DE69909202T2 (de) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4198201B2 (ja) * | 1995-06-02 | 2008-12-17 | 株式会社ルネサステクノロジ | 半導体装置 |
| US6946901B2 (en) * | 2001-05-22 | 2005-09-20 | The Regents Of The University Of California | Low-power high-performance integrated circuit and related methods |
| KR20040078664A (ko) | 2002-01-11 | 2004-09-10 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 리프레시 주기 증가 |
| KR100993517B1 (ko) * | 2002-03-27 | 2010-11-10 | 더 리전트 오브 더 유니버시티 오브 캘리포니아 | 집적 회로, 집적 회로 구동 회로, 및 관련방법 |
| JP4260469B2 (ja) * | 2002-12-16 | 2009-04-30 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| KR100937647B1 (ko) * | 2002-12-30 | 2010-01-19 | 동부일렉트로닉스 주식회사 | 프로그램이 가능한 커패시터 및 이의 제조 방법 |
| US7046572B2 (en) * | 2003-06-16 | 2006-05-16 | International Business Machines Corporation | Low power manager for standby operation of memory system |
| US7447919B2 (en) * | 2004-04-06 | 2008-11-04 | Hewlett-Packard Development Company, L.P. | Voltage modulation for increased reliability in an integrated circuit |
| US7286389B2 (en) * | 2004-07-21 | 2007-10-23 | Duke University | Low-power, p-channel enhancement-type metal-oxide semiconductor field-effect transistor (PMOSFET) SRAM cells |
| US20060139995A1 (en) * | 2004-12-28 | 2006-06-29 | Ali Keshavarzi | One time programmable memory |
| US7355905B2 (en) | 2005-07-01 | 2008-04-08 | P.A. Semi, Inc. | Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage |
| WO2010080751A1 (en) * | 2009-01-06 | 2010-07-15 | Next Biometrics As | Low noise reading architecture for active sensor arrays |
| TWI459390B (zh) * | 2011-09-26 | 2014-11-01 | Winbond Electronics Corp | 半導體記憶裝置 |
| US9330751B2 (en) * | 2014-01-07 | 2016-05-03 | Samsung Electronics Co., Ltd. | SRAM wordline driver supply block with multiple modes |
| CN108847264A (zh) * | 2018-05-30 | 2018-11-20 | 上海华力集成电路制造有限公司 | 字线电压控制器及控制电路 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60231996A (ja) * | 1984-04-28 | 1985-11-18 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JPS63166090A (ja) * | 1986-12-26 | 1988-07-09 | Toshiba Corp | スタティック型メモリ |
| JP4198201B2 (ja) * | 1995-06-02 | 2008-12-17 | 株式会社ルネサステクノロジ | 半導体装置 |
| TW373175B (en) * | 1995-10-31 | 1999-11-01 | Matsushita Electric Mfg Corp | Data maintaining circuit |
| US5726944A (en) * | 1996-02-05 | 1998-03-10 | Motorola, Inc. | Voltage regulator for regulating an output voltage from a charge pump and method therefor |
| JP3220035B2 (ja) * | 1997-02-27 | 2001-10-22 | エヌイーシーマイクロシステム株式会社 | スタチック型半導体記憶装置 |
| JPH1166858A (ja) * | 1997-08-12 | 1999-03-09 | Mitsubishi Electric Corp | 半導体記憶装置 |
-
1999
- 1999-09-14 US US09/395,803 patent/US6141240A/en not_active Expired - Lifetime
- 1999-09-17 EP EP99203042A patent/EP0987714B1/de not_active Expired - Lifetime
- 1999-09-17 DE DE69909202T patent/DE69909202T2/de not_active Expired - Lifetime
- 1999-09-17 AT AT99203042T patent/ATE244445T1/de not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| DE69909202D1 (de) | 2003-08-07 |
| EP0987714B1 (de) | 2003-07-02 |
| EP0987714A2 (de) | 2000-03-22 |
| EP0987714A3 (de) | 2001-01-24 |
| US6141240A (en) | 2000-10-31 |
| DE69909202T2 (de) | 2004-06-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |