ATE186999T1 - Simulation von ausgewählten logik- schaltungsentwürfen - Google Patents

Simulation von ausgewählten logik- schaltungsentwürfen

Info

Publication number
ATE186999T1
ATE186999T1 AT90306621T AT90306621T ATE186999T1 AT E186999 T1 ATE186999 T1 AT E186999T1 AT 90306621 T AT90306621 T AT 90306621T AT 90306621 T AT90306621 T AT 90306621T AT E186999 T1 ATE186999 T1 AT E186999T1
Authority
AT
Austria
Prior art keywords
data tables
netlist
simulator
generator
integrated circuit
Prior art date
Application number
AT90306621T
Other languages
English (en)
Inventor
Stanley M Hyduke
Original Assignee
Stanley M Hyduke
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stanley M Hyduke filed Critical Stanley M Hyduke
Application granted granted Critical
Publication of ATE186999T1 publication Critical patent/ATE186999T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • G01R31/318357—Simulation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318378—Generation of test inputs, e.g. test vectors, patterns or sequences of patterns for devices arranged in a network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
AT90306621T 1989-06-23 1990-06-18 Simulation von ausgewählten logik- schaltungsentwürfen ATE186999T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/370,896 US5051938A (en) 1989-06-23 1989-06-23 Simulation of selected logic circuit designs

Publications (1)

Publication Number Publication Date
ATE186999T1 true ATE186999T1 (de) 1999-12-15

Family

ID=23461630

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90306621T ATE186999T1 (de) 1989-06-23 1990-06-18 Simulation von ausgewählten logik- schaltungsentwürfen

Country Status (5)

Country Link
US (1) US5051938A (de)
EP (1) EP0404482B1 (de)
JP (1) JPH03116383A (de)
AT (1) ATE186999T1 (de)
DE (1) DE69033360T2 (de)

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Also Published As

Publication number Publication date
DE69033360T2 (de) 2000-06-29
EP0404482A2 (de) 1990-12-27
EP0404482A3 (de) 1992-10-14
JPH03116383A (ja) 1991-05-17
US5051938A (en) 1991-09-24
DE69033360D1 (de) 1999-12-30
EP0404482B1 (de) 1999-11-24

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